Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
José Fonseca | 8771285 | 2014-01-17 16:27:50 +0000 | [diff] [blame] | 3 | * Copyright 2007-2008 VMware, Inc. |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 4 | * All Rights Reserved. |
Michal Krol | 4bfe1c9 | 2010-01-07 12:48:10 +0100 | [diff] [blame] | 5 | * Copyright 2009-2010 VMware, Inc. All rights Reserved. |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 8 | * copy of this software and associated documentation files (the |
| 9 | * "Software"), to deal in the Software without restriction, including |
| 10 | * without limitation the rights to use, copy, modify, merge, publish, |
| 11 | * distribute, sub license, and/or sell copies of the Software, and to |
| 12 | * permit persons to whom the Software is furnished to do so, subject to |
| 13 | * the following conditions: |
| 14 | * |
| 15 | * The above copyright notice and this permission notice (including the |
| 16 | * next paragraph) shall be included in all copies or substantial portions |
| 17 | * of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
José Fonseca | 8771285 | 2014-01-17 16:27:50 +0000 | [diff] [blame] | 22 | * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 26 | * |
| 27 | **************************************************************************/ |
| 28 | |
Michal Krol | e2da7ed | 2008-08-18 15:42:26 +0200 | [diff] [blame] | 29 | #ifndef TGSI_EXEC_H |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 30 | #define TGSI_EXEC_H |
| 31 | |
Keith Whitwell | 70af238 | 2007-08-13 17:02:27 +0100 | [diff] [blame] | 32 | #include "pipe/p_compiler.h" |
Keith Whitwell | c202fe1 | 2009-07-16 00:21:17 +0100 | [diff] [blame] | 33 | #include "pipe/p_state.h" |
Brian Paul | 859f45a | 2010-12-08 18:19:14 -0700 | [diff] [blame] | 34 | #include "pipe/p_shader_tokens.h" |
Keith Whitwell | 70af238 | 2007-08-13 17:02:27 +0100 | [diff] [blame] | 35 | |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 36 | #if defined __cplusplus |
| 37 | extern "C" { |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 38 | #endif |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 39 | |
Tom Stellard | 9ee1bcf | 2012-01-14 08:31:04 -0500 | [diff] [blame] | 40 | #define TGSI_CHAN_X 0 |
| 41 | #define TGSI_CHAN_Y 1 |
| 42 | #define TGSI_CHAN_Z 2 |
| 43 | #define TGSI_CHAN_W 3 |
Michal Krol | 4bfe1c9 | 2010-01-07 12:48:10 +0100 | [diff] [blame] | 44 | |
Tom Stellard | 6b63e25 | 2012-01-14 08:46:05 -0500 | [diff] [blame] | 45 | #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */ |
| 46 | #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */ |
michal | 058b978 | 2007-08-15 18:16:11 +0100 | [diff] [blame] | 47 | |
Tom Stellard | 82b71db | 2012-01-14 09:09:54 -0500 | [diff] [blame] | 48 | #define TGSI_FOR_EACH_CHANNEL( CHAN )\ |
| 49 | for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++) |
| 50 | |
| 51 | #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ |
| 52 | ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN))) |
| 53 | |
| 54 | #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ |
| 55 | if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )) |
| 56 | |
| 57 | #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\ |
| 58 | TGSI_FOR_EACH_CHANNEL( CHAN )\ |
| 59 | TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN ) |
| 60 | |
Michal Krol | 4bfe1c9 | 2010-01-07 12:48:10 +0100 | [diff] [blame] | 61 | |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 62 | /** |
| 63 | * Registers may be treated as float, signed int or unsigned int. |
| 64 | */ |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 65 | union tgsi_exec_channel |
| 66 | { |
Tom Stellard | 6b63e25 | 2012-01-14 08:46:05 -0500 | [diff] [blame] | 67 | float f[TGSI_QUAD_SIZE]; |
| 68 | int i[TGSI_QUAD_SIZE]; |
| 69 | unsigned u[TGSI_QUAD_SIZE]; |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 70 | }; |
| 71 | |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 72 | /** |
| 73 | * A vector[RGBA] of channels[4 pixels] |
| 74 | */ |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 75 | struct tgsi_exec_vector |
| 76 | { |
Tom Stellard | 6b63e25 | 2012-01-14 08:46:05 -0500 | [diff] [blame] | 77 | union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS]; |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 78 | }; |
| 79 | |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 80 | /** |
| 81 | * For fragment programs, information for computing fragment input |
| 82 | * values from plane equation of the triangle/line. |
| 83 | */ |
michal | 058b978 | 2007-08-15 18:16:11 +0100 | [diff] [blame] | 84 | struct tgsi_interp_coef |
| 85 | { |
Tom Stellard | 6b63e25 | 2012-01-14 08:46:05 -0500 | [diff] [blame] | 86 | float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */ |
| 87 | float dadx[TGSI_NUM_CHANNELS]; |
| 88 | float dady[TGSI_NUM_CHANNELS]; |
michal | 058b978 | 2007-08-15 18:16:11 +0100 | [diff] [blame] | 89 | }; |
Brian | b448028 | 2007-08-14 11:00:35 -0600 | [diff] [blame] | 90 | |
Brian Paul | 2c52c79 | 2015-09-10 12:26:18 -0600 | [diff] [blame] | 91 | enum tgsi_sampler_control |
| 92 | { |
| 93 | TGSI_SAMPLER_LOD_NONE, |
| 94 | TGSI_SAMPLER_LOD_BIAS, |
| 95 | TGSI_SAMPLER_LOD_EXPLICIT, |
| 96 | TGSI_SAMPLER_LOD_ZERO, |
| 97 | TGSI_SAMPLER_DERIVS_EXPLICIT, |
| 98 | TGSI_SAMPLER_GATHER, |
Michal Krol | 4440428 | 2010-01-07 13:48:41 +0100 | [diff] [blame] | 99 | }; |
| 100 | |
Dave Airlie | 22d1296 | 2016-03-22 07:53:48 +1000 | [diff] [blame] | 101 | struct tgsi_image_params { |
| 102 | unsigned unit; |
| 103 | unsigned tgsi_tex_instr; |
| 104 | enum pipe_format format; |
| 105 | unsigned execmask; |
| 106 | }; |
| 107 | |
| 108 | struct tgsi_image { |
| 109 | /* image interfaces */ |
| 110 | void (*load)(const struct tgsi_image *image, |
| 111 | const struct tgsi_image_params *params, |
| 112 | const int s[TGSI_QUAD_SIZE], |
| 113 | const int t[TGSI_QUAD_SIZE], |
| 114 | const int r[TGSI_QUAD_SIZE], |
| 115 | const int sample[TGSI_QUAD_SIZE], |
| 116 | float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); |
| 117 | |
| 118 | void (*store)(const struct tgsi_image *image, |
| 119 | const struct tgsi_image_params *params, |
| 120 | const int s[TGSI_QUAD_SIZE], |
| 121 | const int t[TGSI_QUAD_SIZE], |
| 122 | const int r[TGSI_QUAD_SIZE], |
| 123 | const int sample[TGSI_QUAD_SIZE], |
| 124 | float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); |
| 125 | |
| 126 | void (*op)(const struct tgsi_image *image, |
| 127 | const struct tgsi_image_params *params, |
| 128 | unsigned opcode, |
| 129 | const int s[TGSI_QUAD_SIZE], |
| 130 | const int t[TGSI_QUAD_SIZE], |
| 131 | const int r[TGSI_QUAD_SIZE], |
| 132 | const int sample[TGSI_QUAD_SIZE], |
| 133 | float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE], |
| 134 | float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); |
| 135 | |
| 136 | void (*get_dims)(const struct tgsi_image *image, |
| 137 | const struct tgsi_image_params *params, |
| 138 | int dims[4]); |
| 139 | }; |
| 140 | |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 141 | /** |
| 142 | * Information for sampling textures, which must be implemented |
| 143 | * by code outside the TGSI executor. |
| 144 | */ |
Brian | ddd30d8 | 2007-08-07 18:22:40 -0600 | [diff] [blame] | 145 | struct tgsi_sampler |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 146 | { |
Brian | b448028 | 2007-08-14 11:00:35 -0600 | [diff] [blame] | 147 | /** Get samples for four fragments in a quad */ |
Dave Airlie | 309fda2 | 2012-11-03 20:51:45 +1000 | [diff] [blame] | 148 | /* this interface contains 5 sets of channels that vary |
| 149 | * depending on the sampler. |
| 150 | * s - the first texture coordinate for sampling. |
| 151 | * t - the second texture coordinate for sampling - unused for 1D, |
| 152 | layer for 1D arrays. |
Roland Scheidegger | 6ace2e4 | 2013-03-01 23:27:41 +0100 | [diff] [blame] | 153 | * r - the third coordinate for sampling for 3D, cube, cube arrays, |
Dave Airlie | 309fda2 | 2012-11-03 20:51:45 +1000 | [diff] [blame] | 154 | * layer for 2D arrays. Compare value for 1D/2D shadows. |
Roland Scheidegger | 75d9967 | 2013-02-08 18:42:17 -0800 | [diff] [blame] | 155 | * c0 - Compare value for shadow cube and shadow 2d arrays, |
| 156 | * layer for cube arrays. |
Roland Scheidegger | 6ace2e4 | 2013-03-01 23:27:41 +0100 | [diff] [blame] | 157 | * derivs - explicit derivatives. |
| 158 | * offset - texel offsets |
Roland Scheidegger | 75d9967 | 2013-02-08 18:42:17 -0800 | [diff] [blame] | 159 | * lod - lod value, except for shadow cube arrays (compare value there). |
Dave Airlie | 309fda2 | 2012-11-03 20:51:45 +1000 | [diff] [blame] | 160 | */ |
Brian | b448028 | 2007-08-14 11:00:35 -0600 | [diff] [blame] | 161 | void (*get_samples)(struct tgsi_sampler *sampler, |
Roland Scheidegger | 6b35c2b | 2013-02-27 19:07:18 +0100 | [diff] [blame] | 162 | const unsigned sview_index, |
| 163 | const unsigned sampler_index, |
Tom Stellard | 6b63e25 | 2012-01-14 08:46:05 -0500 | [diff] [blame] | 164 | const float s[TGSI_QUAD_SIZE], |
| 165 | const float t[TGSI_QUAD_SIZE], |
Roland Scheidegger | 75d9967 | 2013-02-08 18:42:17 -0800 | [diff] [blame] | 166 | const float r[TGSI_QUAD_SIZE], |
Tom Stellard | 6b63e25 | 2012-01-14 08:46:05 -0500 | [diff] [blame] | 167 | const float c0[TGSI_QUAD_SIZE], |
Dave Airlie | 309fda2 | 2012-11-03 20:51:45 +1000 | [diff] [blame] | 168 | const float c1[TGSI_QUAD_SIZE], |
Roland Scheidegger | 6ace2e4 | 2013-03-01 23:27:41 +0100 | [diff] [blame] | 169 | float derivs[3][2][TGSI_QUAD_SIZE], |
| 170 | const int8_t offset[3], |
Michal Krol | 4440428 | 2010-01-07 13:48:41 +0100 | [diff] [blame] | 171 | enum tgsi_sampler_control control, |
Tom Stellard | 6b63e25 | 2012-01-14 08:46:05 -0500 | [diff] [blame] | 172 | float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); |
Roland Scheidegger | 6b35c2b | 2013-02-27 19:07:18 +0100 | [diff] [blame] | 173 | void (*get_dims)(struct tgsi_sampler *sampler, |
| 174 | const unsigned sview_index, |
| 175 | int level, int dims[4]); |
| 176 | void (*get_texel)(struct tgsi_sampler *sampler, |
| 177 | const unsigned sview_index, |
| 178 | const int i[TGSI_QUAD_SIZE], |
| 179 | const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE], |
| 180 | const int lod[TGSI_QUAD_SIZE], const int8_t offset[3], |
| 181 | float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); |
Krzesimir Nowak | ba72e6c | 2015-09-11 20:07:38 +0200 | [diff] [blame] | 182 | void (*query_lod)(const struct tgsi_sampler *tgsi_sampler, |
Krzesimir Nowak | 263d4a7 | 2015-09-10 14:15:58 +0200 | [diff] [blame] | 183 | const unsigned sview_index, |
| 184 | const unsigned sampler_index, |
| 185 | const float s[TGSI_QUAD_SIZE], |
| 186 | const float t[TGSI_QUAD_SIZE], |
| 187 | const float p[TGSI_QUAD_SIZE], |
| 188 | const float c0[TGSI_QUAD_SIZE], |
| 189 | const enum tgsi_sampler_control control, |
| 190 | float mipmap[TGSI_QUAD_SIZE], |
| 191 | float lod[TGSI_QUAD_SIZE]); |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 192 | }; |
| 193 | |
José Fonseca | 64f9916 | 2012-11-15 09:16:59 +0000 | [diff] [blame] | 194 | #define TGSI_EXEC_NUM_TEMPS 4096 |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 195 | #define TGSI_EXEC_NUM_IMMEDIATES 256 |
| 196 | |
Brian | aaac436 | 2007-10-24 17:01:23 -0600 | [diff] [blame] | 197 | /* |
| 198 | * Locations of various utility registers (_I = Index, _C = Channel) |
| 199 | */ |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 200 | #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 201 | #define TGSI_EXEC_TEMP_00000000_C 0 |
| 202 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 203 | #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 204 | #define TGSI_EXEC_TEMP_7FFFFFFF_C 1 |
| 205 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 206 | #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 207 | #define TGSI_EXEC_TEMP_80000000_C 2 |
| 208 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 209 | #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 210 | #define TGSI_EXEC_TEMP_FFFFFFFF_C 3 |
| 211 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 212 | #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 213 | #define TGSI_EXEC_TEMP_ONE_C 0 |
| 214 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 215 | #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 216 | #define TGSI_EXEC_TEMP_TWO_C 1 |
| 217 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 218 | #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 219 | #define TGSI_EXEC_TEMP_128_C 2 |
| 220 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 221 | #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 222 | #define TGSI_EXEC_TEMP_MINUS_128_C 3 |
| 223 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 224 | #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 225 | #define TGSI_EXEC_TEMP_KILMASK_C 0 |
| 226 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 227 | #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 228 | #define TGSI_EXEC_TEMP_OUTPUT_C 1 |
| 229 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 230 | #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2) |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 231 | #define TGSI_EXEC_TEMP_PRIMITIVE_C 2 |
| 232 | |
Michal Krol | f93d6f9 | 2010-11-04 11:51:10 +0100 | [diff] [blame] | 233 | #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2) |
| 234 | #define TGSI_EXEC_TEMP_THREE_C 3 |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 235 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 236 | #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3) |
Michal Krol | f93d6f9 | 2010-11-04 11:51:10 +0100 | [diff] [blame] | 237 | #define TGSI_EXEC_TEMP_HALF_C 0 |
Keith Whitwell | 17058e0 | 2008-05-02 16:02:18 +0200 | [diff] [blame] | 238 | |
Keith Whitwell | 7fb7027 | 2009-07-15 23:59:55 +0100 | [diff] [blame] | 239 | /* 4 register buffer for various purposes */ |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 240 | #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4) |
Keith Whitwell | 7fb7027 | 2009-07-15 23:59:55 +0100 | [diff] [blame] | 241 | #define TGSI_EXEC_NUM_TEMP_R 4 |
Keith Whitwell | 17058e0 | 2008-05-02 16:02:18 +0200 | [diff] [blame] | 242 | |
Keith Whitwell | 7fb7027 | 2009-07-15 23:59:55 +0100 | [diff] [blame] | 243 | #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8) |
Dave Airlie | 1ff4cc0 | 2016-03-21 08:51:54 +1000 | [diff] [blame] | 244 | #define TGSI_EXEC_NUM_ADDRS 3 |
Michal Krol | aa2b2e5 | 2009-11-02 09:41:40 +0000 | [diff] [blame] | 245 | |
| 246 | /* predicate register */ |
Dave Airlie | 1ff4cc0 | 2016-03-21 08:51:54 +1000 | [diff] [blame] | 247 | #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 11) |
Michal Krol | aa2b2e5 | 2009-11-02 09:41:40 +0000 | [diff] [blame] | 248 | #define TGSI_EXEC_NUM_PREDS 1 |
| 249 | |
Dave Airlie | 1ff4cc0 | 2016-03-21 08:51:54 +1000 | [diff] [blame] | 250 | #define TGSI_EXEC_NUM_TEMP_EXTRAS 12 |
Keith Whitwell | 7fb7027 | 2009-07-15 23:59:55 +0100 | [diff] [blame] | 251 | |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 252 | |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 253 | |
José Fonseca | 7b5931b | 2010-05-12 14:10:10 +0100 | [diff] [blame] | 254 | #define TGSI_EXEC_MAX_NESTING 32 |
| 255 | #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING |
| 256 | #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING |
| 257 | #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING |
| 258 | #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING |
Brian | fc38c82 | 2007-09-28 21:04:34 -0600 | [diff] [blame] | 259 | |
Michal Krol | 26c8593 | 2008-11-12 23:23:49 +0100 | [diff] [blame] | 260 | /* The maximum number of input attributes per vertex. For 2D |
| 261 | * input register files, this is the stride between two 1D |
| 262 | * arrays. |
| 263 | */ |
Marek Olšák | 77a78c6 | 2015-06-25 00:56:32 +0200 | [diff] [blame] | 264 | #define TGSI_EXEC_MAX_INPUT_ATTRIBS 32 |
Michal Krol | 26c8593 | 2008-11-12 23:23:49 +0100 | [diff] [blame] | 265 | |
Marek Olšák | 04f2c88 | 2014-07-24 20:32:08 +0200 | [diff] [blame] | 266 | /* The maximum number of bytes per constant buffer. |
Michal Krol | 26c8593 | 2008-11-12 23:23:49 +0100 | [diff] [blame] | 267 | */ |
Marek Olšák | 04f2c88 | 2014-07-24 20:32:08 +0200 | [diff] [blame] | 268 | #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE (4096 * sizeof(float[4])) |
Michal Krol | 26c8593 | 2008-11-12 23:23:49 +0100 | [diff] [blame] | 269 | |
Zack Rusin | 89d8577 | 2009-12-14 17:11:46 -0500 | [diff] [blame] | 270 | /* The maximum number of vertices per primitive */ |
| 271 | #define TGSI_MAX_PRIM_VERTICES 6 |
| 272 | |
| 273 | /* The maximum number of primitives to be generated */ |
| 274 | #define TGSI_MAX_PRIMITIVES 64 |
| 275 | |
| 276 | /* The maximum total number of vertices */ |
| 277 | #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS) |
Brian Paul | d78a196 | 2009-09-10 12:44:28 -0600 | [diff] [blame] | 278 | |
Brian Paul | 859f45a | 2010-12-08 18:19:14 -0700 | [diff] [blame] | 279 | #define TGSI_MAX_MISC_INPUTS 8 |
| 280 | |
Brian Paul | d78a196 | 2009-09-10 12:44:28 -0600 | [diff] [blame] | 281 | /** function call/activation record */ |
| 282 | struct tgsi_call_record |
| 283 | { |
| 284 | uint CondStackTop; |
| 285 | uint LoopStackTop; |
| 286 | uint ContStackTop; |
Michal Krol | 062aab9 | 2010-01-01 23:44:00 +0100 | [diff] [blame] | 287 | int SwitchStackTop; |
| 288 | int BreakStackTop; |
Brian Paul | d78a196 | 2009-09-10 12:44:28 -0600 | [diff] [blame] | 289 | uint ReturnAddr; |
| 290 | }; |
| 291 | |
Michal Krol | 062aab9 | 2010-01-01 23:44:00 +0100 | [diff] [blame] | 292 | |
| 293 | /* Switch-case block state. */ |
| 294 | struct tgsi_switch_record { |
| 295 | uint mask; /**< execution mask */ |
| 296 | union tgsi_exec_channel selector; /**< a value case statements are compared to */ |
| 297 | uint defaultMask; /**< non-execute mask for default case */ |
| 298 | }; |
| 299 | |
| 300 | |
| 301 | enum tgsi_break_type { |
| 302 | TGSI_EXEC_BREAK_INSIDE_LOOP, |
| 303 | TGSI_EXEC_BREAK_INSIDE_SWITCH |
| 304 | }; |
| 305 | |
| 306 | |
| 307 | #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING) |
| 308 | |
| 309 | |
Brian | 78f3cd1 | 2007-09-29 10:43:29 -0600 | [diff] [blame] | 310 | /** |
| 311 | * Run-time virtual machine state for executing TGSI shader. |
| 312 | */ |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 313 | struct tgsi_exec_machine |
| 314 | { |
Brian Paul | f042d66 | 2008-07-03 12:56:33 -0600 | [diff] [blame] | 315 | /* Total = program temporaries + internal temporaries |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 316 | */ |
Keith Whitwell | 6175653 | 2009-07-15 23:44:53 +0100 | [diff] [blame] | 317 | struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS + |
| 318 | TGSI_EXEC_NUM_TEMP_EXTRAS]; |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 319 | |
Keith Whitwell | 6175653 | 2009-07-15 23:44:53 +0100 | [diff] [blame] | 320 | float Imms[TGSI_EXEC_NUM_IMMEDIATES][4]; |
| 321 | |
Zack Rusin | 2b221e1 | 2010-06-18 09:39:16 -0400 | [diff] [blame] | 322 | float ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4]; |
| 323 | |
Zack Rusin | ff2a0fa | 2011-03-01 22:50:42 -0500 | [diff] [blame] | 324 | struct tgsi_exec_vector *Inputs; |
| 325 | struct tgsi_exec_vector *Outputs; |
Keith Whitwell | 4e3002b | 2009-07-16 00:23:33 +0100 | [diff] [blame] | 326 | |
Brian Paul | 859f45a | 2010-12-08 18:19:14 -0700 | [diff] [blame] | 327 | /* System values */ |
| 328 | unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT]; |
Dave Airlie | 34a78b7 | 2012-01-05 16:59:24 +0000 | [diff] [blame] | 329 | union tgsi_exec_channel SystemValue[TGSI_MAX_MISC_INPUTS]; |
Brian Paul | 859f45a | 2010-12-08 18:19:14 -0700 | [diff] [blame] | 330 | |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 331 | struct tgsi_exec_vector *Addrs; |
Michal Krol | 0c54d76 | 2009-11-24 09:03:41 +0100 | [diff] [blame] | 332 | struct tgsi_exec_vector *Predicates; |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 333 | |
Roland Scheidegger | 6b35c2b | 2013-02-27 19:07:18 +0100 | [diff] [blame] | 334 | struct tgsi_sampler *Sampler; |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 335 | |
Dave Airlie | 22d1296 | 2016-03-22 07:53:48 +1000 | [diff] [blame] | 336 | struct tgsi_image *Image; |
michal | 058b978 | 2007-08-15 18:16:11 +0100 | [diff] [blame] | 337 | unsigned ImmLimit; |
Brian Paul | ba2cc3b | 2010-07-29 13:49:21 -0600 | [diff] [blame] | 338 | |
Michal Krol | 7c5f255 | 2010-01-25 13:29:33 +0100 | [diff] [blame] | 339 | const void *Consts[PIPE_MAX_CONSTANT_BUFFERS]; |
Brian Paul | ba2cc3b | 2010-07-29 13:49:21 -0600 | [diff] [blame] | 340 | unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS]; |
| 341 | |
Brian Paul | 0f82aa5 | 2009-03-22 18:10:10 -0600 | [diff] [blame] | 342 | const struct tgsi_token *Tokens; /**< Declarations, instructions */ |
| 343 | unsigned Processor; /**< TGSI_PROCESSOR_x */ |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 344 | |
michal | 058b978 | 2007-08-15 18:16:11 +0100 | [diff] [blame] | 345 | /* GEOMETRY processor only. */ |
| 346 | unsigned *Primitives; |
Zack Rusin | 89d8577 | 2009-12-14 17:11:46 -0500 | [diff] [blame] | 347 | unsigned NumOutputs; |
| 348 | unsigned MaxGeometryShaderOutputs; |
Dave Airlie | a4670de | 2014-06-11 11:38:19 +1000 | [diff] [blame] | 349 | unsigned MaxOutputVertices; |
michal | 058b978 | 2007-08-15 18:16:11 +0100 | [diff] [blame] | 350 | |
| 351 | /* FRAGMENT processor only. */ |
| 352 | const struct tgsi_interp_coef *InterpCoefs; |
Brian | e785f19 | 2007-12-14 11:00:46 -0700 | [diff] [blame] | 353 | struct tgsi_exec_vector QuadPos; |
Michal Krol | cc35a45 | 2009-11-23 10:49:41 +0100 | [diff] [blame] | 354 | float Face; /**< +1 if front facing, -1 if back facing */ |
Dave Airlie | 67e3cbf | 2012-01-09 15:57:02 +0000 | [diff] [blame] | 355 | bool flatshade_color; |
Dave Airlie | 827393b | 2016-03-22 07:50:37 +1000 | [diff] [blame] | 356 | |
| 357 | /* See GLSL 4.50 specification for definition of helper invocations */ |
| 358 | uint NonHelperMask; /**< non-helpers */ |
Brian | 78f3cd1 | 2007-09-29 10:43:29 -0600 | [diff] [blame] | 359 | /* Conditional execution masks */ |
Brian | 53a6a55 | 2007-10-02 16:05:07 -0600 | [diff] [blame] | 360 | uint CondMask; /**< For IF/ELSE/ENDIF */ |
| 361 | uint LoopMask; /**< For BGNLOOP/ENDLOOP */ |
| 362 | uint ContMask; /**< For loop CONT statements */ |
Brian | aec1f8e | 2007-10-09 14:40:11 -0600 | [diff] [blame] | 363 | uint FuncMask; /**< For function calls */ |
Brian | 78f3cd1 | 2007-09-29 10:43:29 -0600 | [diff] [blame] | 364 | uint ExecMask; /**< = CondMask & LoopMask */ |
Brian | fc38c82 | 2007-09-28 21:04:34 -0600 | [diff] [blame] | 365 | |
Michal Krol | 062aab9 | 2010-01-01 23:44:00 +0100 | [diff] [blame] | 366 | /* Current switch-case state. */ |
| 367 | struct tgsi_switch_record Switch; |
| 368 | |
| 369 | /* Current break type. */ |
| 370 | enum tgsi_break_type BreakType; |
| 371 | |
Brian | 78f3cd1 | 2007-09-29 10:43:29 -0600 | [diff] [blame] | 372 | /** Condition mask stack (for nested conditionals) */ |
| 373 | uint CondStack[TGSI_EXEC_MAX_COND_NESTING]; |
Brian | fc38c82 | 2007-09-28 21:04:34 -0600 | [diff] [blame] | 374 | int CondStackTop; |
Brian | 78f3cd1 | 2007-09-29 10:43:29 -0600 | [diff] [blame] | 375 | |
| 376 | /** Loop mask stack (for nested loops) */ |
| 377 | uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING]; |
| 378 | int LoopStackTop; |
Brian | 57d3770 | 2007-10-02 10:38:56 -0600 | [diff] [blame] | 379 | |
Keith Whitwell | 848ab8b | 2009-09-03 15:16:25 +0100 | [diff] [blame] | 380 | /** Loop label stack */ |
| 381 | uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING]; |
| 382 | int LoopLabelStackTop; |
| 383 | |
Brian | 53a6a55 | 2007-10-02 16:05:07 -0600 | [diff] [blame] | 384 | /** Loop continue mask stack (see comments in tgsi_exec.c) */ |
| 385 | uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING]; |
| 386 | int ContStackTop; |
| 387 | |
Michal Krol | 062aab9 | 2010-01-01 23:44:00 +0100 | [diff] [blame] | 388 | /** Switch case stack */ |
| 389 | struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING]; |
| 390 | int SwitchStackTop; |
| 391 | |
| 392 | enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK]; |
| 393 | int BreakStackTop; |
| 394 | |
Brian | aec1f8e | 2007-10-09 14:40:11 -0600 | [diff] [blame] | 395 | /** Function execution mask stack (for executing subroutine code) */ |
| 396 | uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING]; |
| 397 | int FuncStackTop; |
| 398 | |
| 399 | /** Function call stack for saving/restoring the program counter */ |
Brian Paul | d78a196 | 2009-09-10 12:44:28 -0600 | [diff] [blame] | 400 | struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING]; |
Brian | 4ad80ad | 2007-10-02 14:05:21 -0600 | [diff] [blame] | 401 | int CallStackTop; |
| 402 | |
Brian | 57d3770 | 2007-10-02 10:38:56 -0600 | [diff] [blame] | 403 | struct tgsi_full_instruction *Instructions; |
| 404 | uint NumInstructions; |
| 405 | |
| 406 | struct tgsi_full_declaration *Declarations; |
| 407 | uint NumDeclarations; |
Brian | 0d13ade | 2007-10-02 11:46:11 -0600 | [diff] [blame] | 408 | |
Francisco Jerez | a5f44cc | 2012-05-01 02:38:51 +0200 | [diff] [blame] | 409 | struct tgsi_declaration_sampler_view |
| 410 | SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS]; |
Zack Rusin | ff2a0fa | 2011-03-01 22:50:42 -0500 | [diff] [blame] | 411 | |
| 412 | boolean UsedGeometryShader; |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 413 | }; |
| 414 | |
Keith Whitwell | 6175653 | 2009-07-15 23:44:53 +0100 | [diff] [blame] | 415 | struct tgsi_exec_machine * |
| 416 | tgsi_exec_machine_create( void ); |
| 417 | |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 418 | void |
Keith Whitwell | 6175653 | 2009-07-15 23:44:53 +0100 | [diff] [blame] | 419 | tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach); |
Keith Whitwell | c04a7f8 | 2008-02-15 09:31:22 +0000 | [diff] [blame] | 420 | |
| 421 | |
| 422 | void |
| 423 | tgsi_exec_machine_bind_shader( |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 424 | struct tgsi_exec_machine *mach, |
michal | 058b978 | 2007-08-15 18:16:11 +0100 | [diff] [blame] | 425 | const struct tgsi_token *tokens, |
Dave Airlie | 22d1296 | 2016-03-22 07:53:48 +1000 | [diff] [blame] | 426 | struct tgsi_sampler *sampler, |
| 427 | struct tgsi_image *image); |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 428 | |
Brian | 355f8f7 | 2007-10-02 19:16:57 -0600 | [diff] [blame] | 429 | uint |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 430 | tgsi_exec_machine_run( |
| 431 | struct tgsi_exec_machine *mach ); |
| 432 | |
Brian | eba2e04 | 2007-12-24 17:37:59 -0700 | [diff] [blame] | 433 | |
Brian Paul | 013bd4d | 2009-08-20 10:28:22 -0600 | [diff] [blame] | 434 | void |
| 435 | tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach); |
| 436 | |
| 437 | |
| 438 | boolean |
| 439 | tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst); |
| 440 | |
| 441 | |
Brian Paul | ba2cc3b | 2010-07-29 13:49:21 -0600 | [diff] [blame] | 442 | extern void |
| 443 | tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach, |
| 444 | unsigned num_bufs, |
| 445 | const void **bufs, |
| 446 | const unsigned *buf_sizes); |
| 447 | |
| 448 | |
Ilia Mirkin | a2a1a58 | 2015-07-20 19:58:43 -0400 | [diff] [blame] | 449 | static inline int |
Luca Barbieri | a508d2d | 2010-09-05 20:50:50 +0200 | [diff] [blame] | 450 | tgsi_exec_get_shader_param(enum pipe_shader_cap param) |
| 451 | { |
| 452 | switch(param) { |
| 453 | case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: |
| 454 | case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: |
| 455 | case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: |
| 456 | case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: |
| 457 | return INT_MAX; |
| 458 | case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: |
| 459 | return TGSI_EXEC_MAX_NESTING; |
| 460 | case PIPE_SHADER_CAP_MAX_INPUTS: |
| 461 | return TGSI_EXEC_MAX_INPUT_ATTRIBS; |
Marek Olšák | 5f5b83c | 2014-10-01 20:28:17 +0200 | [diff] [blame] | 462 | case PIPE_SHADER_CAP_MAX_OUTPUTS: |
| 463 | return 32; |
Marek Olšák | 04f2c88 | 2014-07-24 20:32:08 +0200 | [diff] [blame] | 464 | case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: |
| 465 | return TGSI_EXEC_MAX_CONST_BUFFER_SIZE; |
Luca Barbieri | a508d2d | 2010-09-05 20:50:50 +0200 | [diff] [blame] | 466 | case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: |
| 467 | return PIPE_MAX_CONSTANT_BUFFERS; |
| 468 | case PIPE_SHADER_CAP_MAX_TEMPS: |
| 469 | return TGSI_EXEC_NUM_TEMPS; |
Luca Barbieri | a508d2d | 2010-09-05 20:50:50 +0200 | [diff] [blame] | 470 | case PIPE_SHADER_CAP_MAX_PREDS: |
| 471 | return TGSI_EXEC_NUM_PREDS; |
| 472 | case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: |
| 473 | return 1; |
Marek Olšák | 53b7ec9 | 2010-11-12 03:03:04 +0100 | [diff] [blame] | 474 | case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: |
| 475 | case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: |
| 476 | case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: |
| 477 | case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: |
| 478 | return 1; |
Marek Olšák | 9aa089e | 2010-11-14 15:34:59 +0100 | [diff] [blame] | 479 | case PIPE_SHADER_CAP_SUBROUTINES: |
| 480 | return 1; |
Bryan Cain | 17b695e | 2011-05-05 21:10:28 -0500 | [diff] [blame] | 481 | case PIPE_SHADER_CAP_INTEGERS: |
| 482 | return 1; |
Marek Olšák | f5bfe54 | 2011-09-27 22:22:06 +0200 | [diff] [blame] | 483 | case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: |
| 484 | return PIPE_MAX_SAMPLERS; |
Brian Paul | 9b1ae44 | 2014-05-05 10:18:49 -0600 | [diff] [blame] | 485 | case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: |
| 486 | return PIPE_MAX_SHADER_SAMPLER_VIEWS; |
| 487 | case PIPE_SHADER_CAP_PREFERRED_IR: |
| 488 | return PIPE_SHADER_IR_TGSI; |
Samuel Pitoiset | 5e09ac7 | 2016-02-03 18:57:58 +0100 | [diff] [blame] | 489 | case PIPE_SHADER_CAP_SUPPORTED_IRS: |
| 490 | return 1 << PIPE_SHADER_IR_TGSI; |
Brian Paul | ad30e45 | 2013-02-01 11:15:43 -0700 | [diff] [blame] | 491 | case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: |
| 492 | return 1; |
Tom Stellard | fea996c | 2014-06-17 08:52:34 -0700 | [diff] [blame] | 493 | case PIPE_SHADER_CAP_DOUBLES: |
Ilia Mirkin | 924ee3f | 2014-07-25 17:48:01 -0400 | [diff] [blame] | 494 | case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: |
Marek Olšák | b6ebe7e | 2015-05-25 19:30:44 +0200 | [diff] [blame] | 495 | case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: |
Dave Airlie | 0e82817 | 2014-08-14 18:40:41 +1000 | [diff] [blame] | 496 | return 1; |
Ilia Mirkin | 899d779 | 2014-07-25 17:03:33 -0400 | [diff] [blame] | 497 | case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: |
Marek Olšák | 216543e | 2015-02-28 00:26:31 +0100 | [diff] [blame] | 498 | case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: |
Ilia Mirkin | 266d001 | 2015-09-26 20:27:42 -0400 | [diff] [blame] | 499 | case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: |
Ilia Mirkin | 899d779 | 2014-07-25 17:03:33 -0400 | [diff] [blame] | 500 | return 0; |
Dave Airlie | eb9ad9f | 2016-03-22 07:59:35 +1000 | [diff] [blame^] | 501 | case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: |
| 502 | return PIPE_MAX_SHADER_IMAGES; |
| 503 | |
Marek Olšák | 814f314 | 2015-10-20 18:26:02 +0200 | [diff] [blame] | 504 | case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: |
| 505 | return 32; |
Luca Barbieri | a508d2d | 2010-09-05 20:50:50 +0200 | [diff] [blame] | 506 | } |
Brian Paul | 9b1ae44 | 2014-05-05 10:18:49 -0600 | [diff] [blame] | 507 | /* if we get here, we missed a shader cap above (and should have seen |
| 508 | * a compiler warning.) |
| 509 | */ |
| 510 | return 0; |
Luca Barbieri | a508d2d | 2010-09-05 20:50:50 +0200 | [diff] [blame] | 511 | } |
| 512 | |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 513 | #if defined __cplusplus |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 514 | } /* extern "C" */ |
| 515 | #endif |
michal | ffe5873 | 2007-07-05 19:55:38 +0200 | [diff] [blame] | 516 | |
Brian | 79d8e78 | 2007-10-27 09:43:28 -0600 | [diff] [blame] | 517 | #endif /* TGSI_EXEC_H */ |