blob: 45fb8d43c88e586d3ed596024a2196b880451102 [file] [log] [blame]
Brian79d8e782007-10-27 09:43:28 -06001/**************************************************************************
2 *
José Fonseca87712852014-01-17 16:27:50 +00003 * Copyright 2007-2008 VMware, Inc.
Brian79d8e782007-10-27 09:43:28 -06004 * All Rights Reserved.
Michal Krol4bfe1c92010-01-07 12:48:10 +01005 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
Brian79d8e782007-10-27 09:43:28 -06006 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
José Fonseca87712852014-01-17 16:27:50 +000022 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
Brian79d8e782007-10-27 09:43:28 -060023 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
Michal Krole2da7ed2008-08-18 15:42:26 +020029#ifndef TGSI_EXEC_H
michalffe58732007-07-05 19:55:38 +020030#define TGSI_EXEC_H
31
Keith Whitwell70af2382007-08-13 17:02:27 +010032#include "pipe/p_compiler.h"
Keith Whitwellc202fe12009-07-16 00:21:17 +010033#include "pipe/p_state.h"
Brian Paul859f45a2010-12-08 18:19:14 -070034#include "pipe/p_shader_tokens.h"
Keith Whitwell70af2382007-08-13 17:02:27 +010035
michalffe58732007-07-05 19:55:38 +020036#if defined __cplusplus
37extern "C" {
Brian79d8e782007-10-27 09:43:28 -060038#endif
michalffe58732007-07-05 19:55:38 +020039
Tom Stellard9ee1bcf2012-01-14 08:31:04 -050040#define TGSI_CHAN_X 0
41#define TGSI_CHAN_Y 1
42#define TGSI_CHAN_Z 2
43#define TGSI_CHAN_W 3
Michal Krol4bfe1c92010-01-07 12:48:10 +010044
Tom Stellard6b63e252012-01-14 08:46:05 -050045#define TGSI_NUM_CHANNELS 4 /* R,G,B,A */
46#define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */
michal058b9782007-08-15 18:16:11 +010047
Tom Stellard82b71db2012-01-14 09:09:54 -050048#define TGSI_FOR_EACH_CHANNEL( CHAN )\
49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
50
51#define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
53
54#define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
56
57#define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58 TGSI_FOR_EACH_CHANNEL( CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
60
Michal Krol4bfe1c92010-01-07 12:48:10 +010061
Brian79d8e782007-10-27 09:43:28 -060062/**
63 * Registers may be treated as float, signed int or unsigned int.
64 */
michalffe58732007-07-05 19:55:38 +020065union tgsi_exec_channel
66{
Tom Stellard6b63e252012-01-14 08:46:05 -050067 float f[TGSI_QUAD_SIZE];
68 int i[TGSI_QUAD_SIZE];
69 unsigned u[TGSI_QUAD_SIZE];
michalffe58732007-07-05 19:55:38 +020070};
71
Brian79d8e782007-10-27 09:43:28 -060072/**
73 * A vector[RGBA] of channels[4 pixels]
74 */
michalffe58732007-07-05 19:55:38 +020075struct tgsi_exec_vector
76{
Tom Stellard6b63e252012-01-14 08:46:05 -050077 union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
michalffe58732007-07-05 19:55:38 +020078};
79
Brian79d8e782007-10-27 09:43:28 -060080/**
81 * For fragment programs, information for computing fragment input
82 * values from plane equation of the triangle/line.
83 */
michal058b9782007-08-15 18:16:11 +010084struct tgsi_interp_coef
85{
Tom Stellard6b63e252012-01-14 08:46:05 -050086 float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
87 float dadx[TGSI_NUM_CHANNELS];
88 float dady[TGSI_NUM_CHANNELS];
michal058b9782007-08-15 18:16:11 +010089};
Brianb4480282007-08-14 11:00:35 -060090
Brian Paul2c52c792015-09-10 12:26:18 -060091enum tgsi_sampler_control
92{
93 TGSI_SAMPLER_LOD_NONE,
94 TGSI_SAMPLER_LOD_BIAS,
95 TGSI_SAMPLER_LOD_EXPLICIT,
96 TGSI_SAMPLER_LOD_ZERO,
97 TGSI_SAMPLER_DERIVS_EXPLICIT,
98 TGSI_SAMPLER_GATHER,
Michal Krol44404282010-01-07 13:48:41 +010099};
100
Dave Airlie22d12962016-03-22 07:53:48 +1000101struct tgsi_image_params {
102 unsigned unit;
103 unsigned tgsi_tex_instr;
104 enum pipe_format format;
105 unsigned execmask;
106};
107
108struct tgsi_image {
109 /* image interfaces */
110 void (*load)(const struct tgsi_image *image,
111 const struct tgsi_image_params *params,
112 const int s[TGSI_QUAD_SIZE],
113 const int t[TGSI_QUAD_SIZE],
114 const int r[TGSI_QUAD_SIZE],
115 const int sample[TGSI_QUAD_SIZE],
116 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
117
118 void (*store)(const struct tgsi_image *image,
119 const struct tgsi_image_params *params,
120 const int s[TGSI_QUAD_SIZE],
121 const int t[TGSI_QUAD_SIZE],
122 const int r[TGSI_QUAD_SIZE],
123 const int sample[TGSI_QUAD_SIZE],
124 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
125
126 void (*op)(const struct tgsi_image *image,
127 const struct tgsi_image_params *params,
128 unsigned opcode,
129 const int s[TGSI_QUAD_SIZE],
130 const int t[TGSI_QUAD_SIZE],
131 const int r[TGSI_QUAD_SIZE],
132 const int sample[TGSI_QUAD_SIZE],
133 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
134 float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
135
136 void (*get_dims)(const struct tgsi_image *image,
137 const struct tgsi_image_params *params,
138 int dims[4]);
139};
140
Brian79d8e782007-10-27 09:43:28 -0600141/**
142 * Information for sampling textures, which must be implemented
143 * by code outside the TGSI executor.
144 */
Brianddd30d82007-08-07 18:22:40 -0600145struct tgsi_sampler
michalffe58732007-07-05 19:55:38 +0200146{
Brianb4480282007-08-14 11:00:35 -0600147 /** Get samples for four fragments in a quad */
Dave Airlie309fda22012-11-03 20:51:45 +1000148 /* this interface contains 5 sets of channels that vary
149 * depending on the sampler.
150 * s - the first texture coordinate for sampling.
151 * t - the second texture coordinate for sampling - unused for 1D,
152 layer for 1D arrays.
Roland Scheidegger6ace2e42013-03-01 23:27:41 +0100153 * r - the third coordinate for sampling for 3D, cube, cube arrays,
Dave Airlie309fda22012-11-03 20:51:45 +1000154 * layer for 2D arrays. Compare value for 1D/2D shadows.
Roland Scheidegger75d99672013-02-08 18:42:17 -0800155 * c0 - Compare value for shadow cube and shadow 2d arrays,
156 * layer for cube arrays.
Roland Scheidegger6ace2e42013-03-01 23:27:41 +0100157 * derivs - explicit derivatives.
158 * offset - texel offsets
Roland Scheidegger75d99672013-02-08 18:42:17 -0800159 * lod - lod value, except for shadow cube arrays (compare value there).
Dave Airlie309fda22012-11-03 20:51:45 +1000160 */
Brianb4480282007-08-14 11:00:35 -0600161 void (*get_samples)(struct tgsi_sampler *sampler,
Roland Scheidegger6b35c2b2013-02-27 19:07:18 +0100162 const unsigned sview_index,
163 const unsigned sampler_index,
Tom Stellard6b63e252012-01-14 08:46:05 -0500164 const float s[TGSI_QUAD_SIZE],
165 const float t[TGSI_QUAD_SIZE],
Roland Scheidegger75d99672013-02-08 18:42:17 -0800166 const float r[TGSI_QUAD_SIZE],
Tom Stellard6b63e252012-01-14 08:46:05 -0500167 const float c0[TGSI_QUAD_SIZE],
Dave Airlie309fda22012-11-03 20:51:45 +1000168 const float c1[TGSI_QUAD_SIZE],
Roland Scheidegger6ace2e42013-03-01 23:27:41 +0100169 float derivs[3][2][TGSI_QUAD_SIZE],
170 const int8_t offset[3],
Michal Krol44404282010-01-07 13:48:41 +0100171 enum tgsi_sampler_control control,
Tom Stellard6b63e252012-01-14 08:46:05 -0500172 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
Roland Scheidegger6b35c2b2013-02-27 19:07:18 +0100173 void (*get_dims)(struct tgsi_sampler *sampler,
174 const unsigned sview_index,
175 int level, int dims[4]);
176 void (*get_texel)(struct tgsi_sampler *sampler,
177 const unsigned sview_index,
178 const int i[TGSI_QUAD_SIZE],
179 const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
180 const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
181 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
Krzesimir Nowakba72e6c2015-09-11 20:07:38 +0200182 void (*query_lod)(const struct tgsi_sampler *tgsi_sampler,
Krzesimir Nowak263d4a72015-09-10 14:15:58 +0200183 const unsigned sview_index,
184 const unsigned sampler_index,
185 const float s[TGSI_QUAD_SIZE],
186 const float t[TGSI_QUAD_SIZE],
187 const float p[TGSI_QUAD_SIZE],
188 const float c0[TGSI_QUAD_SIZE],
189 const enum tgsi_sampler_control control,
190 float mipmap[TGSI_QUAD_SIZE],
191 float lod[TGSI_QUAD_SIZE]);
michalffe58732007-07-05 19:55:38 +0200192};
193
José Fonseca64f99162012-11-15 09:16:59 +0000194#define TGSI_EXEC_NUM_TEMPS 4096
Brian Paulf042d662008-07-03 12:56:33 -0600195#define TGSI_EXEC_NUM_IMMEDIATES 256
196
Brianaaac4362007-10-24 17:01:23 -0600197/*
198 * Locations of various utility registers (_I = Index, _C = Channel)
199 */
Brian Paulf042d662008-07-03 12:56:33 -0600200#define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0)
michalffe58732007-07-05 19:55:38 +0200201#define TGSI_EXEC_TEMP_00000000_C 0
202
Brian Paulf042d662008-07-03 12:56:33 -0600203#define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
michalffe58732007-07-05 19:55:38 +0200204#define TGSI_EXEC_TEMP_7FFFFFFF_C 1
205
Brian Paulf042d662008-07-03 12:56:33 -0600206#define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0)
michalffe58732007-07-05 19:55:38 +0200207#define TGSI_EXEC_TEMP_80000000_C 2
208
Brian Paulf042d662008-07-03 12:56:33 -0600209#define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
michalffe58732007-07-05 19:55:38 +0200210#define TGSI_EXEC_TEMP_FFFFFFFF_C 3
211
Brian Paulf042d662008-07-03 12:56:33 -0600212#define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1)
michalffe58732007-07-05 19:55:38 +0200213#define TGSI_EXEC_TEMP_ONE_C 0
214
Brian Paulf042d662008-07-03 12:56:33 -0600215#define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1)
michalffe58732007-07-05 19:55:38 +0200216#define TGSI_EXEC_TEMP_TWO_C 1
217
Brian Paulf042d662008-07-03 12:56:33 -0600218#define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1)
michalffe58732007-07-05 19:55:38 +0200219#define TGSI_EXEC_TEMP_128_C 2
220
Brian Paulf042d662008-07-03 12:56:33 -0600221#define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1)
michalffe58732007-07-05 19:55:38 +0200222#define TGSI_EXEC_TEMP_MINUS_128_C 3
223
Brian Paulf042d662008-07-03 12:56:33 -0600224#define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2)
michalffe58732007-07-05 19:55:38 +0200225#define TGSI_EXEC_TEMP_KILMASK_C 0
226
Brian Paulf042d662008-07-03 12:56:33 -0600227#define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2)
michalffe58732007-07-05 19:55:38 +0200228#define TGSI_EXEC_TEMP_OUTPUT_C 1
229
Brian Paulf042d662008-07-03 12:56:33 -0600230#define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
michalffe58732007-07-05 19:55:38 +0200231#define TGSI_EXEC_TEMP_PRIMITIVE_C 2
232
Michal Krolf93d6f92010-11-04 11:51:10 +0100233#define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
234#define TGSI_EXEC_TEMP_THREE_C 3
michalffe58732007-07-05 19:55:38 +0200235
Brian Paulf042d662008-07-03 12:56:33 -0600236#define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
Michal Krolf93d6f92010-11-04 11:51:10 +0100237#define TGSI_EXEC_TEMP_HALF_C 0
Keith Whitwell17058e02008-05-02 16:02:18 +0200238
Keith Whitwell7fb70272009-07-15 23:59:55 +0100239/* 4 register buffer for various purposes */
Brian Paulf042d662008-07-03 12:56:33 -0600240#define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)
Keith Whitwell7fb70272009-07-15 23:59:55 +0100241#define TGSI_EXEC_NUM_TEMP_R 4
Keith Whitwell17058e02008-05-02 16:02:18 +0200242
Keith Whitwell7fb70272009-07-15 23:59:55 +0100243#define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
Dave Airlie1ff4cc02016-03-21 08:51:54 +1000244#define TGSI_EXEC_NUM_ADDRS 3
Michal Krolaa2b2e52009-11-02 09:41:40 +0000245
246/* predicate register */
Dave Airlie1ff4cc02016-03-21 08:51:54 +1000247#define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 11)
Michal Krolaa2b2e52009-11-02 09:41:40 +0000248#define TGSI_EXEC_NUM_PREDS 1
249
Dave Airlie1ff4cc02016-03-21 08:51:54 +1000250#define TGSI_EXEC_NUM_TEMP_EXTRAS 12
Keith Whitwell7fb70272009-07-15 23:59:55 +0100251
Brian Paulf042d662008-07-03 12:56:33 -0600252
michalffe58732007-07-05 19:55:38 +0200253
José Fonseca7b5931b2010-05-12 14:10:10 +0100254#define TGSI_EXEC_MAX_NESTING 32
255#define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
256#define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
257#define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
258#define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
Brianfc38c822007-09-28 21:04:34 -0600259
Michal Krol26c85932008-11-12 23:23:49 +0100260/* The maximum number of input attributes per vertex. For 2D
261 * input register files, this is the stride between two 1D
262 * arrays.
263 */
Marek Olšák77a78c62015-06-25 00:56:32 +0200264#define TGSI_EXEC_MAX_INPUT_ATTRIBS 32
Michal Krol26c85932008-11-12 23:23:49 +0100265
Marek Olšák04f2c882014-07-24 20:32:08 +0200266/* The maximum number of bytes per constant buffer.
Michal Krol26c85932008-11-12 23:23:49 +0100267 */
Marek Olšák04f2c882014-07-24 20:32:08 +0200268#define TGSI_EXEC_MAX_CONST_BUFFER_SIZE (4096 * sizeof(float[4]))
Michal Krol26c85932008-11-12 23:23:49 +0100269
Zack Rusin89d85772009-12-14 17:11:46 -0500270/* The maximum number of vertices per primitive */
271#define TGSI_MAX_PRIM_VERTICES 6
272
273/* The maximum number of primitives to be generated */
274#define TGSI_MAX_PRIMITIVES 64
275
276/* The maximum total number of vertices */
277#define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
Brian Pauld78a1962009-09-10 12:44:28 -0600278
Brian Paul859f45a2010-12-08 18:19:14 -0700279#define TGSI_MAX_MISC_INPUTS 8
280
Brian Pauld78a1962009-09-10 12:44:28 -0600281/** function call/activation record */
282struct tgsi_call_record
283{
284 uint CondStackTop;
285 uint LoopStackTop;
286 uint ContStackTop;
Michal Krol062aab92010-01-01 23:44:00 +0100287 int SwitchStackTop;
288 int BreakStackTop;
Brian Pauld78a1962009-09-10 12:44:28 -0600289 uint ReturnAddr;
290};
291
Michal Krol062aab92010-01-01 23:44:00 +0100292
293/* Switch-case block state. */
294struct tgsi_switch_record {
295 uint mask; /**< execution mask */
296 union tgsi_exec_channel selector; /**< a value case statements are compared to */
297 uint defaultMask; /**< non-execute mask for default case */
298};
299
300
301enum tgsi_break_type {
302 TGSI_EXEC_BREAK_INSIDE_LOOP,
303 TGSI_EXEC_BREAK_INSIDE_SWITCH
304};
305
306
307#define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
308
309
Brian78f3cd12007-09-29 10:43:29 -0600310/**
311 * Run-time virtual machine state for executing TGSI shader.
312 */
michalffe58732007-07-05 19:55:38 +0200313struct tgsi_exec_machine
314{
Brian Paulf042d662008-07-03 12:56:33 -0600315 /* Total = program temporaries + internal temporaries
michalffe58732007-07-05 19:55:38 +0200316 */
Keith Whitwell61756532009-07-15 23:44:53 +0100317 struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS +
318 TGSI_EXEC_NUM_TEMP_EXTRAS];
michalffe58732007-07-05 19:55:38 +0200319
Keith Whitwell61756532009-07-15 23:44:53 +0100320 float Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
321
Zack Rusin2b221e12010-06-18 09:39:16 -0400322 float ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
323
Zack Rusinff2a0fa2011-03-01 22:50:42 -0500324 struct tgsi_exec_vector *Inputs;
325 struct tgsi_exec_vector *Outputs;
Keith Whitwell4e3002b2009-07-16 00:23:33 +0100326
Brian Paul859f45a2010-12-08 18:19:14 -0700327 /* System values */
328 unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
Dave Airlie34a78b72012-01-05 16:59:24 +0000329 union tgsi_exec_channel SystemValue[TGSI_MAX_MISC_INPUTS];
Brian Paul859f45a2010-12-08 18:19:14 -0700330
michalffe58732007-07-05 19:55:38 +0200331 struct tgsi_exec_vector *Addrs;
Michal Krol0c54d762009-11-24 09:03:41 +0100332 struct tgsi_exec_vector *Predicates;
michalffe58732007-07-05 19:55:38 +0200333
Roland Scheidegger6b35c2b2013-02-27 19:07:18 +0100334 struct tgsi_sampler *Sampler;
michalffe58732007-07-05 19:55:38 +0200335
Dave Airlie22d12962016-03-22 07:53:48 +1000336 struct tgsi_image *Image;
michal058b9782007-08-15 18:16:11 +0100337 unsigned ImmLimit;
Brian Paulba2cc3b2010-07-29 13:49:21 -0600338
Michal Krol7c5f2552010-01-25 13:29:33 +0100339 const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
Brian Paulba2cc3b2010-07-29 13:49:21 -0600340 unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
341
Brian Paul0f82aa52009-03-22 18:10:10 -0600342 const struct tgsi_token *Tokens; /**< Declarations, instructions */
343 unsigned Processor; /**< TGSI_PROCESSOR_x */
michalffe58732007-07-05 19:55:38 +0200344
michal058b9782007-08-15 18:16:11 +0100345 /* GEOMETRY processor only. */
346 unsigned *Primitives;
Zack Rusin89d85772009-12-14 17:11:46 -0500347 unsigned NumOutputs;
348 unsigned MaxGeometryShaderOutputs;
Dave Airliea4670de2014-06-11 11:38:19 +1000349 unsigned MaxOutputVertices;
michal058b9782007-08-15 18:16:11 +0100350
351 /* FRAGMENT processor only. */
352 const struct tgsi_interp_coef *InterpCoefs;
Briane785f192007-12-14 11:00:46 -0700353 struct tgsi_exec_vector QuadPos;
Michal Krolcc35a452009-11-23 10:49:41 +0100354 float Face; /**< +1 if front facing, -1 if back facing */
Dave Airlie67e3cbf2012-01-09 15:57:02 +0000355 bool flatshade_color;
Dave Airlie827393b2016-03-22 07:50:37 +1000356
357 /* See GLSL 4.50 specification for definition of helper invocations */
358 uint NonHelperMask; /**< non-helpers */
Brian78f3cd12007-09-29 10:43:29 -0600359 /* Conditional execution masks */
Brian53a6a552007-10-02 16:05:07 -0600360 uint CondMask; /**< For IF/ELSE/ENDIF */
361 uint LoopMask; /**< For BGNLOOP/ENDLOOP */
362 uint ContMask; /**< For loop CONT statements */
Brianaec1f8e2007-10-09 14:40:11 -0600363 uint FuncMask; /**< For function calls */
Brian78f3cd12007-09-29 10:43:29 -0600364 uint ExecMask; /**< = CondMask & LoopMask */
Brianfc38c822007-09-28 21:04:34 -0600365
Michal Krol062aab92010-01-01 23:44:00 +0100366 /* Current switch-case state. */
367 struct tgsi_switch_record Switch;
368
369 /* Current break type. */
370 enum tgsi_break_type BreakType;
371
Brian78f3cd12007-09-29 10:43:29 -0600372 /** Condition mask stack (for nested conditionals) */
373 uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
Brianfc38c822007-09-28 21:04:34 -0600374 int CondStackTop;
Brian78f3cd12007-09-29 10:43:29 -0600375
376 /** Loop mask stack (for nested loops) */
377 uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
378 int LoopStackTop;
Brian57d37702007-10-02 10:38:56 -0600379
Keith Whitwell848ab8b2009-09-03 15:16:25 +0100380 /** Loop label stack */
381 uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
382 int LoopLabelStackTop;
383
Brian53a6a552007-10-02 16:05:07 -0600384 /** Loop continue mask stack (see comments in tgsi_exec.c) */
385 uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
386 int ContStackTop;
387
Michal Krol062aab92010-01-01 23:44:00 +0100388 /** Switch case stack */
389 struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
390 int SwitchStackTop;
391
392 enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
393 int BreakStackTop;
394
Brianaec1f8e2007-10-09 14:40:11 -0600395 /** Function execution mask stack (for executing subroutine code) */
396 uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
397 int FuncStackTop;
398
399 /** Function call stack for saving/restoring the program counter */
Brian Pauld78a1962009-09-10 12:44:28 -0600400 struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
Brian4ad80ad2007-10-02 14:05:21 -0600401 int CallStackTop;
402
Brian57d37702007-10-02 10:38:56 -0600403 struct tgsi_full_instruction *Instructions;
404 uint NumInstructions;
405
406 struct tgsi_full_declaration *Declarations;
407 uint NumDeclarations;
Brian0d13ade2007-10-02 11:46:11 -0600408
Francisco Jereza5f44cc2012-05-01 02:38:51 +0200409 struct tgsi_declaration_sampler_view
410 SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
Zack Rusinff2a0fa2011-03-01 22:50:42 -0500411
412 boolean UsedGeometryShader;
michalffe58732007-07-05 19:55:38 +0200413};
414
Keith Whitwell61756532009-07-15 23:44:53 +0100415struct tgsi_exec_machine *
416tgsi_exec_machine_create( void );
417
michalffe58732007-07-05 19:55:38 +0200418void
Keith Whitwell61756532009-07-15 23:44:53 +0100419tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
Keith Whitwellc04a7f82008-02-15 09:31:22 +0000420
421
422void
423tgsi_exec_machine_bind_shader(
michalffe58732007-07-05 19:55:38 +0200424 struct tgsi_exec_machine *mach,
michal058b9782007-08-15 18:16:11 +0100425 const struct tgsi_token *tokens,
Dave Airlie22d12962016-03-22 07:53:48 +1000426 struct tgsi_sampler *sampler,
427 struct tgsi_image *image);
michalffe58732007-07-05 19:55:38 +0200428
Brian355f8f72007-10-02 19:16:57 -0600429uint
michalffe58732007-07-05 19:55:38 +0200430tgsi_exec_machine_run(
431 struct tgsi_exec_machine *mach );
432
Brianeba2e042007-12-24 17:37:59 -0700433
Brian Paul013bd4d2009-08-20 10:28:22 -0600434void
435tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
436
437
438boolean
439tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
440
441
Brian Paulba2cc3b2010-07-29 13:49:21 -0600442extern void
443tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
444 unsigned num_bufs,
445 const void **bufs,
446 const unsigned *buf_sizes);
447
448
Ilia Mirkina2a1a582015-07-20 19:58:43 -0400449static inline int
Luca Barbieria508d2d2010-09-05 20:50:50 +0200450tgsi_exec_get_shader_param(enum pipe_shader_cap param)
451{
452 switch(param) {
453 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
454 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
455 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
456 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
457 return INT_MAX;
458 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
459 return TGSI_EXEC_MAX_NESTING;
460 case PIPE_SHADER_CAP_MAX_INPUTS:
461 return TGSI_EXEC_MAX_INPUT_ATTRIBS;
Marek Olšák5f5b83c2014-10-01 20:28:17 +0200462 case PIPE_SHADER_CAP_MAX_OUTPUTS:
463 return 32;
Marek Olšák04f2c882014-07-24 20:32:08 +0200464 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
465 return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
Luca Barbieria508d2d2010-09-05 20:50:50 +0200466 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
467 return PIPE_MAX_CONSTANT_BUFFERS;
468 case PIPE_SHADER_CAP_MAX_TEMPS:
469 return TGSI_EXEC_NUM_TEMPS;
Luca Barbieria508d2d2010-09-05 20:50:50 +0200470 case PIPE_SHADER_CAP_MAX_PREDS:
471 return TGSI_EXEC_NUM_PREDS;
472 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
473 return 1;
Marek Olšák53b7ec92010-11-12 03:03:04 +0100474 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
475 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
476 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
477 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
478 return 1;
Marek Olšák9aa089e2010-11-14 15:34:59 +0100479 case PIPE_SHADER_CAP_SUBROUTINES:
480 return 1;
Bryan Cain17b695e2011-05-05 21:10:28 -0500481 case PIPE_SHADER_CAP_INTEGERS:
482 return 1;
Marek Olšákf5bfe542011-09-27 22:22:06 +0200483 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
484 return PIPE_MAX_SAMPLERS;
Brian Paul9b1ae442014-05-05 10:18:49 -0600485 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
486 return PIPE_MAX_SHADER_SAMPLER_VIEWS;
487 case PIPE_SHADER_CAP_PREFERRED_IR:
488 return PIPE_SHADER_IR_TGSI;
Samuel Pitoiset5e09ac72016-02-03 18:57:58 +0100489 case PIPE_SHADER_CAP_SUPPORTED_IRS:
490 return 1 << PIPE_SHADER_IR_TGSI;
Brian Paulad30e452013-02-01 11:15:43 -0700491 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
492 return 1;
Tom Stellardfea996c2014-06-17 08:52:34 -0700493 case PIPE_SHADER_CAP_DOUBLES:
Ilia Mirkin924ee3f2014-07-25 17:48:01 -0400494 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
Marek Olšákb6ebe7e2015-05-25 19:30:44 +0200495 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
Dave Airlie0e828172014-08-14 18:40:41 +1000496 return 1;
Ilia Mirkin899d7792014-07-25 17:03:33 -0400497 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
Marek Olšák216543e2015-02-28 00:26:31 +0100498 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
Ilia Mirkin266d0012015-09-26 20:27:42 -0400499 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
Ilia Mirkin899d7792014-07-25 17:03:33 -0400500 return 0;
Dave Airlieeb9ad9f2016-03-22 07:59:35 +1000501 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
502 return PIPE_MAX_SHADER_IMAGES;
503
Marek Olšák814f3142015-10-20 18:26:02 +0200504 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
505 return 32;
Luca Barbieria508d2d2010-09-05 20:50:50 +0200506 }
Brian Paul9b1ae442014-05-05 10:18:49 -0600507 /* if we get here, we missed a shader cap above (and should have seen
508 * a compiler warning.)
509 */
510 return 0;
Luca Barbieria508d2d2010-09-05 20:50:50 +0200511}
512
michalffe58732007-07-05 19:55:38 +0200513#if defined __cplusplus
Brian79d8e782007-10-27 09:43:28 -0600514} /* extern "C" */
515#endif
michalffe58732007-07-05 19:55:38 +0200516
Brian79d8e782007-10-27 09:43:28 -0600517#endif /* TGSI_EXEC_H */