Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2019 Collabora, Ltd. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | */ |
| 23 | |
| 24 | #ifndef __PANFROST_QUIRKS_H |
| 25 | #define __PANFROST_QUIRKS_H |
| 26 | |
| 27 | /* Model-specific quirks requiring workarounds/etc. Quirks may be errata |
| 28 | * requiring a workaround, or features. We're trying to be quirk-positive |
| 29 | * here; quirky is the best! */ |
| 30 | |
| 31 | /* Whether the GPU lacks the capability for hierarchical tiling, without an |
| 32 | * "Advanced Tiling Unit", instead requiring a single bin size for the entire |
| 33 | * framebuffer be selected by the driver */ |
| 34 | |
| 35 | #define MIDGARD_NO_HIER_TILING (1 << 0) |
| 36 | |
| 37 | /* Whether this GPU lacks native multiple render target support and accordingly |
| 38 | * needs SFBDs instead, with complex lowering with ES3 */ |
| 39 | |
| 40 | #define MIDGARD_SFBD (1 << 1) |
| 41 | |
Alyssa Rosenzweig | c2a8ef9 | 2020-03-27 14:39:39 -0400 | [diff] [blame] | 42 | /* Whether fp16 is broken in the compiler. Hopefully this quirk will go away |
| 43 | * over time */ |
| 44 | |
| 45 | #define MIDGARD_BROKEN_FP16 (1 << 2) |
| 46 | |
Alyssa Rosenzweig | b096a1d | 2020-04-06 16:44:04 -0400 | [diff] [blame] | 47 | /* What it says on the tin */ |
| 48 | #define IS_BIFROST (1 << 3) |
| 49 | |
Tomeu Vizoso | c4400b0 | 2020-05-01 07:36:31 +0200 | [diff] [blame] | 50 | /* What it says on the tin */ |
| 51 | #define HAS_SWIZZLES (1 << 4) |
| 52 | |
Alyssa Rosenzweig | a0857e9 | 2020-08-21 09:22:34 -0400 | [diff] [blame] | 53 | /* bit 5 unused */ |
Alyssa Rosenzweig | 1085f74 | 2020-05-21 15:49:30 -0400 | [diff] [blame] | 54 | |
Alyssa Rosenzweig | e53d27d | 2020-05-13 12:15:28 -0400 | [diff] [blame] | 55 | /* Whether this GPU lacks support for any typed stores in blend shader, |
| 56 | * requiring packing instead */ |
| 57 | #define MIDGARD_NO_TYPED_BLEND_STORES (1 << 6) |
| 58 | |
| 59 | /* Whether this GPU lacks support for any typed loads, requiring packing */ |
| 60 | #define MIDGARD_NO_TYPED_BLEND_LOADS (1 << 7) |
| 61 | |
| 62 | /* Lack support for colour pack/unpack opcodes */ |
| 63 | #define NO_BLEND_PACKS (1 << 8) |
| 64 | |
| 65 | /* Has some missing formats for typed loads */ |
| 66 | #define MIDGARD_MISSING_LOADS (1 << 9) |
| 67 | |
Alyssa Rosenzweig | acb8dcf | 2020-07-21 12:34:33 -0400 | [diff] [blame] | 68 | /* Lack support for AFBC */ |
| 69 | #define MIDGARD_NO_AFBC (1 << 10) |
| 70 | |
Alyssa Rosenzweig | 97029c7 | 2020-03-24 13:53:18 -0400 | [diff] [blame] | 71 | /* Quirk collections common to particular uarchs */ |
| 72 | |
Alyssa Rosenzweig | e53d27d | 2020-05-13 12:15:28 -0400 | [diff] [blame] | 73 | #define MIDGARD_QUIRKS (MIDGARD_BROKEN_FP16 | HAS_SWIZZLES \ |
| 74 | | MIDGARD_NO_TYPED_BLEND_STORES \ |
| 75 | | MIDGARD_MISSING_LOADS) |
Alyssa Rosenzweig | 97029c7 | 2020-03-24 13:53:18 -0400 | [diff] [blame] | 76 | |
Alyssa Rosenzweig | acb8dcf | 2020-07-21 12:34:33 -0400 | [diff] [blame] | 77 | /* TODO: AFBC on Bifrost */ |
| 78 | #define BIFROST_QUIRKS (IS_BIFROST | NO_BLEND_PACKS | MIDGARD_NO_AFBC) |
Alyssa Rosenzweig | 97029c7 | 2020-03-24 13:53:18 -0400 | [diff] [blame] | 79 | |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 80 | static inline unsigned |
| 81 | panfrost_get_quirks(unsigned gpu_id) |
| 82 | { |
| 83 | switch (gpu_id) { |
| 84 | case 0x600: |
| 85 | case 0x620: |
Alyssa Rosenzweig | e53d27d | 2020-05-13 12:15:28 -0400 | [diff] [blame] | 86 | return MIDGARD_QUIRKS | MIDGARD_SFBD |
| 87 | | MIDGARD_NO_TYPED_BLEND_LOADS |
Alyssa Rosenzweig | acb8dcf | 2020-07-21 12:34:33 -0400 | [diff] [blame] | 88 | | NO_BLEND_PACKS | MIDGARD_NO_AFBC; |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 89 | |
| 90 | case 0x720: |
Alyssa Rosenzweig | acb8dcf | 2020-07-21 12:34:33 -0400 | [diff] [blame] | 91 | return MIDGARD_QUIRKS | MIDGARD_SFBD | MIDGARD_NO_HIER_TILING |
| 92 | | MIDGARD_NO_AFBC; |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 93 | |
| 94 | case 0x820: |
| 95 | case 0x830: |
Alyssa Rosenzweig | 97029c7 | 2020-03-24 13:53:18 -0400 | [diff] [blame] | 96 | return MIDGARD_QUIRKS | MIDGARD_NO_HIER_TILING; |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 97 | |
| 98 | case 0x750: |
Alyssa Rosenzweig | e53d27d | 2020-05-13 12:15:28 -0400 | [diff] [blame] | 99 | /* Someone should investigate the broken loads? */ |
| 100 | return MIDGARD_QUIRKS | MIDGARD_NO_TYPED_BLEND_LOADS |
Alyssa Rosenzweig | a0857e9 | 2020-08-21 09:22:34 -0400 | [diff] [blame] | 101 | | NO_BLEND_PACKS; |
Alyssa Rosenzweig | e53d27d | 2020-05-13 12:15:28 -0400 | [diff] [blame] | 102 | |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 103 | case 0x860: |
| 104 | case 0x880: |
Alyssa Rosenzweig | a0857e9 | 2020-08-21 09:22:34 -0400 | [diff] [blame] | 105 | return MIDGARD_QUIRKS; |
Alyssa Rosenzweig | 97029c7 | 2020-03-24 13:53:18 -0400 | [diff] [blame] | 106 | |
Tomeu Vizoso | c4400b0 | 2020-05-01 07:36:31 +0200 | [diff] [blame] | 107 | case 0x6000: /* G71 */ |
Boris Brezillon | fefb3e9 | 2020-09-23 11:08:02 +0200 | [diff] [blame^] | 108 | case 0x6221: /* G72 */ |
Tomeu Vizoso | c4400b0 | 2020-05-01 07:36:31 +0200 | [diff] [blame] | 109 | return BIFROST_QUIRKS | HAS_SWIZZLES; |
| 110 | |
Alyssa Rosenzweig | 97029c7 | 2020-03-24 13:53:18 -0400 | [diff] [blame] | 111 | case 0x7093: /* G31 */ |
| 112 | case 0x7212: /* G52 */ |
| 113 | return BIFROST_QUIRKS; |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 114 | |
| 115 | default: |
Alyssa Rosenzweig | 97029c7 | 2020-03-24 13:53:18 -0400 | [diff] [blame] | 116 | unreachable("Unknown Panfrost GPU ID"); |
Tomeu Vizoso | 6887ff4 | 2019-11-28 10:21:06 +0100 | [diff] [blame] | 117 | } |
| 118 | } |
| 119 | |
| 120 | #endif |