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1877982aca7d50541618a8997fdd72c5286b4b67
1877982
i965: enable OpenGL 4.2 in Ivybridge
by Juan A. Suarez Romero
· 8 years ago
92d4dc7
i965: enable ARB_shader_precision in gen7+
by Samuel Iglesias Gonsálvez
· 8 years ago
0aed121
i965: enable ARB_vertex_attrib_64bit for gen7+
by Juan A. Suarez Romero
· 8 years ago
b9d4256
swr: Fix swr osmesa build
by George Kyriazis
· 8 years ago
6a8d5ab
etnaviv: SINGLE_BUFFER support on GC3000
by Wladimir J. van der Laan
· 8 years ago
1dcb1d4
etnaviv: Update includes from rnndb
by Wladimir J. van der Laan
· 8 years ago
9e4d049
etnaviv: Add chipMinorFeatures4 and 5
by Wladimir J. van der Laan
· 8 years ago
dda9563
etnaviv: resolve tile status when flushing resource
by Philipp Zabel
· 8 years ago
f30aab7
etnaviv: stop repeatedly resolving an unchanged resource into its scanout prime buffer
by Philipp Zabel
· 8 years ago
d7a1f01
swr: Add polygon stipple support
by George Kyriazis
· 8 years ago
8973ae3
docs/relnotes: add GL_ARB_gpu_shader_fp64 support on i965/ivybridge
by Samuel Iglesias Gonsálvez
· 8 years ago
ef49dda
docs: mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as supported by i965/gen7+
by Samuel Iglesias Gonsálvez
· 8 years ago
a494afd
i965: enable OpenGL 4.0 to Ivybridge/Baytrail
by Samuel Iglesias Gonsálvez
· 8 years ago
cd0a6b2
i965: enable ARB_gpu_shader_fp64 for Ivybridge/Baytrail
by Samuel Iglesias Gonsálvez
· 8 years ago
2eeb1b0
i965: Use correct VertStride on align16 instructions.
by Matt Turner
· 8 years ago
d8441e2
i965/vec4/dce: improve track of partial flag register writes
by Samuel Iglesias Gonsálvez
· 8 years ago
c1fc8fa
i965/vec4: don't do horizontal stride on some register file types
by Samuel Iglesias Gonsálvez
· 8 years ago
21e8e3a
i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.
by Matt Turner
· 8 years ago
f030aaf
i965/vec4: use vec4_builder to emit instructions in setup_imm_df()
by Samuel Iglesias Gonsálvez
· 8 years ago
a907c91
i965/vec4: consider subregister offset in live variables
by Juan A. Suarez Romero
· 8 years ago
92649a3
i965/vec4: fix assert to detect SIMD lowered DF instructions in IVB
by Francisco Jerez
· 8 years ago
6e3265e
i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type
by Samuel Iglesias Gonsálvez
· 8 years ago
50a5217
i965/vec4: split d2x conversion and data gathering from one opcode to two explicit ones
by Samuel Iglesias Gonsálvez
· 8 years ago
cfaf14a
i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYT
by Juan A. Suarez Romero
· 8 years ago
be445d3
i965/vec4: keep original type when dealing with null registers
by Juan A. Suarez Romero
· 8 years ago
a21dc2b
i965/vec4: split DF instructions and later double its execsize in IVB/BYT
by Samuel Iglesias Gonsálvez
· 8 years ago
a5399e8
i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYT
by Samuel Iglesias Gonsálvez
· 8 years ago
ebfb703
i965/fs: Get 64-bit indirect moves working on IVB.
by Francisco Jerez
· 8 years ago
630b84c
i965: Use source region <1,2,0> when converting to DF.
by Matt Turner
· 8 years ago
3198ce3
i965/fs: fix lower SIMD width for IVB/BYT's MOV_INDIRECT
by Juan A. Suarez Romero
· 8 years ago
571cbd0
i965/fs: fix dst stride in IVB/BYT type conversions
by Juan A. Suarez Romero
· 8 years ago
af6fc3a
i965/fs: rename lower_d2x to lower_conversions
by Samuel Iglesias Gonsálvez
· 8 years ago
dee3131
Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."
by Samuel Iglesias Gonsálvez
· 8 years ago
aeecc82
i965/fs: generalize the legalization d2x pass
by Samuel Iglesias Gonsálvez
· 8 years ago
94ffeb7
i965: Use <0,2,1> region for scalar DF sources on IVB/BYT.
by Matt Turner
· 8 years ago
82d1761
i965/fs: clamp exec_size when an instruction has a scalar DF source
by Samuel Iglesias Gonsálvez
· 8 years ago
0f1316d
i965/fs: double regioning parameters and execsize for DF in IVB/BYT
by Juan A. Suarez Romero
· 8 years ago
79af256
i965/fs: add helper to retrieve instruction execution type
by Juan A. Suarez Romero
· 8 years ago
fd349d2
i965: Handle IVB DF differences in the validator.
by Matt Turner
· 8 years ago
fbac8b1
i965/disasm: also print nibctrl in IVB for execsize=8
by Iago Toral Quiroga
· 8 years ago
ff29f48
nir: Destination component count of shader_clock intrinsic is 2
by Boyan Ding
· 8 years ago
39f51b5
radeonsi: add missing initialization for userptr buffers
by Nicolai Hähnle
· 8 years ago
c1dd5d0
radv: remove the temp descriptor set infrastructure
by Fredrik Höglund
· 8 years ago
5ab5d1b
radv: use push descriptors in meta
by Fredrik Höglund
· 8 years ago
f95caae
radv: add private push descriptors for meta
by Fredrik Höglund
· 8 years ago
220974b
anv/blorp: Properly handle VK_ATTACHMENT_UNUSED
by Jason Ekstrand
· 8 years ago
21d2ca7
anv/cmd_buffer: Use the null surface state for ATTACHMENT_UNUSED
by Jason Ekstrand
· 8 years ago
02eca8b
anv/cmd_buffer: Always set up a null surface state
by Jason Ekstrand
· 8 years ago
d6588d9
radeonsi: cope with missing disassembly
by Nicolai Hähnle
· 8 years ago
d15b1f6
gallium/ddebug: dump missing members of pipe_draw_info
by Nicolai Hähnle
· 8 years ago
2ac03e9
radeonsi: enable ARB_shader_viewport_layer_array
by Nicolai Hähnle
· 8 years ago
d5e53f3
radeonsi: handle ignored LAYER and VIEWPORT_INDEX writes
by Nicolai Hähnle
· 8 years ago
4127f38
st/mesa: enable ARB_shader_viewport_layer_array
by Nicolai Hähnle
· 8 years ago
f3d2cf6
tgsi: clarify TGSI_SEMANTIC_{LAYER,VIEWPORT_INDEX}
by Nicolai Hähnle
· 8 years ago
17f24a9
gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORT
by Nicolai Hähnle
· 8 years ago
8b5d477
configure.ac: add --enable-sanitize option
by Nicolai Hähnle
· 8 years ago
e1f6fb8
anv/cmd_buffer: Flush the VF cache at the top of all primaries
by Jason Ekstrand
· 8 years ago
939337e
anv/blorp: Flush the texture cache in UpdateBuffer
by Jason Ekstrand
· 8 years ago
475bab0
anv: Limit VkDeviceMemory objects to 2GB
by Jason Ekstrand
· 8 years ago
4495b91
intel/blorp: Add a blorp_emit_dynamic macro
by Jason Ekstrand
· 8 years ago
1832ef6
swr: Enable MSAA in OpenSWR software renderer
by Bruce Cherniak
· 8 years ago
91a7f0b
swr: Removed unnecessary PIPE_BIND flags from swr_is_format_supported
by Bruce Cherniak
· 8 years ago
97bbb7b
swr: Align swr_context allocation to SIMD alignment.
by Bruce Cherniak
· 8 years ago
4dcfa83
swr: update gallium driver docs
by Tim Rowley
· 8 years ago
bffdb43
radv: remove irrelevant comment
by Grazvydas Ignotas
· 8 years ago
1b2fe7c
radv: report timestampPeriod correctly
by Grazvydas Ignotas
· 8 years ago
9fc3e71
nir/print: add compute shader info
by Rob Clark
· 8 years ago
16d493f
gallium/docs: small correction about register files for atomics
by Rob Clark
· 8 years ago
0b613c2
freedreno: enable draw/batch reordering by default
by Rob Clark
· 8 years ago
b5cc88a
freedreno/ir3: small re-order
by Rob Clark
· 8 years ago
75afd25
freedreno/ir3: move 'keeps' to block level
by Rob Clark
· 8 years ago
331bd3b
freedreno/ir3: convert dynamic arrays to ralloc
by Rob Clark
· 8 years ago
870760e
swr: add linux to scons build
by George Kyriazis
· 8 years ago
e20eb91
radv: make sizes & offsets 32 bit in radv_descriptor_update_template_entry.
by Bas Nieuwenhuizen
· 8 years ago
7c83d44
docs: Update MESA_shader_integer_functions spec to version 3.
by Kenneth Graunke
· 8 years ago
17a75b4
radv: Set descriptor set limits.
by Bas Nieuwenhuizen
· 8 years ago
24ccf1a
radv: Increase integer sizes in descriptor sets.
by Bas Nieuwenhuizen
· 8 years ago
58dd57c
radv: support S8_UINT as a depth/stencil format.
by Dave Airlie
· 8 years ago
16b2dc0
radv: bump maxGeometryShaderInvocations.
by Dave Airlie
· 8 years ago
442780e
st/nine: Fix support for ps 1.4 dw and dz modifiers
by Axel Davy
· 8 years ago
d8ffe4d
clover: Add missing include to compat header
by Jan Vesely
· 8 years ago
b52721e
gallium/radeon: never use staging buffers with AMD_pinned_memory
by Nicolai Hähnle
· 8 years ago
4f7e3fb
radeonsi: fix gl_BaseVertex in non-indexed draws
by Nicolai Hähnle
· 8 years ago
472c84d
radeonsi: provide VS_STATE input to all VS variants
by Nicolai Hähnle
· 8 years ago
3b9fbcb
radeonsi: change the bit-packing of LS out/TCS in data
by Nicolai Hähnle
· 8 years ago
ff39f0d
radeonsi: emit VS_STATE register explicitly from si_draw_vbo
by Nicolai Hähnle
· 8 years ago
8c224d3
radeonsi: extract derived tess state emit to higher level
by Nicolai Hähnle
· 8 years ago
215ceb3
radeonsi: drop support for TGSI_SEMANTIC_VERTEXID_NOBASE
by Nicolai Hähnle
· 8 years ago
4f7fb25
radv: Add more trace points.
by Bas Nieuwenhuizen
· 8 years ago
8a535a8
radv: Ignore CmdUpdateBuffer with size 0.
by Bas Nieuwenhuizen
· 8 years ago
04c7452
radv: Enable query inheritance.
by Bas Nieuwenhuizen
· 8 years ago
c3f38c8
radv: enable variableMultisampleRate.
by Bas Nieuwenhuizen
· 8 years ago
5589fd8
gallium/hud: set the dump file streams to line buffered
by Edmondo Tommasina
· 8 years ago
01d0c5a
radv: fix stencil regression since new addrlib import
by Dave Airlie
· 8 years ago
4bcebe1
radv: allocate thin textures as linear.
by Dave Airlie
· 8 years ago
9ced105
i965: add missing ir_unop_*/ir_binop_* in visit_leave()
by Samuel Pitoiset
· 8 years ago
b6b566b
st/mesa: fix wrong comparison in update_framebuffer_state()
by Samuel Pitoiset
· 8 years ago
a18bd13
radeon: fix duplicate 'const' specifier
by Samuel Pitoiset
· 8 years ago
ede2734
svga: remove unused vmw_dri1_intersect_src_bbox()
by Samuel Pitoiset
· 8 years ago
fbe2ff7
llvmpipe: remove unused subpixel_snap() and fixed_to_float()
by Samuel Pitoiset
· 8 years ago
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