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467f9982dfc1118ac0c47b95320c94793ba37aa5
467f998
turnip: fix segmentation fault with compute pipeline
by Jonathan Marek
· 5 years ago
eef195c
turnip: fix segmentation fault in events
by Jonathan Marek
· 5 years ago
03772df
turnip: fix 32 vertex attributes case
by Jonathan Marek
· 5 years ago
8580726
turnip: fix triangle strip
by Jonathan Marek
· 5 years ago
b709388
freedreno/regs: update a6xx 2d blit bits
by Jonathan Marek
· 5 years ago
50c8c41
radv: rename VK_KHR_shader_float16_int8 structs/constants
by Samuel Pitoiset
· 5 years ago
e353656
v3d: drop unused shader_rec_count member from context
by Iago Toral
· 5 years ago
278c9b5
freedreno/ir3: implement fquantize2f16
by Jonathan Marek
· 5 years ago
92d756f
freedreno/ir3: implement texop_texture_samples
by Jonathan Marek
· 5 years ago
3cfd5ff
freedreno/ir3: fix GETLOD for negative LODs
by Jonathan Marek
· 5 years ago
cfc6a3e
freedreno/ir3: implement fdd{x,y}_coarse opcodes
by Jonathan Marek
· 5 years ago
b094b38
freedreno/ir3: increase size of inputs/outputs arrays
by Jonathan Marek
· 5 years ago
08003c3
freedreno/ir3: remove input ncomp field
by Jonathan Marek
· 5 years ago
ce23bc9
etnaviv: fix vertex buffer state emission for single stream GPUs
by Lucas Stach
· 5 years ago
c2efc7c
gallivm/draw/swr: make the gs_iface not depend on tgsi.
by Dave Airlie
· 5 years ago
ac7af7c
iris: Implement the Gen < 9 tessellation quads workaround
by Kenneth Graunke
· 5 years ago
58286c7
anv: Advertise VK_KHR_spirv_1_4
by Caio Marcelo de Oliveira Filho
· 5 years ago
90a7893
vulkan: Update the XML and headers to 1.1.125
by Caio Marcelo de Oliveira Filho
· 5 years ago
072c94f
android: amd/common: export amd/llvm headers
by Mauro Rossi
· 5 years ago
4f963b0
gallium: rename PIPE_CAP_MAX_FRAMES_IN_FLIGHT to PIPE_CAP_THROTTLE
by James Xiong
· 5 years ago
a65e29c
gallium: simplify throttle implementation
by James Xiong
· 5 years ago
ea92273
radv: fix DCC fast clear code for intensity formats
by Samuel Pitoiset
· 5 years ago
ebe176e
gbm: use size_t for array indexes
by Eric Engestrom
· 5 years ago
ad7e410
gbm: replace NULL sentinel with explicit ARRAY_SIZE()
by Eric Engestrom
· 5 years ago
0d74f4b
gbm: replace 1/0 bool with true/false
by Eric Engestrom
· 5 years ago
e9d8081
gbm: turn 0/-1 bool into true/false
by Eric Engestrom
· 5 years ago
48289d8
radv: add exported symbols check
by Eric Engestrom
· 6 years ago
960038d
anv: add exported symbols check
by Eric Engestrom
· 6 years ago
f1c2239
symbols-check: ignore exported C++ symbols
by Eric Engestrom
· 5 years ago
35e92a1
panfrost: Fix support for packed 24-bit formats
by Boris Brezillon
· 5 years ago
1294f01
glsl: fix crash compiling bindless samplers inside unnamed UBOs
by Timothy Arceri
· 5 years ago
cece947
glsl/builtin: Add alternate versions of atan using new ops
by Neil Roberts
· 5 years ago
77f3fbb
glsl: Add opcodes for atan and atan2
by Neil Roberts
· 5 years ago
0832845
nir/builtin: Add extern "C" guards to nir_builtin_builder.h
by Neil Roberts
· 5 years ago
9eaeedd
nir/builtin: Add #include u_math.h to the header
by Neil Roberts
· 5 years ago
2098ae1
nir/builder: Move nir_atan and nir_atan2 from SPIR-V translator
by Neil Roberts
· 5 years ago
075a96a
egl: Configs w/o double buffering support have no `EGL_WINDOW_BIT`.
by Hal Gentz
· 5 years ago
a800d16
egl: Puts RGBA visuals in the second config selection group.
by Hal Gentz
· 5 years ago
90a1907
egl: Fixes transparency with EGL and X11.
by Hal Gentz
· 5 years ago
173bc9d
egl: Add EGL_CONFIG_SELECT_GROUP_MESA ext.
by Hal Gentz
· 5 years ago
4475427
intel/fs/gen12: Use TCS 8_PATCH mode.
by Kenneth Graunke
· 6 years ago
c92fb60
intel/fs/gen12: Implement gl_FrontFacing on gen12+.
by Jason Ekstrand
· 6 years ago
ceb123b
intel/fs/gen11+: Fix CS_OPCODE_CS_TERMINATE codegen.
by Francisco Jerez
· 5 years ago
a5efb0e
intel/fs/gen12: Fix barrier codegen.
by Francisco Jerez
· 5 years ago
6b52f81
intel/eu: Don't set notify descriptor field of gateway barrier message.
by Francisco Jerez
· 5 years ago
b0e69d1
intel/ir/gen12: Update assert in brw_stage_has_packed_dispatch().
by Francisco Jerez
· 5 years ago
ca7b6fd
intel/eu/validate/gen12: Don't blow up on indirect src0.
by Jason Ekstrand
· 7 years ago
ab5aa01
intel/eu/validate/gen12: Validation fixes for SEND instruction.
by Francisco Jerez
· 6 years ago
a81f9b5
intel/eu/validate/gen12: Fix validation of SYNC instruction.
by Francisco Jerez
· 6 years ago
45768e6
intel/eu/validate/gen12: Implement integer multiply restrictions in EU validator.
by Francisco Jerez
· 6 years ago
f9ec4ac
intel/ir: Lower fpow on Gen12.
by Jordan Justen
· 7 years ago
cb6db5b
intel/fs/gen12: Don't support source mods for 32x16 integer multiply.
by Francisco Jerez
· 6 years ago
de5d106
intel/disasm: Disassemble register file of split SEND sources.
by Francisco Jerez
· 5 years ago
c038693
intel/disasm: Don't disassemble saturate control on SEND instructions.
by Francisco Jerez
· 5 years ago
f15e0b3
intel/disasm/gen12: Disassemble Gen12 SEND instructions.
by Francisco Jerez
· 5 years ago
fd7e21d
intel/disasm/gen12: Disassemble Gen12 SYNC instruction.
by Francisco Jerez
· 6 years ago
606d823
intel/disasm/gen12: Disassemble three-source instruction source and destination regions.
by Francisco Jerez
· 6 years ago
8263d30
intel/disasm/gen12: Fix disassembly of some common instruction controls.
by Francisco Jerez
· 6 years ago
83612c0
intel/disasm/gen12: Disassemble software scoreboard information.
by Francisco Jerez
· 6 years ago
396f6b2
intel/fs/gen12: Demodernize software scoreboard lowering pass.
by Francisco Jerez
· 5 years ago
265c7c8
intel/fs/gen12: Introduce software scoreboard lowering pass.
by Francisco Jerez
· 6 years ago
e0b8d79
intel/fs/gen12: Add scheduling information to the IR.
by Francisco Jerez
· 6 years ago
15e3a0d
intel/eu/gen12: Set SWSB annotations in hand-crafted assembly.
by Francisco Jerez
· 5 years ago
d3f3bdc
intel/eu/gen12: Add tracking of default SWSB state to the current brw_codegen instruction.
by Francisco Jerez
· 6 years ago
6154cdf
intel/eu/gen12: Add auxiliary type to represent SWSB information during codegen.
by Francisco Jerez
· 6 years ago
c22db5e
intel/fs/gen12: Add codegen support for the SYNC instruction.
by Francisco Jerez
· 5 years ago
0e57dbc
intel/ir/gen12: Add SYNC hardware instruction.
by Francisco Jerez
· 6 years ago
7499e10
intel/eu/gen12: Don't set thread control, it's gone.
by Francisco Jerez
· 5 years ago
a66ea33
intel/eu/gen12: Don't set DD control, it's gone.
by Francisco Jerez
· 6 years ago
8a5fad0
intel/eu/gen12: Use SEND instruction for split sends.
by Francisco Jerez
· 5 years ago
6634ede
intel/eu/gen12: Codegen SEND descriptor regions correctly.
by Francisco Jerez
· 5 years ago
2c4c9ab
intel/eu/gen12: Codegen pathological SEND source and destination regions.
by Francisco Jerez
· 5 years ago
bafc951
intel/eu/gen12: Codegen control flow instructions correctly.
by Francisco Jerez
· 6 years ago
6e1daba
intel/eu/gen12: Codegen three-source instruction source and destination regions.
by Francisco Jerez
· 6 years ago
9fdb67a
intel/eu/gen12: Fix codegen of immediate source regions.
by Francisco Jerez
· 5 years ago
6cb764a
intel/eu/gen12: Add Gen12 opcode descriptions to the table.
by Francisco Jerez
· 6 years ago
31182e7
intel/eu/gen11+: Mark dot product opcodes as unsupported on opcode_descs table.
by Francisco Jerez
· 5 years ago
c742be1
intel/eu/gen12: Implement datatype binary encoding.
by Francisco Jerez
· 6 years ago
a12533f
intel/eu/gen12: Implement immediate 64 bit constant encoding.
by Sagar Ghuge
· 6 years ago
5291283
intel/eu/gen12: Implement compact instruction binary encoding.
by Francisco Jerez
· 6 years ago
77d09d0
intel/eu/gen12: Implement indirect region binary encoding.
by Francisco Jerez
· 6 years ago
8140047
intel/eu/gen12: Implement SEND instruction binary encoding.
by Francisco Jerez
· 5 years ago
d24b8af
intel/eu/gen12: Implement control flow instruction binary encoding.
by Francisco Jerez
· 5 years ago
956c156
intel/eu/gen12: Implement three-source instruction binary encoding.
by Francisco Jerez
· 5 years ago
fa48281
intel/eu/gen12: Implement basic instruction binary encoding.
by Francisco Jerez
· 5 years ago
1431761
intel/eu/gen12: Add sanity-check asserts to brw_inst_bits() and brw_inst_set_bits().
by Francisco Jerez
· 6 years ago
7e5a863
intel/eu/gen12: Extend brw_inst.h macros for Gen12 support.
by Francisco Jerez
· 5 years ago
6965a02
intel/ir: Represent physical edge of unconditional CONTINUE instruction.
by Francisco Jerez
· 5 years ago
eeaad29
intel/ir: Represent physical edge of ELSE instruction.
by Francisco Jerez
· 5 years ago
1527546
intel/ir: Represent logical edge of BREAK instruction.
by Francisco Jerez
· 5 years ago
c344c92
intel/ir: Add helper function to push block onto CFG analysis stack.
by Francisco Jerez
· 5 years ago
d6a9731
intel/ir: Represent physical and logical subsets of the CFG.
by Francisco Jerez
· 5 years ago
1b57045
intel/ir: Drop hard-coded correspondence between IR and HW opcodes.
by Francisco Jerez
· 7 years ago
057902d
intel/eu: Encode and decode native instruction opcodes from/to IR opcodes.
by Francisco Jerez
· 7 years ago
25dd670
intel/eu: Rework opcode description tables to allow efficient look-up by either HW or IR opcode.
by Francisco Jerez
· 6 years ago
51dc40c
intel/eu: Fix up various type conversions in brw_eu.c that are illegal C++.
by Francisco Jerez
· 6 years ago
35bcd08
intel/eu: Split brw_inst ex_desc accessors for SEND(C) vs. SENDS(C).
by Francisco Jerez
· 6 years ago
b2ae65c
intel/fs: Fix constness of implied_mrf_writes() argument.
by Francisco Jerez
· 6 years ago
6f275a8
intel/fs: Define is_send() convenience IR helper.
by Francisco Jerez
· 5 years ago
f326d9d
intel/fs: Define is_payload() method of the IR instruction class.
by Francisco Jerez
· 6 years ago
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