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Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
2 * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_ROCKCHIP
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
Zach Reizner58080df2016-04-27 11:14:41 -07009#include <assert.h>
10#include <errno.h>
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -070011#include <stdio.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070012#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070013#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070014#include <xf86drm.h>
15#include <rockchip_drm.h>
16
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070017#include "drv_priv.h"
Dominik Behre13ac282015-01-13 00:59:21 -080018#include "helpers.h"
Zach Reizner58080df2016-04-27 11:14:41 -070019#include "util.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070020
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -070021static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height,
22 uint32_t format, uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070023{
Zach Reizner58080df2016-04-27 11:14:41 -070024 int ret;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070025 size_t plane;
Gurchetan Singhf64487b2016-07-14 19:54:44 -070026 struct drm_rockchip_gem_create gem_create;
Zach Reizner58080df2016-04-27 11:14:41 -070027
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070028 if (format == DRV_FORMAT_NV12) {
Gurchetan Singh10a11802016-09-23 15:27:07 -070029 uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16);
30 uint32_t h_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16);
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070031
Gurchetan Singh10a11802016-09-23 15:27:07 -070032 uint32_t aligned_width = w_mbs * 16;
33 uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2);
34
35 drv_bo_from_format(bo, aligned_width, height, format);
36 bo->total_size = bo->strides[0] * aligned_height
37 + w_mbs * h_mbs * 128;
38 } else {
39 drv_bo_from_format(bo, width, height, format);
40 }
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070041
Gurchetan Singhf64487b2016-07-14 19:54:44 -070042 memset(&gem_create, 0, sizeof(gem_create));
Gurchetan Singha40ca9e2016-08-29 19:51:45 -070043 gem_create.size = bo->total_size;
Gurchetan Singhf64487b2016-07-14 19:54:44 -070044
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070045 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE,
Gurchetan Singh10a11802016-09-23 15:27:07 -070046 &gem_create);
Gurchetan Singhf64487b2016-07-14 19:54:44 -070047
48 if (ret) {
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070049 fprintf(stderr, "drv: DRM_IOCTL_ROCKCHIP_GEM_CREATE failed "
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070050 "(size=%llu)\n", gem_create.size);
51 return ret;
Zach Reizner58080df2016-04-27 11:14:41 -070052 }
53
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070054 for (plane = 0; plane < bo->num_planes; plane++)
55 bo->handles[plane].u32 = gem_create.handle;
56
57 return 0;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070058}
59
Gurchetan Singh1a31e602016-10-06 10:58:00 -070060static void *rockchip_bo_map(struct bo *bo, struct map_info *data, size_t plane)
Gurchetan Singhef920532016-08-12 16:38:25 -070061{
62 int ret;
63 struct drm_rockchip_gem_map_off gem_map;
64
65 memset(&gem_map, 0, sizeof(gem_map));
66 gem_map.handle = bo->handles[0].u32;
67
68 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET,
69 &gem_map);
70 if (ret) {
71 fprintf(stderr,
72 "drv: DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
73 return MAP_FAILED;
74 }
75
Gurchetan Singh1a31e602016-10-06 10:58:00 -070076 data->length = bo->total_size;
77
Gurchetan Singha40ca9e2016-08-29 19:51:45 -070078 return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED,
Gurchetan Singhef920532016-08-12 16:38:25 -070079 bo->drv->fd, gem_map.offset);
80}
81
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070082static drv_format_t rockchip_resolve_format(drv_format_t format)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -070083{
84 switch (format) {
Gurchetan Singhd6fb5772016-08-29 19:13:51 -070085 case DRV_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
86 /*HACK: See b/28671744 */
87 return DRV_FORMAT_XBGR8888;
88 case DRV_FORMAT_FLEX_YCbCr_420_888:
89 return DRV_FORMAT_NV12;
90 default:
91 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -070092 }
93}
94
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070095const struct backend backend_rockchip =
Stéphane Marchesin25a26062014-09-12 16:18:59 -070096{
97 .name = "rockchip",
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -070098 .bo_create = rockchip_bo_create,
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070099 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700100 .bo_map = rockchip_bo_map,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700101 .resolve_format = rockchip_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700102 .format_list = {
Gurchetan Singh56662da2016-09-12 16:21:29 -0700103 {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING
104 | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700105 {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
106 DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh56662da2016-09-12 16:21:29 -0700107 {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING
108 | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
Daniele Castagnaac50d642016-08-05 18:50:34 -0400109 {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
110 DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh56662da2016-09-12 16:21:29 -0700111 {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING
112 | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700113 {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR |
114 DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh56662da2016-09-12 16:21:29 -0700115 {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING
116 | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700117 {DRV_FORMAT_NV12, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING |
Gurchetan Singh56662da2016-09-12 16:21:29 -0700118 DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700119 {DRV_FORMAT_NV12, DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR |
120 DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
Gurchetan Singh56662da2016-09-12 16:21:29 -0700121 {DRV_FORMAT_YVU420, DRV_BO_USE_LINEAR | DRV_BO_USE_SCANOUT |
122 DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700123 }
124};
125
126#endif