blob: 787749fbb3eec76a39c5898eeee66f9b88825b10 [file] [log] [blame]
Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
2 * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_I915
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -07009#include <stdio.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070010#include <errno.h>
11#include <string.h>
12#include <stdio.h>
13#include <xf86drm.h>
14#include <i915_drm.h>
15
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070016#include "drv_priv.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070017#include "helpers.h"
18#include "util.h"
19
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070020struct i915_device
Stéphane Marchesin25a26062014-09-12 16:18:59 -070021{
22 int gen;
23};
24
25
26static int get_gen(int device_id)
27{
Stéphane Marchesinec88e892015-11-03 16:14:59 -080028 const uint16_t gen3_ids[] = {0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
29 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011};
Stéphane Marchesina39dfde2014-09-15 15:38:25 -070030 unsigned i;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070031 for(i = 0; i < ARRAY_SIZE(gen3_ids); i++)
32 if (gen3_ids[i] == device_id)
33 return 3;
34
35 return 4;
36}
37
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070038static int drv_i915_init(struct driver *drv)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070039{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070040 struct i915_device *i915_drv;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070041 drm_i915_getparam_t get_param;
42 int device_id;
43 int ret;
44
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070045 i915_drv = (struct i915_device*)malloc(sizeof(*i915_drv));
46 if (!i915_drv)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070047 return -1;
48
49 memset(&get_param, 0, sizeof(get_param));
50 get_param.param = I915_PARAM_CHIPSET_ID;
51 get_param.value = &device_id;
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070052 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
Stéphane Marchesin25a26062014-09-12 16:18:59 -070053 if (ret) {
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070054 fprintf(stderr, "drv: DRM_IOCTL_I915_GETPARAM failed\n");
55 free(i915_drv);
Stéphane Marchesin25a26062014-09-12 16:18:59 -070056 return -1;
57 }
58
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070059 i915_drv->gen = get_gen(device_id);
Stéphane Marchesin25a26062014-09-12 16:18:59 -070060
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070061 drv->priv = i915_drv;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070062
63 return 0;
64}
65
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070066static void drv_i915_close(struct driver *drv)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070067{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070068 free(drv->priv);
69 drv->priv = NULL;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070070}
71
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070072static void i915_align_dimensions(struct driver *drv, uint32_t tiling_mode,
Stéphane Marchesinec88e892015-11-03 16:14:59 -080073 uint32_t *width, uint32_t *height, int bpp)
Stéphane Marchesin25a26062014-09-12 16:18:59 -070074{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070075 struct i915_device *i915_drv = (struct i915_device *)drv->priv;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -080076 uint32_t width_alignment = 4, height_alignment = 4;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070077
Stéphane Marchesin5d867a42014-11-24 17:09:49 -080078 switch(tiling_mode) {
79 default:
80 case I915_TILING_NONE:
81 width_alignment = 64 / bpp;
82 break;
83
84 case I915_TILING_X:
85 width_alignment = 512 / bpp;
86 height_alignment = 8;
87 break;
88
89 case I915_TILING_Y:
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070090 if (i915_drv->gen == 3) {
Stéphane Marchesin5d867a42014-11-24 17:09:49 -080091 width_alignment = 512 / bpp;
92 height_alignment = 8;
93 } else {
94 width_alignment = 128 / bpp;
95 height_alignment = 32;
96 }
97 break;
Stéphane Marchesin25a26062014-09-12 16:18:59 -070098 }
Stéphane Marchesin5d867a42014-11-24 17:09:49 -080099
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700100 if (i915_drv->gen > 3) {
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800101 *width = ALIGN(*width, width_alignment);
102 *height = ALIGN(*height, height_alignment);
103 } else {
104 uint32_t w;
Stéphane Marchesine3d7c1f2015-03-31 13:47:22 -0700105 for (w = width_alignment; w < *width; w <<= 1)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800106 ;
107 *width = w;
108 *height = ALIGN(*height, height_alignment);
109 }
110}
111
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700112static int i915_verify_dimensions(struct driver *drv, uint32_t stride,
Stéphane Marchesinec88e892015-11-03 16:14:59 -0800113 uint32_t height)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800114{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700115 struct i915_device *i915_drv = (struct i915_device *)drv->priv;
116 if (i915_drv->gen <= 3 && stride > 8192)
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800117 return 0;
118
119 return 1;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700120}
121
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700122static int drv_i915_bo_create(struct bo *bo,
Stéphane Marchesined475b42016-02-26 13:36:22 -0800123 uint32_t width, uint32_t height,
124 uint32_t format, uint32_t flags)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700125{
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700126 struct driver *drv = bo->drv;
127 int bpp = drv_stride_from_format(format, 1);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700128 struct drm_i915_gem_create gem_create;
129 struct drm_i915_gem_set_tiling gem_set_tiling;
130 uint32_t tiling_mode = I915_TILING_NONE;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800131 size_t size;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700132 int ret;
133
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700134 if (flags & (DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR))
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700135 tiling_mode = I915_TILING_NONE;
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700136 else if (flags & DRV_BO_USE_SCANOUT)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700137 tiling_mode = I915_TILING_X;
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700138 else if (flags & DRV_BO_USE_RENDERING)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700139 tiling_mode = I915_TILING_Y;
140
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700141 i915_align_dimensions(drv, tiling_mode, &width, &height, bpp);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800142
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500143 bo->strides[0] = width * bpp;
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800144
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700145 if (!i915_verify_dimensions(drv, bo->strides[0], height))
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800146 return EINVAL;
147
148 memset(&gem_create, 0, sizeof(gem_create));
149 size = width * height * bpp;
150 gem_create.size = size;
151
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700152 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700153 if (ret) {
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700154 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed "
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700155 "(size=%zu)\n", size);
Stéphane Marchesin5d867a42014-11-24 17:09:49 -0800156 return ret;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700157 }
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500158 bo->handles[0].u32 = gem_create.handle;
159 bo->sizes[0] = size;
160 bo->offsets[0] = 0;
Daniel Nicoara1de26dc2014-09-25 18:53:19 -0400161
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700162 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
163 do {
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500164 gem_set_tiling.handle = bo->handles[0].u32;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700165 gem_set_tiling.tiling_mode = tiling_mode;
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500166 gem_set_tiling.stride = bo->strides[0];
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700167 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GEM_SET_TILING,
Stéphane Marchesinec88e892015-11-03 16:14:59 -0800168 &gem_set_tiling);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700169 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
170
171 if (ret == -1) {
172 struct drm_gem_close gem_close;
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500173 gem_close.handle = bo->handles[0].u32;
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700174 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed "
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700175 "errno=%x (handle=%x, tiling=%x, stride=%x)\n",
176 errno,
177 gem_set_tiling.handle,
178 gem_set_tiling.tiling_mode,
179 gem_set_tiling.stride);
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700180 drmIoctl(drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700181 return -errno;
182 }
183
184 return 0;
185}
186
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700187const struct backend backend_i915 =
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700188{
189 .name = "i915",
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700190 .init = drv_i915_init,
191 .close = drv_i915_close,
192 .bo_create = drv_i915_bo_create,
193 .bo_destroy = drv_gem_bo_destroy,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700194 .format_list = {
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700195 {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
196 {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
197 {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
198 {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
199 {DRV_FORMAT_XBGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
200 {DRV_FORMAT_ABGR8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
201 {DRV_FORMAT_XRGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
202 {DRV_FORMAT_ARGB1555, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
203 {DRV_FORMAT_RGB565, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_RENDERING},
204 {DRV_FORMAT_UYVY, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
205 {DRV_FORMAT_UYVY, DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR},
206 {DRV_FORMAT_YUYV, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
207 {DRV_FORMAT_YUYV, DRV_BO_USE_SCANOUT | DRV_BO_USE_LINEAR},
208 {DRV_FORMAT_R8, DRV_BO_USE_RENDERING | DRV_BO_USE_LINEAR},
209 {DRV_FORMAT_GR88, DRV_BO_USE_RENDERING | DRV_BO_USE_LINEAR},
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700210 }
211};
212
213#endif