blob: e34d718214887459449d42f68937e433b5e3da90 [file] [log] [blame]
Zach Reizner85c4c5f2017-10-04 13:15:57 -07001/*
2 * Copyright 2017 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Zach Reizner85c4c5f2017-10-04 13:15:57 -07007#include <errno.h>
8#include <stdint.h>
9#include <stdio.h>
10#include <string.h>
11#include <sys/mman.h>
12#include <virtgpu_drm.h>
13#include <xf86drm.h>
14
15#include "drv_priv.h"
16#include "helpers.h"
17#include "util.h"
18#include "virgl_hw.h"
19
Tao Wu33815882018-03-12 18:07:43 -070020#ifndef PAGE_SIZE
Zach Reizner85c4c5f2017-10-04 13:15:57 -070021#define PAGE_SIZE 0x1000
Tao Wu33815882018-03-12 18:07:43 -070022#endif
Zach Reizner85c4c5f2017-10-04 13:15:57 -070023#define PIPE_TEXTURE_2D 2
24
Lepton Wu249e8632018-04-05 12:50:03 -070025#define MESA_LLVMPIPE_TILE_ORDER 6
26#define MESA_LLVMPIPE_TILE_SIZE (1 << MESA_LLVMPIPE_TILE_ORDER)
27
Zach Reizner85c4c5f2017-10-04 13:15:57 -070028static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
Gurchetan Singh71bc6652018-09-17 17:42:05 -070029 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
30 DRM_FORMAT_XRGB8888 };
Zach Reizner85c4c5f2017-10-04 13:15:57 -070031
Lepton Wu249e8632018-04-05 12:50:03 -070032static const uint32_t dumb_texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_YVU420,
Keiichi Watanabea13dda72018-08-02 22:45:05 +090033 DRM_FORMAT_YVU420_ANDROID,
34 DRM_FORMAT_NV12 };
Lepton Wu249e8632018-04-05 12:50:03 -070035
Zach Reizner85c4c5f2017-10-04 13:15:57 -070036static const uint32_t texture_source_formats[] = { DRM_FORMAT_R8, DRM_FORMAT_RG88 };
37
Lepton Wu249e8632018-04-05 12:50:03 -070038struct virtio_gpu_priv {
39 int has_3d;
40};
41
Zach Reizner85c4c5f2017-10-04 13:15:57 -070042static uint32_t translate_format(uint32_t drm_fourcc, uint32_t plane)
43{
44 switch (drm_fourcc) {
45 case DRM_FORMAT_XRGB8888:
46 return VIRGL_FORMAT_B8G8R8X8_UNORM;
47 case DRM_FORMAT_ARGB8888:
48 return VIRGL_FORMAT_B8G8R8A8_UNORM;
49 case DRM_FORMAT_XBGR8888:
50 return VIRGL_FORMAT_R8G8B8X8_UNORM;
51 case DRM_FORMAT_ABGR8888:
52 return VIRGL_FORMAT_R8G8B8A8_UNORM;
53 case DRM_FORMAT_RGB565:
54 return VIRGL_FORMAT_B5G6R5_UNORM;
55 case DRM_FORMAT_R8:
56 return VIRGL_FORMAT_R8_UNORM;
57 case DRM_FORMAT_RG88:
58 return VIRGL_FORMAT_R8G8_UNORM;
59 default:
60 return 0;
61 }
62}
63
Lepton Wu249e8632018-04-05 12:50:03 -070064static int virtio_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
65 uint64_t use_flags)
Zach Reizner85c4c5f2017-10-04 13:15:57 -070066{
Keiichi Watanabea13dda72018-08-02 22:45:05 +090067 if (bo->format != DRM_FORMAT_R8) {
68 width = ALIGN(width, MESA_LLVMPIPE_TILE_SIZE);
69 height = ALIGN(height, MESA_LLVMPIPE_TILE_SIZE);
70 }
Zach Reizner85c4c5f2017-10-04 13:15:57 -070071
Lepton Wu249e8632018-04-05 12:50:03 -070072 return drv_dumb_bo_create(bo, width, height, format, use_flags);
Zach Reizner85c4c5f2017-10-04 13:15:57 -070073}
74
Lepton Wu249e8632018-04-05 12:50:03 -070075static int virtio_virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
76 uint64_t use_flags)
Zach Reizner85c4c5f2017-10-04 13:15:57 -070077{
78 int ret;
79 ssize_t plane;
80 ssize_t num_planes = drv_num_planes_from_format(format);
81 uint32_t stride0;
82
83 for (plane = 0; plane < num_planes; plane++) {
84 uint32_t stride = drv_stride_from_format(format, width, plane);
85 uint32_t size = drv_size_from_format(format, stride, height, plane);
86 uint32_t res_format = translate_format(format, plane);
87 struct drm_virtgpu_resource_create res_create;
88
89 memset(&res_create, 0, sizeof(res_create));
90 size = ALIGN(size, PAGE_SIZE);
91 /*
92 * Setting the target is intended to ensure this resource gets bound as a 2D
93 * texture in the host renderer's GL state. All of these resource properties are
94 * sent unchanged by the kernel to the host, which in turn sends them unchanged to
95 * virglrenderer. When virglrenderer makes a resource, it will convert the target
96 * enum to the equivalent one in GL and then bind the resource to that target.
97 */
98 res_create.target = PIPE_TEXTURE_2D;
99 res_create.format = res_format;
100 res_create.bind = VIRGL_BIND_RENDER_TARGET;
101 res_create.width = width;
102 res_create.height = height;
103 res_create.depth = 1;
104 res_create.array_size = 1;
105 res_create.last_level = 0;
106 res_create.nr_samples = 0;
107 res_create.stride = stride;
108 res_create.size = size;
109
110 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &res_create);
111 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700112 drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_CREATE failed with %s\n",
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700113 strerror(errno));
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700114 ret = -errno;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700115 goto fail;
116 }
117
118 bo->handles[plane].u32 = res_create.bo_handle;
119 }
120
121 stride0 = drv_stride_from_format(format, width, 0);
122 drv_bo_from_format(bo, stride0, height, format);
123
124 for (plane = 0; plane < num_planes; plane++)
125 bo->offsets[plane] = 0;
126
127 return 0;
128
129fail:
130 for (plane--; plane >= 0; plane--) {
131 struct drm_gem_close gem_close;
132 memset(&gem_close, 0, sizeof(gem_close));
133 gem_close.handle = bo->handles[plane].u32;
134 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
135 }
136
137 return ret;
138}
139
Lepton Wu249e8632018-04-05 12:50:03 -0700140static void *virtio_virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700141{
142 int ret;
143 struct drm_virtgpu_map gem_map;
144
145 memset(&gem_map, 0, sizeof(gem_map));
146 gem_map.handle = bo->handles[0].u32;
147
148 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map);
149 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700150 drv_log("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno));
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700151 return MAP_FAILED;
152 }
153
Tao Wu33815882018-03-12 18:07:43 -0700154 vma->length = bo->total_size;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700155 return mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
156 gem_map.offset);
157}
158
Lepton Wu249e8632018-04-05 12:50:03 -0700159static int virtio_gpu_init(struct driver *drv)
160{
161 int ret;
162 struct virtio_gpu_priv *priv;
163 struct drm_virtgpu_getparam args;
164
165 priv = calloc(1, sizeof(*priv));
166 drv->priv = priv;
167
168 memset(&args, 0, sizeof(args));
169 args.param = VIRTGPU_PARAM_3D_FEATURES;
170 args.value = (uint64_t)(uintptr_t)&priv->has_3d;
171 ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GETPARAM, &args);
172 if (ret) {
173 drv_log("virtio 3D acceleration is not available\n");
174 /* Be paranoid */
175 priv->has_3d = 0;
176 }
177
178 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
179 &LINEAR_METADATA, BO_USE_RENDER_MASK);
180
181 if (priv->has_3d)
182 drv_add_combinations(drv, texture_source_formats,
183 ARRAY_SIZE(texture_source_formats), &LINEAR_METADATA,
184 BO_USE_TEXTURE_MASK);
185 else
186 drv_add_combinations(drv, dumb_texture_source_formats,
187 ARRAY_SIZE(dumb_texture_source_formats), &LINEAR_METADATA,
188 BO_USE_TEXTURE_MASK);
189
Gurchetan Singh71bc6652018-09-17 17:42:05 -0700190 /* Android CTS tests require this. */
191 drv_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
192
Keiichi Watanabea13dda72018-08-02 22:45:05 +0900193 drv_modify_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA,
194 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
195 drv_modify_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA,
196 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
197
Lepton Wu249e8632018-04-05 12:50:03 -0700198 return drv_modify_linear_combinations(drv);
199}
200
201static void virtio_gpu_close(struct driver *drv)
202{
203 free(drv->priv);
204 drv->priv = NULL;
205}
206
207static int virtio_gpu_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
208 uint64_t use_flags)
209{
210 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
211 if (priv->has_3d)
212 return virtio_virgl_bo_create(bo, width, height, format, use_flags);
213 else
214 return virtio_dumb_bo_create(bo, width, height, format, use_flags);
215}
216
217static int virtio_gpu_bo_destroy(struct bo *bo)
218{
219 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
220 if (priv->has_3d)
221 return drv_gem_bo_destroy(bo);
222 else
223 return drv_dumb_bo_destroy(bo);
224}
225
226static void *virtio_gpu_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
227{
228 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
229 if (priv->has_3d)
230 return virtio_virgl_bo_map(bo, vma, plane, map_flags);
231 else
232 return drv_dumb_bo_map(bo, vma, plane, map_flags);
233}
234
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700235static int virtio_gpu_bo_invalidate(struct bo *bo, struct mapping *mapping)
236{
237 int ret;
238 struct drm_virtgpu_3d_transfer_from_host xfer;
Lepton Wu249e8632018-04-05 12:50:03 -0700239 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
240
241 if (!priv->has_3d)
242 return 0;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700243
244 memset(&xfer, 0, sizeof(xfer));
245 xfer.bo_handle = mapping->vma->handle;
246 xfer.box.x = mapping->rect.x;
247 xfer.box.y = mapping->rect.y;
248 xfer.box.w = mapping->rect.width;
249 xfer.box.h = mapping->rect.height;
250 xfer.box.d = 1;
251
252 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer);
253 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700254 drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST failed with %s\n", strerror(errno));
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700255 return -errno;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700256 }
257
258 return 0;
259}
260
261static int virtio_gpu_bo_flush(struct bo *bo, struct mapping *mapping)
262{
263 int ret;
264 struct drm_virtgpu_3d_transfer_to_host xfer;
Lepton Wu249e8632018-04-05 12:50:03 -0700265 struct virtio_gpu_priv *priv = (struct virtio_gpu_priv *)bo->drv->priv;
266
267 if (!priv->has_3d)
268 return 0;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700269
270 if (!(mapping->vma->map_flags & BO_MAP_WRITE))
271 return 0;
272
273 memset(&xfer, 0, sizeof(xfer));
274 xfer.bo_handle = mapping->vma->handle;
275 xfer.box.x = mapping->rect.x;
276 xfer.box.y = mapping->rect.y;
277 xfer.box.w = mapping->rect.width;
278 xfer.box.h = mapping->rect.height;
279 xfer.box.d = 1;
280
281 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer);
282 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700283 drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST failed with %s\n", strerror(errno));
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700284 return -errno;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700285 }
286
287 return 0;
288}
289
290static uint32_t virtio_gpu_resolve_format(uint32_t format, uint64_t use_flags)
291{
292 switch (format) {
293 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Keiichi Watanabea13dda72018-08-02 22:45:05 +0900294 /* Camera subsystem requires NV12. */
295 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
296 return DRM_FORMAT_NV12;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700297 /*HACK: See b/28671744 */
298 return DRM_FORMAT_XBGR8888;
Lepton Wu249e8632018-04-05 12:50:03 -0700299 case DRM_FORMAT_FLEX_YCbCr_420_888:
300 return DRM_FORMAT_YVU420;
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700301 default:
302 return format;
303 }
304}
305
Lepton Wu249e8632018-04-05 12:50:03 -0700306const struct backend backend_virtio_gpu = {
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700307 .name = "virtio_gpu",
308 .init = virtio_gpu_init,
Lepton Wu249e8632018-04-05 12:50:03 -0700309 .close = virtio_gpu_close,
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700310 .bo_create = virtio_gpu_bo_create,
Lepton Wu249e8632018-04-05 12:50:03 -0700311 .bo_destroy = virtio_gpu_bo_destroy,
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700312 .bo_import = drv_prime_bo_import,
Lepton Wu249e8632018-04-05 12:50:03 -0700313 .bo_map = virtio_gpu_bo_map,
Zach Reizner85c4c5f2017-10-04 13:15:57 -0700314 .bo_unmap = drv_bo_munmap,
315 .bo_invalidate = virtio_gpu_bo_invalidate,
316 .bo_flush = virtio_gpu_bo_flush,
317 .resolve_format = virtio_gpu_resolve_format,
318};