Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2017 The Chromium OS Authors. All rights reserved. |
| 3 | * Use of this source code is governed by a BSD-style license that can be |
| 4 | * found in the LICENSE file. |
| 5 | */ |
| 6 | |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 7 | #include <assert.h> |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 8 | #include <errno.h> |
David Stevens | 0fe561f | 2020-10-28 16:06:38 +0900 | [diff] [blame] | 9 | #include <stdatomic.h> |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 10 | #include <stdint.h> |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 11 | #include <string.h> |
| 12 | #include <sys/mman.h> |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 13 | #include <xf86drm.h> |
| 14 | |
Yiwei Zhang | b7a6444 | 2021-09-30 05:13:10 +0000 | [diff] [blame] | 15 | #include "drv_helpers.h" |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 16 | #include "drv_priv.h" |
Gurchetan Singh | 9f3110b | 2020-04-03 15:15:30 -0700 | [diff] [blame] | 17 | #include "external/virgl_hw.h" |
| 18 | #include "external/virgl_protocol.h" |
| 19 | #include "external/virtgpu_drm.h" |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 20 | #include "util.h" |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 21 | #include "virtgpu.h" |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 22 | |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 23 | #define PIPE_TEXTURE_2D 2 |
| 24 | |
Jason Macnak | d6666c8 | 2021-09-29 11:13:25 -0700 | [diff] [blame] | 25 | #define MESA_LLVMPIPE_MAX_TEXTURE_2D_LEVELS 15 |
| 26 | #define MESA_LLVMPIPE_MAX_TEXTURE_2D_SIZE (1 << (MESA_LLVMPIPE_MAX_TEXTURE_2D_LEVELS - 1)) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 27 | #define MESA_LLVMPIPE_TILE_ORDER 6 |
| 28 | #define MESA_LLVMPIPE_TILE_SIZE (1 << MESA_LLVMPIPE_TILE_ORDER) |
| 29 | |
Jason Macnak | c06cc9c | 2021-10-06 10:16:19 -0700 | [diff] [blame] | 30 | // This comes from a combination of SwiftShader's VkPhysicalDeviceLimits::maxFramebufferWidth and |
| 31 | // VkPhysicalDeviceLimits::maxImageDimension2D (see https://crrev.com/c/1917130). |
| 32 | #define ANGLE_ON_SWIFTSHADER_MAX_TEXTURE_2D_SIZE 8192 |
| 33 | |
| 34 | #ifndef MIN |
| 35 | #define MIN(a, b) ((a) < (b) ? (a) : (b)) |
| 36 | #endif |
| 37 | #define VIRGL_2D_MAX_TEXTURE_2D_SIZE \ |
| 38 | MIN(ANGLE_ON_SWIFTSHADER_MAX_TEXTURE_2D_SIZE, MESA_LLVMPIPE_MAX_TEXTURE_2D_SIZE) |
| 39 | |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 40 | static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888, |
Gurchetan Singh | 71bc665 | 2018-09-17 17:42:05 -0700 | [diff] [blame] | 41 | DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888, |
| 42 | DRM_FORMAT_XRGB8888 }; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 43 | |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 44 | static const uint32_t dumb_texture_source_formats[] = { |
Yiwei Zhang | 35aa91b | 2021-09-17 22:14:11 +0000 | [diff] [blame] | 45 | DRM_FORMAT_R8, DRM_FORMAT_R16, DRM_FORMAT_YVU420, |
| 46 | DRM_FORMAT_NV12, DRM_FORMAT_NV21, DRM_FORMAT_YVU420_ANDROID, |
| 47 | DRM_FORMAT_ABGR2101010, DRM_FORMAT_ABGR16161616F |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 48 | }; |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 49 | |
Yiwei Zhang | 35aa91b | 2021-09-17 22:14:11 +0000 | [diff] [blame] | 50 | static const uint32_t texture_source_formats[] = { |
Robert Tarasov | 9b27657 | 2022-06-01 20:52:18 +0000 | [diff] [blame] | 51 | DRM_FORMAT_NV12, DRM_FORMAT_NV21, DRM_FORMAT_R8, |
| 52 | DRM_FORMAT_R16, DRM_FORMAT_RG88, DRM_FORMAT_YVU420_ANDROID, |
| 53 | DRM_FORMAT_ABGR2101010, DRM_FORMAT_ABGR16161616F |
Yiwei Zhang | 35aa91b | 2021-09-17 22:14:11 +0000 | [diff] [blame] | 54 | }; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 55 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 56 | extern struct virtgpu_param params[]; |
| 57 | |
| 58 | struct virgl_priv { |
Lepton Wu | eebce65 | 2020-02-26 15:13:34 -0800 | [diff] [blame] | 59 | int caps_is_v2; |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 60 | union virgl_caps caps; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 61 | int host_gbm_enabled; |
David Stevens | 0fe561f | 2020-10-28 16:06:38 +0900 | [diff] [blame] | 62 | atomic_int next_blob_id; |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 63 | }; |
| 64 | |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 65 | static uint32_t translate_format(uint32_t drm_fourcc) |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 66 | { |
| 67 | switch (drm_fourcc) { |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 68 | case DRM_FORMAT_BGR888: |
| 69 | case DRM_FORMAT_RGB888: |
| 70 | return VIRGL_FORMAT_R8G8B8_UNORM; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 71 | case DRM_FORMAT_XRGB8888: |
| 72 | return VIRGL_FORMAT_B8G8R8X8_UNORM; |
| 73 | case DRM_FORMAT_ARGB8888: |
| 74 | return VIRGL_FORMAT_B8G8R8A8_UNORM; |
| 75 | case DRM_FORMAT_XBGR8888: |
| 76 | return VIRGL_FORMAT_R8G8B8X8_UNORM; |
| 77 | case DRM_FORMAT_ABGR8888: |
| 78 | return VIRGL_FORMAT_R8G8B8A8_UNORM; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 79 | case DRM_FORMAT_ABGR16161616F: |
Lepton Wu | fef113c | 2020-10-30 16:29:26 -0700 | [diff] [blame] | 80 | return VIRGL_FORMAT_R16G16B16A16_FLOAT; |
Nataraj Deshpande | 450e576 | 2021-06-30 12:10:55 -0700 | [diff] [blame] | 81 | case DRM_FORMAT_ABGR2101010: |
| 82 | return VIRGL_FORMAT_R10G10B10A2_UNORM; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 83 | case DRM_FORMAT_RGB565: |
| 84 | return VIRGL_FORMAT_B5G6R5_UNORM; |
| 85 | case DRM_FORMAT_R8: |
| 86 | return VIRGL_FORMAT_R8_UNORM; |
Jason Macnak | 6e200ea | 2021-02-11 19:34:57 -0800 | [diff] [blame] | 87 | case DRM_FORMAT_R16: |
| 88 | return VIRGL_FORMAT_R16_UNORM; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 89 | case DRM_FORMAT_RG88: |
| 90 | return VIRGL_FORMAT_R8G8_UNORM; |
Gurchetan Singh | f5d280d | 2019-06-04 19:43:41 -0700 | [diff] [blame] | 91 | case DRM_FORMAT_NV12: |
| 92 | return VIRGL_FORMAT_NV12; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 93 | case DRM_FORMAT_NV21: |
| 94 | return VIRGL_FORMAT_NV21; |
Jason Macnak | dbc63f7 | 2022-06-23 18:34:55 -0700 | [diff] [blame] | 95 | case DRM_FORMAT_P010: |
| 96 | return VIRGL_FORMAT_P010; |
Gurchetan Singh | f5d280d | 2019-06-04 19:43:41 -0700 | [diff] [blame] | 97 | case DRM_FORMAT_YVU420: |
| 98 | case DRM_FORMAT_YVU420_ANDROID: |
| 99 | return VIRGL_FORMAT_YV12; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 100 | default: |
Jason Macnak | 6e200ea | 2021-02-11 19:34:57 -0800 | [diff] [blame] | 101 | drv_log("Unhandled format:%d\n", drm_fourcc); |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 102 | return 0; |
| 103 | } |
| 104 | } |
| 105 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 106 | static bool virgl_bitmask_supports_format(struct virgl_supported_format_mask *supported, |
| 107 | uint32_t drm_format) |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 108 | { |
| 109 | uint32_t virgl_format = translate_format(drm_format); |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 110 | if (!virgl_format) |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 111 | return false; |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 112 | |
| 113 | uint32_t bitmask_index = virgl_format / 32; |
| 114 | uint32_t bit_index = virgl_format % 32; |
| 115 | return supported->bitmask[bitmask_index] & (1 << bit_index); |
| 116 | } |
| 117 | |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 118 | // The metadata generated here for emulated buffers is slightly different than the metadata |
| 119 | // generated by drv_bo_from_format. In order to simplify transfers in the flush and invalidate |
| 120 | // functions below, the emulated buffers are oversized. For example, ignoring stride alignment |
| 121 | // requirements to demonstrate, a 6x6 YUV420 image buffer might have the following layout from |
| 122 | // drv_bo_from_format: |
| 123 | // |
| 124 | // | Y | Y | Y | Y | Y | Y | |
| 125 | // | Y | Y | Y | Y | Y | Y | |
| 126 | // | Y | Y | Y | Y | Y | Y | |
| 127 | // | Y | Y | Y | Y | Y | Y | |
| 128 | // | Y | Y | Y | Y | Y | Y | |
| 129 | // | Y | Y | Y | Y | Y | Y | |
| 130 | // | U | U | U | U | U | U | |
| 131 | // | U | U | U | V | V | V | |
| 132 | // | V | V | V | V | V | V | |
| 133 | // |
| 134 | // where each plane immediately follows the previous plane in memory. This layout makes it |
| 135 | // difficult to compute the transfers needed for example when the middle 2x2 region of the |
| 136 | // image is locked and needs to be flushed/invalidated. |
| 137 | // |
| 138 | // Emulated multi-plane buffers instead have a layout of: |
| 139 | // |
| 140 | // | Y | Y | Y | Y | Y | Y | |
| 141 | // | Y | Y | Y | Y | Y | Y | |
| 142 | // | Y | Y | Y | Y | Y | Y | |
| 143 | // | Y | Y | Y | Y | Y | Y | |
| 144 | // | Y | Y | Y | Y | Y | Y | |
| 145 | // | Y | Y | Y | Y | Y | Y | |
| 146 | // | U | U | U | | | | |
| 147 | // | U | U | U | | | | |
| 148 | // | U | U | U | | | | |
| 149 | // | V | V | V | | | | |
| 150 | // | V | V | V | | | | |
| 151 | // | V | V | V | | | | |
| 152 | // |
| 153 | // where each plane is placed as a sub-image (albeit with a very large stride) in order to |
| 154 | // simplify transfers into 3 sub-image transfers for the above example. |
| 155 | // |
| 156 | // Additional note: the V-plane is not placed to the right of the U-plane due to some |
| 157 | // observed failures in media framework code which assumes the V-plane is not |
| 158 | // "row-interlaced" with the U-plane. |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 159 | static void virgl_get_emulated_metadata(const struct bo *bo, struct bo_metadata *metadata) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 160 | { |
| 161 | uint32_t y_plane_height; |
| 162 | uint32_t c_plane_height; |
| 163 | uint32_t original_width = bo->meta.width; |
| 164 | uint32_t original_height = bo->meta.height; |
| 165 | |
| 166 | metadata->format = DRM_FORMAT_R8; |
| 167 | switch (bo->meta.format) { |
| 168 | case DRM_FORMAT_NV12: |
| 169 | case DRM_FORMAT_NV21: |
| 170 | // Bi-planar |
| 171 | metadata->num_planes = 2; |
| 172 | |
| 173 | y_plane_height = original_height; |
| 174 | c_plane_height = DIV_ROUND_UP(original_height, 2); |
| 175 | |
| 176 | metadata->width = original_width; |
| 177 | metadata->height = y_plane_height + c_plane_height; |
| 178 | |
| 179 | // Y-plane (full resolution) |
| 180 | metadata->strides[0] = metadata->width; |
| 181 | metadata->offsets[0] = 0; |
| 182 | metadata->sizes[0] = metadata->width * y_plane_height; |
| 183 | |
| 184 | // CbCr-plane (half resolution, interleaved, placed below Y-plane) |
| 185 | metadata->strides[1] = metadata->width; |
| 186 | metadata->offsets[1] = metadata->offsets[0] + metadata->sizes[0]; |
| 187 | metadata->sizes[1] = metadata->width * c_plane_height; |
| 188 | |
| 189 | metadata->total_size = metadata->width * metadata->height; |
| 190 | break; |
| 191 | case DRM_FORMAT_YVU420: |
| 192 | case DRM_FORMAT_YVU420_ANDROID: |
| 193 | // Tri-planar |
| 194 | metadata->num_planes = 3; |
| 195 | |
| 196 | y_plane_height = original_height; |
| 197 | c_plane_height = DIV_ROUND_UP(original_height, 2); |
| 198 | |
| 199 | metadata->width = ALIGN(original_width, 32); |
| 200 | metadata->height = y_plane_height + (2 * c_plane_height); |
| 201 | |
| 202 | // Y-plane (full resolution) |
| 203 | metadata->strides[0] = metadata->width; |
| 204 | metadata->offsets[0] = 0; |
| 205 | metadata->sizes[0] = metadata->width * original_height; |
| 206 | |
| 207 | // Cb-plane (half resolution, placed below Y-plane) |
| 208 | metadata->strides[1] = metadata->width; |
| 209 | metadata->offsets[1] = metadata->offsets[0] + metadata->sizes[0]; |
| 210 | metadata->sizes[1] = metadata->width * c_plane_height; |
| 211 | |
| 212 | // Cr-plane (half resolution, placed below Cb-plane) |
| 213 | metadata->strides[2] = metadata->width; |
| 214 | metadata->offsets[2] = metadata->offsets[1] + metadata->sizes[1]; |
| 215 | metadata->sizes[2] = metadata->width * c_plane_height; |
| 216 | |
| 217 | metadata->total_size = metadata->width * metadata->height; |
| 218 | break; |
| 219 | default: |
| 220 | break; |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | struct virtio_transfers_params { |
| 225 | size_t xfers_needed; |
| 226 | struct rectangle xfer_boxes[DRV_MAX_PLANES]; |
| 227 | }; |
| 228 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 229 | static void virgl_get_emulated_transfers_params(const struct bo *bo, |
| 230 | const struct rectangle *transfer_box, |
| 231 | struct virtio_transfers_params *xfer_params) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 232 | { |
| 233 | uint32_t y_plane_height; |
| 234 | uint32_t c_plane_height; |
| 235 | struct bo_metadata emulated_metadata; |
| 236 | |
| 237 | if (transfer_box->x == 0 && transfer_box->y == 0 && transfer_box->width == bo->meta.width && |
| 238 | transfer_box->height == bo->meta.height) { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 239 | virgl_get_emulated_metadata(bo, &emulated_metadata); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 240 | |
| 241 | xfer_params->xfers_needed = 1; |
| 242 | xfer_params->xfer_boxes[0].x = 0; |
| 243 | xfer_params->xfer_boxes[0].y = 0; |
| 244 | xfer_params->xfer_boxes[0].width = emulated_metadata.width; |
| 245 | xfer_params->xfer_boxes[0].height = emulated_metadata.height; |
| 246 | |
| 247 | return; |
| 248 | } |
| 249 | |
| 250 | switch (bo->meta.format) { |
| 251 | case DRM_FORMAT_NV12: |
| 252 | case DRM_FORMAT_NV21: |
| 253 | // Bi-planar |
| 254 | xfer_params->xfers_needed = 2; |
| 255 | |
| 256 | y_plane_height = bo->meta.height; |
| 257 | c_plane_height = DIV_ROUND_UP(bo->meta.height, 2); |
| 258 | |
| 259 | // Y-plane (full resolution) |
| 260 | xfer_params->xfer_boxes[0].x = transfer_box->x; |
| 261 | xfer_params->xfer_boxes[0].y = transfer_box->y; |
| 262 | xfer_params->xfer_boxes[0].width = transfer_box->width; |
| 263 | xfer_params->xfer_boxes[0].height = transfer_box->height; |
| 264 | |
| 265 | // CbCr-plane (half resolution, interleaved, placed below Y-plane) |
| 266 | xfer_params->xfer_boxes[1].x = transfer_box->x; |
| 267 | xfer_params->xfer_boxes[1].y = transfer_box->y + y_plane_height; |
| 268 | xfer_params->xfer_boxes[1].width = transfer_box->width; |
| 269 | xfer_params->xfer_boxes[1].height = DIV_ROUND_UP(transfer_box->height, 2); |
| 270 | |
| 271 | break; |
| 272 | case DRM_FORMAT_YVU420: |
| 273 | case DRM_FORMAT_YVU420_ANDROID: |
| 274 | // Tri-planar |
| 275 | xfer_params->xfers_needed = 3; |
| 276 | |
| 277 | y_plane_height = bo->meta.height; |
| 278 | c_plane_height = DIV_ROUND_UP(bo->meta.height, 2); |
| 279 | |
| 280 | // Y-plane (full resolution) |
| 281 | xfer_params->xfer_boxes[0].x = transfer_box->x; |
| 282 | xfer_params->xfer_boxes[0].y = transfer_box->y; |
| 283 | xfer_params->xfer_boxes[0].width = transfer_box->width; |
| 284 | xfer_params->xfer_boxes[0].height = transfer_box->height; |
| 285 | |
| 286 | // Cb-plane (half resolution, placed below Y-plane) |
| 287 | xfer_params->xfer_boxes[1].x = transfer_box->x; |
| 288 | xfer_params->xfer_boxes[1].y = transfer_box->y + y_plane_height; |
| 289 | xfer_params->xfer_boxes[1].width = DIV_ROUND_UP(transfer_box->width, 2); |
| 290 | xfer_params->xfer_boxes[1].height = DIV_ROUND_UP(transfer_box->height, 2); |
| 291 | |
| 292 | // Cr-plane (half resolution, placed below Cb-plane) |
| 293 | xfer_params->xfer_boxes[2].x = transfer_box->x; |
| 294 | xfer_params->xfer_boxes[2].y = transfer_box->y + y_plane_height + c_plane_height; |
| 295 | xfer_params->xfer_boxes[2].width = DIV_ROUND_UP(transfer_box->width, 2); |
| 296 | xfer_params->xfer_boxes[2].height = DIV_ROUND_UP(transfer_box->height, 2); |
| 297 | |
| 298 | break; |
| 299 | } |
| 300 | } |
| 301 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 302 | static bool virgl_supports_combination_natively(struct driver *drv, uint32_t drm_format, |
| 303 | uint64_t use_flags) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 304 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 305 | struct virgl_priv *priv = (struct virgl_priv *)drv->priv; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 306 | |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 307 | if (priv->caps.max_version == 0) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 308 | return true; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 309 | |
| 310 | if ((use_flags & BO_USE_RENDERING) && |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 311 | !virgl_bitmask_supports_format(&priv->caps.v1.render, drm_format)) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 312 | return false; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 313 | |
| 314 | if ((use_flags & BO_USE_TEXTURE) && |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 315 | !virgl_bitmask_supports_format(&priv->caps.v1.sampler, drm_format)) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 316 | return false; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 317 | |
| 318 | if ((use_flags & BO_USE_SCANOUT) && priv->caps_is_v2 && |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 319 | !virgl_bitmask_supports_format(&priv->caps.v2.scanout, drm_format)) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 320 | return false; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 321 | |
| 322 | return true; |
| 323 | } |
| 324 | |
| 325 | // For virtio backends that do not support formats natively (e.g. multi-planar formats are not |
| 326 | // supported in virglrenderer when gbm is unavailable on the host machine), whether or not the |
| 327 | // format and usage combination can be handled as a blob (byte buffer). |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 328 | static bool virgl_supports_combination_through_emulation(struct driver *drv, uint32_t drm_format, |
| 329 | uint64_t use_flags) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 330 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 331 | struct virgl_priv *priv = (struct virgl_priv *)drv->priv; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 332 | |
| 333 | // Only enable emulation on non-gbm virtio backends. |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 334 | if (priv->host_gbm_enabled) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 335 | return false; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 336 | |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 337 | if (use_flags & (BO_USE_RENDERING | BO_USE_SCANOUT)) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 338 | return false; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 339 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 340 | if (!virgl_supports_combination_natively(drv, DRM_FORMAT_R8, use_flags)) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 341 | return false; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 342 | |
| 343 | return drm_format == DRM_FORMAT_NV12 || drm_format == DRM_FORMAT_NV21 || |
| 344 | drm_format == DRM_FORMAT_YVU420 || drm_format == DRM_FORMAT_YVU420_ANDROID; |
| 345 | } |
| 346 | |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 347 | // Adds the given buffer combination to the list of supported buffer combinations if the |
| 348 | // combination is supported by the virtio backend. |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 349 | static void virgl_add_combination(struct driver *drv, uint32_t drm_format, |
| 350 | struct format_metadata *metadata, uint64_t use_flags) |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 351 | { |
Yiwei Zhang | 9420ffe | 2021-09-24 06:24:30 +0000 | [diff] [blame] | 352 | if (params[param_3d].value) { |
| 353 | if ((use_flags & BO_USE_SCANOUT) && |
| 354 | !virgl_supports_combination_natively(drv, drm_format, BO_USE_SCANOUT)) { |
| 355 | drv_log("Strip scanout on format: %d\n", drm_format); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 356 | use_flags &= ~BO_USE_SCANOUT; |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 357 | } |
| 358 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 359 | if (!virgl_supports_combination_natively(drv, drm_format, use_flags) && |
| 360 | !virgl_supports_combination_through_emulation(drv, drm_format, use_flags)) { |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 361 | drv_log("Skipping unsupported combination format:%d\n", drm_format); |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 362 | return; |
| 363 | } |
| 364 | } |
| 365 | |
| 366 | drv_add_combination(drv, drm_format, metadata, use_flags); |
| 367 | } |
| 368 | |
| 369 | // Adds each given buffer combination to the list of supported buffer combinations if the |
| 370 | // combination supported by the virtio backend. |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 371 | static void virgl_add_combinations(struct driver *drv, const uint32_t *drm_formats, |
| 372 | uint32_t num_formats, struct format_metadata *metadata, |
| 373 | uint64_t use_flags) |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 374 | { |
| 375 | uint32_t i; |
| 376 | |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 377 | for (i = 0; i < num_formats; i++) |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 378 | virgl_add_combination(drv, drm_formats[i], metadata, use_flags); |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 379 | } |
| 380 | |
Jason Macnak | c06cc9c | 2021-10-06 10:16:19 -0700 | [diff] [blame] | 381 | static int virgl_2d_dumb_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, |
| 382 | uint64_t use_flags) |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 383 | { |
Gurchetan Singh | 298b757 | 2019-09-19 09:55:18 -0700 | [diff] [blame] | 384 | if (bo->meta.format != DRM_FORMAT_R8) { |
Keiichi Watanabe | a13dda7 | 2018-08-02 22:45:05 +0900 | [diff] [blame] | 385 | width = ALIGN(width, MESA_LLVMPIPE_TILE_SIZE); |
| 386 | height = ALIGN(height, MESA_LLVMPIPE_TILE_SIZE); |
| 387 | } |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 388 | |
Dominik Behr | 6e6dc49 | 2019-10-09 15:43:52 -0700 | [diff] [blame] | 389 | return drv_dumb_bo_create_ex(bo, width, height, format, use_flags, BO_QUIRK_DUMB32BPP); |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 390 | } |
| 391 | |
Lepton Wu | dbab083 | 2019-04-19 12:26:39 -0700 | [diff] [blame] | 392 | static inline void handle_flag(uint64_t *flag, uint64_t check_flag, uint32_t *bind, |
| 393 | uint32_t virgl_bind) |
| 394 | { |
| 395 | if ((*flag) & check_flag) { |
| 396 | (*flag) &= ~check_flag; |
| 397 | (*bind) |= virgl_bind; |
| 398 | } |
| 399 | } |
| 400 | |
David Stevens | cf28048 | 2020-12-21 11:43:44 +0900 | [diff] [blame] | 401 | static uint32_t compute_virgl_bind_flags(uint64_t use_flags, uint32_t format) |
Lepton Wu | dbab083 | 2019-04-19 12:26:39 -0700 | [diff] [blame] | 402 | { |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 403 | /* In crosvm, VIRGL_BIND_SHARED means minigbm will allocate, not virglrenderer. */ |
| 404 | uint32_t bind = VIRGL_BIND_SHARED; |
Lepton Wu | dbab083 | 2019-04-19 12:26:39 -0700 | [diff] [blame] | 405 | |
| 406 | handle_flag(&use_flags, BO_USE_TEXTURE, &bind, VIRGL_BIND_SAMPLER_VIEW); |
| 407 | handle_flag(&use_flags, BO_USE_RENDERING, &bind, VIRGL_BIND_RENDER_TARGET); |
| 408 | handle_flag(&use_flags, BO_USE_SCANOUT, &bind, VIRGL_BIND_SCANOUT); |
David Stevens | 55a6cf9 | 2019-09-03 10:45:33 +0900 | [diff] [blame] | 409 | handle_flag(&use_flags, BO_USE_CURSOR, &bind, VIRGL_BIND_CURSOR); |
| 410 | handle_flag(&use_flags, BO_USE_LINEAR, &bind, VIRGL_BIND_LINEAR); |
Yiwei Zhang | bb9d4af | 2021-06-20 19:23:38 +0000 | [diff] [blame] | 411 | handle_flag(&use_flags, BO_USE_GPU_DATA_BUFFER, &bind, VIRGL_BIND_LINEAR); |
Yiwei Zhang | d3a73ff | 2021-07-08 05:48:01 +0000 | [diff] [blame] | 412 | handle_flag(&use_flags, BO_USE_FRONT_RENDERING, &bind, VIRGL_BIND_LINEAR); |
David Stevens | 55a6cf9 | 2019-09-03 10:45:33 +0900 | [diff] [blame] | 413 | |
David Stevens | 23de4e2 | 2020-05-15 14:15:35 +0900 | [diff] [blame] | 414 | if (use_flags & BO_USE_PROTECTED) { |
| 415 | handle_flag(&use_flags, BO_USE_PROTECTED, &bind, VIRGL_BIND_MINIGBM_PROTECTED); |
| 416 | } else { |
| 417 | // Make sure we don't set both flags, since that could be mistaken for |
| 418 | // protected. Give OFTEN priority over RARELY. |
| 419 | if (use_flags & BO_USE_SW_READ_OFTEN) { |
| 420 | handle_flag(&use_flags, BO_USE_SW_READ_OFTEN, &bind, |
| 421 | VIRGL_BIND_MINIGBM_SW_READ_OFTEN); |
| 422 | } else { |
| 423 | handle_flag(&use_flags, BO_USE_SW_READ_RARELY, &bind, |
| 424 | VIRGL_BIND_MINIGBM_SW_READ_RARELY); |
| 425 | } |
| 426 | if (use_flags & BO_USE_SW_WRITE_OFTEN) { |
| 427 | handle_flag(&use_flags, BO_USE_SW_WRITE_OFTEN, &bind, |
| 428 | VIRGL_BIND_MINIGBM_SW_WRITE_OFTEN); |
| 429 | } else { |
| 430 | handle_flag(&use_flags, BO_USE_SW_WRITE_RARELY, &bind, |
| 431 | VIRGL_BIND_MINIGBM_SW_WRITE_RARELY); |
| 432 | } |
| 433 | } |
David Stevens | 55a6cf9 | 2019-09-03 10:45:33 +0900 | [diff] [blame] | 434 | |
David Stevens | 23de4e2 | 2020-05-15 14:15:35 +0900 | [diff] [blame] | 435 | handle_flag(&use_flags, BO_USE_CAMERA_WRITE, &bind, VIRGL_BIND_MINIGBM_CAMERA_WRITE); |
| 436 | handle_flag(&use_flags, BO_USE_CAMERA_READ, &bind, VIRGL_BIND_MINIGBM_CAMERA_READ); |
| 437 | handle_flag(&use_flags, BO_USE_HW_VIDEO_DECODER, &bind, |
| 438 | VIRGL_BIND_MINIGBM_HW_VIDEO_DECODER); |
| 439 | handle_flag(&use_flags, BO_USE_HW_VIDEO_ENCODER, &bind, |
| 440 | VIRGL_BIND_MINIGBM_HW_VIDEO_ENCODER); |
David Stevens | 55a6cf9 | 2019-09-03 10:45:33 +0900 | [diff] [blame] | 441 | |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 442 | if (use_flags) |
Lepton Wu | dbab083 | 2019-04-19 12:26:39 -0700 | [diff] [blame] | 443 | drv_log("Unhandled bo use flag: %llx\n", (unsigned long long)use_flags); |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 444 | |
Lepton Wu | dbab083 | 2019-04-19 12:26:39 -0700 | [diff] [blame] | 445 | return bind; |
| 446 | } |
| 447 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 448 | static int virgl_3d_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, |
| 449 | uint64_t use_flags) |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 450 | { |
| 451 | int ret; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 452 | size_t i; |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 453 | uint32_t stride; |
Gurchetan Singh | 9964438 | 2020-10-07 15:28:11 -0700 | [diff] [blame] | 454 | struct drm_virtgpu_resource_create res_create = { 0 }; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 455 | struct bo_metadata emulated_metadata; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 456 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 457 | if (virgl_supports_combination_natively(bo->drv, format, use_flags)) { |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 458 | stride = drv_stride_from_format(format, width, 0); |
| 459 | drv_bo_from_format(bo, stride, height, format); |
| 460 | } else { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 461 | assert(virgl_supports_combination_through_emulation(bo->drv, format, use_flags)); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 462 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 463 | virgl_get_emulated_metadata(bo, &emulated_metadata); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 464 | |
| 465 | format = emulated_metadata.format; |
| 466 | width = emulated_metadata.width; |
| 467 | height = emulated_metadata.height; |
| 468 | for (i = 0; i < emulated_metadata.num_planes; i++) { |
| 469 | bo->meta.strides[i] = emulated_metadata.strides[i]; |
| 470 | bo->meta.offsets[i] = emulated_metadata.offsets[i]; |
| 471 | bo->meta.sizes[i] = emulated_metadata.sizes[i]; |
| 472 | } |
| 473 | bo->meta.total_size = emulated_metadata.total_size; |
| 474 | } |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 475 | |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 476 | /* |
| 477 | * Setting the target is intended to ensure this resource gets bound as a 2D |
| 478 | * texture in the host renderer's GL state. All of these resource properties are |
| 479 | * sent unchanged by the kernel to the host, which in turn sends them unchanged to |
| 480 | * virglrenderer. When virglrenderer makes a resource, it will convert the target |
| 481 | * enum to the equivalent one in GL and then bind the resource to that target. |
| 482 | */ |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 483 | |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 484 | res_create.target = PIPE_TEXTURE_2D; |
| 485 | res_create.format = translate_format(format); |
David Stevens | cf28048 | 2020-12-21 11:43:44 +0900 | [diff] [blame] | 486 | res_create.bind = compute_virgl_bind_flags(use_flags, format); |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 487 | res_create.width = width; |
| 488 | res_create.height = height; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 489 | |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 490 | /* For virgl 3D */ |
| 491 | res_create.depth = 1; |
| 492 | res_create.array_size = 1; |
| 493 | res_create.last_level = 0; |
| 494 | res_create.nr_samples = 0; |
| 495 | |
Gurchetan Singh | 298b757 | 2019-09-19 09:55:18 -0700 | [diff] [blame] | 496 | res_create.size = ALIGN(bo->meta.total_size, PAGE_SIZE); // PAGE_SIZE = 0x1000 |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 497 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &res_create); |
| 498 | if (ret) { |
| 499 | drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_CREATE failed with %s\n", strerror(errno)); |
| 500 | return ret; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 501 | } |
| 502 | |
Gurchetan Singh | 298b757 | 2019-09-19 09:55:18 -0700 | [diff] [blame] | 503 | for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++) |
Kansho Nishida | d97877b | 2019-06-14 18:28:18 +0900 | [diff] [blame] | 504 | bo->handles[plane].u32 = res_create.bo_handle; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 505 | |
| 506 | return 0; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 507 | } |
| 508 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 509 | static void *virgl_3d_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags) |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 510 | { |
| 511 | int ret; |
Gurchetan Singh | 9964438 | 2020-10-07 15:28:11 -0700 | [diff] [blame] | 512 | struct drm_virtgpu_map gem_map = { 0 }; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 513 | |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 514 | gem_map.handle = bo->handles[0].u32; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 515 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_MAP, &gem_map); |
| 516 | if (ret) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 517 | drv_log("DRM_IOCTL_VIRTGPU_MAP failed with %s\n", strerror(errno)); |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 518 | return MAP_FAILED; |
| 519 | } |
| 520 | |
Gurchetan Singh | 298b757 | 2019-09-19 09:55:18 -0700 | [diff] [blame] | 521 | vma->length = bo->meta.total_size; |
| 522 | return mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd, |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 523 | gem_map.offset); |
| 524 | } |
| 525 | |
Jason Macnak | d6666c8 | 2021-09-29 11:13:25 -0700 | [diff] [blame] | 526 | static uint32_t virgl_3d_get_max_texture_2d_size(struct driver *drv) |
| 527 | { |
| 528 | struct virgl_priv *priv = (struct virgl_priv *)drv->priv; |
| 529 | |
| 530 | if (priv->caps.v2.max_texture_2d_size) |
| 531 | return priv->caps.v2.max_texture_2d_size; |
| 532 | |
| 533 | return UINT32_MAX; |
| 534 | } |
| 535 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 536 | static int virgl_get_caps(struct driver *drv, union virgl_caps *caps, int *caps_is_v2) |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 537 | { |
| 538 | int ret; |
Gurchetan Singh | 9964438 | 2020-10-07 15:28:11 -0700 | [diff] [blame] | 539 | struct drm_virtgpu_get_caps cap_args = { 0 }; |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 540 | |
Lepton Wu | eebce65 | 2020-02-26 15:13:34 -0800 | [diff] [blame] | 541 | *caps_is_v2 = 0; |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 542 | cap_args.addr = (unsigned long long)caps; |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 543 | if (params[param_capset_fix].value) { |
Lepton Wu | eebce65 | 2020-02-26 15:13:34 -0800 | [diff] [blame] | 544 | *caps_is_v2 = 1; |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 545 | cap_args.cap_set_id = 2; |
| 546 | cap_args.size = sizeof(union virgl_caps); |
| 547 | } else { |
| 548 | cap_args.cap_set_id = 1; |
| 549 | cap_args.size = sizeof(struct virgl_caps_v1); |
| 550 | } |
| 551 | |
| 552 | ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GET_CAPS, &cap_args); |
| 553 | if (ret) { |
| 554 | drv_log("DRM_IOCTL_VIRTGPU_GET_CAPS failed with %s\n", strerror(errno)); |
Lepton Wu | eebce65 | 2020-02-26 15:13:34 -0800 | [diff] [blame] | 555 | *caps_is_v2 = 0; |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 556 | |
| 557 | // Fallback to v1 |
| 558 | cap_args.cap_set_id = 1; |
| 559 | cap_args.size = sizeof(struct virgl_caps_v1); |
| 560 | |
| 561 | ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_GET_CAPS, &cap_args); |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 562 | if (ret) |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 563 | drv_log("DRM_IOCTL_VIRTGPU_GET_CAPS failed with %s\n", strerror(errno)); |
Jason Macnak | ddf4ec0 | 2020-02-03 16:36:46 -0800 | [diff] [blame] | 564 | } |
| 565 | |
| 566 | return ret; |
| 567 | } |
| 568 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 569 | static void virgl_init_params_and_caps(struct driver *drv) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 570 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 571 | struct virgl_priv *priv = (struct virgl_priv *)drv->priv; |
| 572 | if (params[param_3d].value) { |
| 573 | virgl_get_caps(drv, &priv->caps, &priv->caps_is_v2); |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 574 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 575 | // We use two criteria to determine whether host minigbm is used on the host for |
| 576 | // swapchain allocations. |
| 577 | // |
Gurchetan Singh | bbde01e | 2021-02-17 08:54:28 -0800 | [diff] [blame] | 578 | // (1) Host minigbm is only available via virglrenderer, and only virglrenderer |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 579 | // advertises capabilities. |
| 580 | // (2) Only host minigbm doesn't emulate YUV formats. Checking this is a bit of a |
| 581 | // proxy, but it works. |
Gurchetan Singh | bbde01e | 2021-02-17 08:54:28 -0800 | [diff] [blame] | 582 | priv->host_gbm_enabled = |
| 583 | priv->caps.max_version > 0 && |
| 584 | virgl_supports_combination_natively(drv, DRM_FORMAT_NV12, BO_USE_TEXTURE); |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 585 | } |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 586 | } |
| 587 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 588 | static int virgl_init(struct driver *drv) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 589 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 590 | struct virgl_priv *priv; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 591 | |
| 592 | priv = calloc(1, sizeof(*priv)); |
Yiwei Zhang | afdf87d | 2021-09-28 04:06:06 +0000 | [diff] [blame] | 593 | if (!priv) |
| 594 | return -ENOMEM; |
| 595 | |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 596 | drv->priv = priv; |
| 597 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 598 | virgl_init_params_and_caps(drv); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 599 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 600 | if (params[param_3d].value) { |
Dominik Behr | 6e6dc49 | 2019-10-09 15:43:52 -0700 | [diff] [blame] | 601 | /* This doesn't mean host can scanout everything, it just means host |
| 602 | * hypervisor can show it. */ |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 603 | virgl_add_combinations(drv, render_target_formats, |
| 604 | ARRAY_SIZE(render_target_formats), &LINEAR_METADATA, |
| 605 | BO_USE_RENDER_MASK | BO_USE_SCANOUT); |
| 606 | virgl_add_combinations(drv, texture_source_formats, |
| 607 | ARRAY_SIZE(texture_source_formats), &LINEAR_METADATA, |
| 608 | BO_USE_TEXTURE_MASK); |
Yiwei Zhang | 9420ffe | 2021-09-24 06:24:30 +0000 | [diff] [blame] | 609 | /* NV12 with scanout must flow through virgl_add_combination, so that the native |
| 610 | * support is checked and scanout use_flag can be conditionally stripped. */ |
| 611 | virgl_add_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA, |
| 612 | BO_USE_TEXTURE_MASK | BO_USE_CAMERA_READ | |
| 613 | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER | |
| 614 | BO_USE_HW_VIDEO_ENCODER | BO_USE_SCANOUT); |
Gurchetan Singh | 3f3e5f9 | 2019-07-08 09:50:01 -0700 | [diff] [blame] | 615 | } else { |
Dominik Behr | 6e6dc49 | 2019-10-09 15:43:52 -0700 | [diff] [blame] | 616 | /* Virtio primary plane only allows this format. */ |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 617 | virgl_add_combination(drv, DRM_FORMAT_XRGB8888, &LINEAR_METADATA, |
| 618 | BO_USE_RENDER_MASK | BO_USE_SCANOUT); |
Dominik Behr | 6e6dc49 | 2019-10-09 15:43:52 -0700 | [diff] [blame] | 619 | /* Virtio cursor plane only allows this format and Chrome cannot live without |
| 620 | * ARGB888 renderable format. */ |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 621 | virgl_add_combination(drv, DRM_FORMAT_ARGB8888, &LINEAR_METADATA, |
| 622 | BO_USE_RENDER_MASK | BO_USE_CURSOR); |
Dominik Behr | 6e6dc49 | 2019-10-09 15:43:52 -0700 | [diff] [blame] | 623 | /* Android needs more, but they cannot be bound as scanouts anymore after |
| 624 | * "drm/virtio: fix DRM_FORMAT_* handling" */ |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 625 | virgl_add_combinations(drv, render_target_formats, |
| 626 | ARRAY_SIZE(render_target_formats), &LINEAR_METADATA, |
| 627 | BO_USE_RENDER_MASK); |
| 628 | virgl_add_combinations(drv, dumb_texture_source_formats, |
| 629 | ARRAY_SIZE(dumb_texture_source_formats), &LINEAR_METADATA, |
| 630 | BO_USE_TEXTURE_MASK); |
Yiwei Zhang | 9fa17e7 | 2021-09-17 22:11:29 +0000 | [diff] [blame] | 631 | drv_modify_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA, |
| 632 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | |
| 633 | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER); |
Gurchetan Singh | 3f3e5f9 | 2019-07-08 09:50:01 -0700 | [diff] [blame] | 634 | } |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 635 | |
Gurchetan Singh | 71bc665 | 2018-09-17 17:42:05 -0700 | [diff] [blame] | 636 | /* Android CTS tests require this. */ |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 637 | virgl_add_combination(drv, DRM_FORMAT_RGB888, &LINEAR_METADATA, BO_USE_SW_MASK); |
| 638 | virgl_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK); |
Jason Macnak | dbc63f7 | 2022-06-23 18:34:55 -0700 | [diff] [blame] | 639 | /* Android Camera CTS tests requires this. Additionally, the scanout usage is needed for |
| 640 | * Camera preview and is expected to be conditionally stripped by virgl_add_combination |
| 641 | * when not natively supported and instead handled by HWComposer. */ |
| 642 | virgl_add_combination(drv, DRM_FORMAT_P010, &LINEAR_METADATA, |
| 643 | BO_USE_SCANOUT | BO_USE_TEXTURE | BO_USE_SW_MASK | |
| 644 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE); |
Keiichi Watanabe | a13dda7 | 2018-08-02 22:45:05 +0900 | [diff] [blame] | 645 | drv_modify_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA, |
David Staessens | 04b7e24 | 2020-05-28 15:47:15 +0900 | [diff] [blame] | 646 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER | |
Yiwei Zhang | bb9d4af | 2021-06-20 19:23:38 +0000 | [diff] [blame] | 647 | BO_USE_HW_VIDEO_ENCODER | BO_USE_GPU_DATA_BUFFER); |
David Stevens | 519978f | 2020-12-11 14:09:56 +0900 | [diff] [blame] | 648 | |
| 649 | if (!priv->host_gbm_enabled) { |
| 650 | drv_modify_combination(drv, DRM_FORMAT_ABGR8888, &LINEAR_METADATA, |
| 651 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | |
| 652 | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER); |
| 653 | drv_modify_combination(drv, DRM_FORMAT_XBGR8888, &LINEAR_METADATA, |
| 654 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | |
| 655 | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER); |
| 656 | drv_modify_combination(drv, DRM_FORMAT_NV21, &LINEAR_METADATA, |
| 657 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | |
| 658 | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER); |
| 659 | drv_modify_combination(drv, DRM_FORMAT_R16, &LINEAR_METADATA, |
| 660 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | |
| 661 | BO_USE_HW_VIDEO_DECODER); |
| 662 | drv_modify_combination(drv, DRM_FORMAT_YVU420, &LINEAR_METADATA, |
| 663 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | |
| 664 | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER); |
| 665 | drv_modify_combination(drv, DRM_FORMAT_YVU420_ANDROID, &LINEAR_METADATA, |
| 666 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | |
| 667 | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER); |
| 668 | } |
Keiichi Watanabe | a13dda7 | 2018-08-02 22:45:05 +0900 | [diff] [blame] | 669 | |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 670 | return drv_modify_linear_combinations(drv); |
| 671 | } |
| 672 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 673 | static void virgl_close(struct driver *drv) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 674 | { |
| 675 | free(drv->priv); |
| 676 | drv->priv = NULL; |
| 677 | } |
| 678 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 679 | static int virgl_bo_create_blob(struct driver *drv, struct bo *bo) |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 680 | { |
| 681 | int ret; |
| 682 | uint32_t stride; |
David Stevens | 0fe561f | 2020-10-28 16:06:38 +0900 | [diff] [blame] | 683 | uint32_t cur_blob_id; |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 684 | uint32_t cmd[VIRGL_PIPE_RES_CREATE_SIZE + 1] = { 0 }; |
| 685 | struct drm_virtgpu_resource_create_blob drm_rc_blob = { 0 }; |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 686 | struct virgl_priv *priv = (struct virgl_priv *)drv->priv; |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 687 | |
David Stevens | d3f07bd | 2020-09-25 18:52:26 +0900 | [diff] [blame] | 688 | uint32_t blob_flags = VIRTGPU_BLOB_FLAG_USE_SHAREABLE; |
| 689 | if (bo->meta.use_flags & BO_USE_SW_MASK) |
| 690 | blob_flags |= VIRTGPU_BLOB_FLAG_USE_MAPPABLE; |
David Stevens | 1b252e2 | 2021-08-03 16:48:17 +0900 | [diff] [blame] | 691 | |
| 692 | // For now, all blob use cases are cross device. When we add wider |
| 693 | // support for blobs, we can revisit making this unconditional. |
| 694 | blob_flags |= VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE; |
David Stevens | b42624c | 2020-09-10 10:50:26 +0900 | [diff] [blame] | 695 | |
David Stevens | 0fe561f | 2020-10-28 16:06:38 +0900 | [diff] [blame] | 696 | cur_blob_id = atomic_fetch_add(&priv->next_blob_id, 1); |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 697 | stride = drv_stride_from_format(bo->meta.format, bo->meta.width, 0); |
| 698 | drv_bo_from_format(bo, stride, bo->meta.height, bo->meta.format); |
| 699 | bo->meta.total_size = ALIGN(bo->meta.total_size, PAGE_SIZE); |
David Stevens | b42624c | 2020-09-10 10:50:26 +0900 | [diff] [blame] | 700 | bo->meta.tiling = blob_flags; |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 701 | |
| 702 | cmd[0] = VIRGL_CMD0(VIRGL_CCMD_PIPE_RESOURCE_CREATE, 0, VIRGL_PIPE_RES_CREATE_SIZE); |
| 703 | cmd[VIRGL_PIPE_RES_CREATE_TARGET] = PIPE_TEXTURE_2D; |
| 704 | cmd[VIRGL_PIPE_RES_CREATE_WIDTH] = bo->meta.width; |
| 705 | cmd[VIRGL_PIPE_RES_CREATE_HEIGHT] = bo->meta.height; |
| 706 | cmd[VIRGL_PIPE_RES_CREATE_FORMAT] = translate_format(bo->meta.format); |
David Stevens | cf28048 | 2020-12-21 11:43:44 +0900 | [diff] [blame] | 707 | cmd[VIRGL_PIPE_RES_CREATE_BIND] = |
| 708 | compute_virgl_bind_flags(bo->meta.use_flags, bo->meta.format); |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 709 | cmd[VIRGL_PIPE_RES_CREATE_DEPTH] = 1; |
David Stevens | 0fe561f | 2020-10-28 16:06:38 +0900 | [diff] [blame] | 710 | cmd[VIRGL_PIPE_RES_CREATE_BLOB_ID] = cur_blob_id; |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 711 | |
| 712 | drm_rc_blob.cmd = (uint64_t)&cmd; |
| 713 | drm_rc_blob.cmd_size = 4 * (VIRGL_PIPE_RES_CREATE_SIZE + 1); |
| 714 | drm_rc_blob.size = bo->meta.total_size; |
| 715 | drm_rc_blob.blob_mem = VIRTGPU_BLOB_MEM_HOST3D; |
David Stevens | b42624c | 2020-09-10 10:50:26 +0900 | [diff] [blame] | 716 | drm_rc_blob.blob_flags = blob_flags; |
David Stevens | 0fe561f | 2020-10-28 16:06:38 +0900 | [diff] [blame] | 717 | drm_rc_blob.blob_id = cur_blob_id; |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 718 | |
| 719 | ret = drmIoctl(drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB, &drm_rc_blob); |
| 720 | if (ret < 0) { |
| 721 | drv_log("DRM_VIRTGPU_RESOURCE_CREATE_BLOB failed with %s\n", strerror(errno)); |
| 722 | return -errno; |
| 723 | } |
| 724 | |
| 725 | for (uint32_t plane = 0; plane < bo->meta.num_planes; plane++) |
| 726 | bo->handles[plane].u32 = drm_rc_blob.bo_handle; |
| 727 | |
| 728 | return 0; |
| 729 | } |
| 730 | |
| 731 | static bool should_use_blob(struct driver *drv, uint32_t format, uint64_t use_flags) |
| 732 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 733 | struct virgl_priv *priv = (struct virgl_priv *)drv->priv; |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 734 | |
| 735 | // TODO(gurchetansingh): remove once all minigbm users are blob-safe |
| 736 | #ifndef VIRTIO_GPU_NEXT |
| 737 | return false; |
| 738 | #endif |
| 739 | |
| 740 | // Only use blob when host gbm is available |
| 741 | if (!priv->host_gbm_enabled) |
| 742 | return false; |
| 743 | |
Yiwei Zhang | bb9d4af | 2021-06-20 19:23:38 +0000 | [diff] [blame] | 744 | // Use regular resources if only the GPU needs efficient access. Blob resource is a better |
| 745 | // fit for BO_USE_GPU_DATA_BUFFER which is mapped to VIRGL_BIND_LINEAR. |
| 746 | if (!(use_flags & (BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | BO_USE_LINEAR | |
| 747 | BO_USE_NON_GPU_HW | BO_USE_GPU_DATA_BUFFER))) |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 748 | return false; |
| 749 | |
David Stevens | d3f07bd | 2020-09-25 18:52:26 +0900 | [diff] [blame] | 750 | switch (format) { |
David Stevens | d3f07bd | 2020-09-25 18:52:26 +0900 | [diff] [blame] | 751 | case DRM_FORMAT_R8: |
| 752 | // Formats with strictly defined strides are supported |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 753 | return true; |
David Stevens | c6df2b2 | 2021-08-10 19:02:09 +0900 | [diff] [blame] | 754 | case DRM_FORMAT_YVU420_ANDROID: |
David Stevens | d3f07bd | 2020-09-25 18:52:26 +0900 | [diff] [blame] | 755 | case DRM_FORMAT_NV12: |
| 756 | // Knowing buffer metadata at buffer creation isn't yet supported, so buffers |
| 757 | // can't be properly mapped into the guest. |
| 758 | return (use_flags & BO_USE_SW_MASK) == 0; |
| 759 | default: |
| 760 | return false; |
| 761 | } |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 762 | } |
| 763 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 764 | static int virgl_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, |
| 765 | uint64_t use_flags) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 766 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 767 | if (params[param_resource_blob].value && params[param_host_visible].value && |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 768 | should_use_blob(bo->drv, format, use_flags)) |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 769 | return virgl_bo_create_blob(bo->drv, bo); |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 770 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 771 | if (params[param_3d].value) |
| 772 | return virgl_3d_bo_create(bo, width, height, format, use_flags); |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 773 | else |
Jason Macnak | c06cc9c | 2021-10-06 10:16:19 -0700 | [diff] [blame] | 774 | return virgl_2d_dumb_bo_create(bo, width, height, format, use_flags); |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 775 | } |
| 776 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 777 | static int virgl_bo_destroy(struct bo *bo) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 778 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 779 | if (params[param_3d].value) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 780 | return drv_gem_bo_destroy(bo); |
| 781 | else |
| 782 | return drv_dumb_bo_destroy(bo); |
| 783 | } |
| 784 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 785 | static void *virgl_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 786 | { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 787 | if (params[param_3d].value) |
| 788 | return virgl_3d_bo_map(bo, vma, plane, map_flags); |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 789 | else |
| 790 | return drv_dumb_bo_map(bo, vma, plane, map_flags); |
| 791 | } |
| 792 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 793 | static int virgl_bo_invalidate(struct bo *bo, struct mapping *mapping) |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 794 | { |
| 795 | int ret; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 796 | size_t i; |
Gurchetan Singh | 9964438 | 2020-10-07 15:28:11 -0700 | [diff] [blame] | 797 | struct drm_virtgpu_3d_transfer_from_host xfer = { 0 }; |
| 798 | struct drm_virtgpu_3d_wait waitcmd = { 0 }; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 799 | struct virtio_transfers_params xfer_params; |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 800 | struct virgl_priv *priv = (struct virgl_priv *)bo->drv->priv; |
David Stevens | 9fe8c20 | 2020-12-21 18:47:55 +0900 | [diff] [blame] | 801 | uint64_t host_write_flags; |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 802 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 803 | if (!params[param_3d].value) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 804 | return 0; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 805 | |
David Stevens | 9fe8c20 | 2020-12-21 18:47:55 +0900 | [diff] [blame] | 806 | // Invalidate is only necessary if the host writes to the buffer. The encoder and |
| 807 | // decoder flags don't differentiate between input and output buffers, but we can |
| 808 | // use the format to determine whether this buffer could be encoder/decoder output. |
Jason Macnak | dbc63f7 | 2022-06-23 18:34:55 -0700 | [diff] [blame] | 809 | host_write_flags = BO_USE_RENDERING | BO_USE_CAMERA_WRITE | BO_USE_GPU_DATA_BUFFER; |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 810 | if (bo->meta.format == DRM_FORMAT_R8) |
David Stevens | 9fe8c20 | 2020-12-21 18:47:55 +0900 | [diff] [blame] | 811 | host_write_flags |= BO_USE_HW_VIDEO_ENCODER; |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 812 | else |
David Stevens | 9fe8c20 | 2020-12-21 18:47:55 +0900 | [diff] [blame] | 813 | host_write_flags |= BO_USE_HW_VIDEO_DECODER; |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 814 | |
David Stevens | 9fe8c20 | 2020-12-21 18:47:55 +0900 | [diff] [blame] | 815 | if ((bo->meta.use_flags & host_write_flags) == 0) |
David Stevens | 4d5358d | 2019-10-24 14:59:31 +0900 | [diff] [blame] | 816 | return 0; |
| 817 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 818 | if (params[param_resource_blob].value && (bo->meta.tiling & VIRTGPU_BLOB_FLAG_USE_MAPPABLE)) |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 819 | return 0; |
| 820 | |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 821 | xfer.bo_handle = mapping->vma->handle; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 822 | |
Gurchetan Singh | 1b57fe2 | 2020-05-05 09:18:22 -0700 | [diff] [blame] | 823 | if (mapping->rect.x || mapping->rect.y) { |
Gurchetan Singh | 1b57fe2 | 2020-05-05 09:18:22 -0700 | [diff] [blame] | 824 | /* |
| 825 | * virglrenderer uses the box parameters and assumes that offset == 0 for planar |
| 826 | * images |
| 827 | */ |
| 828 | if (bo->meta.num_planes == 1) { |
| 829 | xfer.offset = |
| 830 | (bo->meta.strides[0] * mapping->rect.y) + |
| 831 | drv_bytes_per_pixel_from_format(bo->meta.format, 0) * mapping->rect.x; |
| 832 | } |
| 833 | } |
| 834 | |
David Stevens | baab6c8 | 2020-02-26 17:14:43 +0900 | [diff] [blame] | 835 | if ((bo->meta.use_flags & BO_USE_RENDERING) == 0) { |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 836 | // Unfortunately, the kernel doesn't actually pass the guest layer_stride |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 837 | // and guest stride to the host (compare virgl.h and virtgpu_drm.h). |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 838 | // For gbm based resources, we can work around this by using the level field |
| 839 | // to pass the stride to virglrenderer's gbm transfer code. However, we need |
| 840 | // to avoid doing this for resources which don't rely on that transfer code, |
| 841 | // which is resources with the BO_USE_RENDERING flag set. |
David Stevens | baab6c8 | 2020-02-26 17:14:43 +0900 | [diff] [blame] | 842 | // TODO(b/145993887): Send also stride when the patches are landed |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 843 | if (priv->host_gbm_enabled) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 844 | xfer.level = bo->meta.strides[0]; |
David Stevens | baab6c8 | 2020-02-26 17:14:43 +0900 | [diff] [blame] | 845 | } |
Gurchetan Singh | 05e67cc | 2019-06-28 17:21:40 -0700 | [diff] [blame] | 846 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 847 | if (virgl_supports_combination_natively(bo->drv, bo->meta.format, bo->meta.use_flags)) { |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 848 | xfer_params.xfers_needed = 1; |
| 849 | xfer_params.xfer_boxes[0] = mapping->rect; |
| 850 | } else { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 851 | assert(virgl_supports_combination_through_emulation(bo->drv, bo->meta.format, |
| 852 | bo->meta.use_flags)); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 853 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 854 | virgl_get_emulated_transfers_params(bo, &mapping->rect, &xfer_params); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 855 | } |
| 856 | |
| 857 | for (i = 0; i < xfer_params.xfers_needed; i++) { |
| 858 | xfer.box.x = xfer_params.xfer_boxes[i].x; |
| 859 | xfer.box.y = xfer_params.xfer_boxes[i].y; |
| 860 | xfer.box.w = xfer_params.xfer_boxes[i].width; |
| 861 | xfer.box.h = xfer_params.xfer_boxes[i].height; |
| 862 | xfer.box.d = 1; |
| 863 | |
| 864 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST, &xfer); |
| 865 | if (ret) { |
| 866 | drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST failed with %s\n", |
| 867 | strerror(errno)); |
| 868 | return -errno; |
| 869 | } |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 870 | } |
| 871 | |
David Stevens | 4d5358d | 2019-10-24 14:59:31 +0900 | [diff] [blame] | 872 | // The transfer needs to complete before invalidate returns so that any host changes |
| 873 | // are visible and to ensure the host doesn't overwrite subsequent guest changes. |
| 874 | // TODO(b/136733358): Support returning fences from transfers |
David Stevens | 4d5358d | 2019-10-24 14:59:31 +0900 | [diff] [blame] | 875 | waitcmd.handle = mapping->vma->handle; |
| 876 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd); |
| 877 | if (ret) { |
| 878 | drv_log("DRM_IOCTL_VIRTGPU_WAIT failed with %s\n", strerror(errno)); |
| 879 | return -errno; |
| 880 | } |
| 881 | |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 882 | return 0; |
| 883 | } |
| 884 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 885 | static int virgl_bo_flush(struct bo *bo, struct mapping *mapping) |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 886 | { |
| 887 | int ret; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 888 | size_t i; |
Gurchetan Singh | 9964438 | 2020-10-07 15:28:11 -0700 | [diff] [blame] | 889 | struct drm_virtgpu_3d_transfer_to_host xfer = { 0 }; |
| 890 | struct drm_virtgpu_3d_wait waitcmd = { 0 }; |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 891 | struct virtio_transfers_params xfer_params; |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 892 | struct virgl_priv *priv = (struct virgl_priv *)bo->drv->priv; |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 893 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 894 | if (!params[param_3d].value) |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 895 | return 0; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 896 | |
| 897 | if (!(mapping->vma->map_flags & BO_MAP_WRITE)) |
| 898 | return 0; |
| 899 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 900 | if (params[param_resource_blob].value && (bo->meta.tiling & VIRTGPU_BLOB_FLAG_USE_MAPPABLE)) |
Gurchetan Singh | 0ee06fb | 2019-09-13 17:49:20 -0700 | [diff] [blame] | 901 | return 0; |
| 902 | |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 903 | xfer.bo_handle = mapping->vma->handle; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 904 | |
Gurchetan Singh | 1b57fe2 | 2020-05-05 09:18:22 -0700 | [diff] [blame] | 905 | if (mapping->rect.x || mapping->rect.y) { |
Gurchetan Singh | 1b57fe2 | 2020-05-05 09:18:22 -0700 | [diff] [blame] | 906 | /* |
| 907 | * virglrenderer uses the box parameters and assumes that offset == 0 for planar |
| 908 | * images |
| 909 | */ |
| 910 | if (bo->meta.num_planes == 1) { |
| 911 | xfer.offset = |
| 912 | (bo->meta.strides[0] * mapping->rect.y) + |
| 913 | drv_bytes_per_pixel_from_format(bo->meta.format, 0) * mapping->rect.x; |
| 914 | } |
| 915 | } |
| 916 | |
Gurchetan Singh | 05e67cc | 2019-06-28 17:21:40 -0700 | [diff] [blame] | 917 | // Unfortunately, the kernel doesn't actually pass the guest layer_stride and |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 918 | // guest stride to the host (compare virgl.h and virtgpu_drm.h). We can use |
Gurchetan Singh | 05e67cc | 2019-06-28 17:21:40 -0700 | [diff] [blame] | 919 | // the level to work around this. |
Gurchetan Singh | cadc54f | 2021-02-01 12:03:11 -0800 | [diff] [blame] | 920 | if (priv->host_gbm_enabled) |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 921 | xfer.level = bo->meta.strides[0]; |
Gurchetan Singh | 05e67cc | 2019-06-28 17:21:40 -0700 | [diff] [blame] | 922 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 923 | if (virgl_supports_combination_natively(bo->drv, bo->meta.format, bo->meta.use_flags)) { |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 924 | xfer_params.xfers_needed = 1; |
| 925 | xfer_params.xfer_boxes[0] = mapping->rect; |
| 926 | } else { |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 927 | assert(virgl_supports_combination_through_emulation(bo->drv, bo->meta.format, |
| 928 | bo->meta.use_flags)); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 929 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 930 | virgl_get_emulated_transfers_params(bo, &mapping->rect, &xfer_params); |
Jason Macnak | 1de7f66 | 2020-01-24 15:05:57 -0800 | [diff] [blame] | 931 | } |
| 932 | |
| 933 | for (i = 0; i < xfer_params.xfers_needed; i++) { |
| 934 | xfer.box.x = xfer_params.xfer_boxes[i].x; |
| 935 | xfer.box.y = xfer_params.xfer_boxes[i].y; |
| 936 | xfer.box.w = xfer_params.xfer_boxes[i].width; |
| 937 | xfer.box.h = xfer_params.xfer_boxes[i].height; |
| 938 | xfer.box.d = 1; |
| 939 | |
| 940 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST, &xfer); |
| 941 | if (ret) { |
| 942 | drv_log("DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST failed with %s\n", |
| 943 | strerror(errno)); |
| 944 | return -errno; |
| 945 | } |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 946 | } |
| 947 | |
David Stevens | baab6c8 | 2020-02-26 17:14:43 +0900 | [diff] [blame] | 948 | // If the buffer is only accessed by the host GPU, then the flush is ordered |
| 949 | // with subsequent commands. However, if other host hardware can access the |
| 950 | // buffer, we need to wait for the transfer to complete for consistency. |
| 951 | // TODO(b/136733358): Support returning fences from transfers |
| 952 | if (bo->meta.use_flags & BO_USE_NON_GPU_HW) { |
David Stevens | baab6c8 | 2020-02-26 17:14:43 +0900 | [diff] [blame] | 953 | waitcmd.handle = mapping->vma->handle; |
| 954 | |
| 955 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd); |
| 956 | if (ret) { |
| 957 | drv_log("DRM_IOCTL_VIRTGPU_WAIT failed with %s\n", strerror(errno)); |
| 958 | return -errno; |
| 959 | } |
| 960 | } |
| 961 | |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 962 | return 0; |
| 963 | } |
| 964 | |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 965 | static void virgl_3d_resolve_format_and_use_flags(struct driver *drv, uint32_t format, |
| 966 | uint64_t use_flags, uint32_t *out_format, |
| 967 | uint64_t *out_use_flags) |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 968 | { |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 969 | *out_format = format; |
| 970 | *out_use_flags = use_flags; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 971 | switch (format) { |
| 972 | case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED: |
Keiichi Watanabe | a13dda7 | 2018-08-02 22:45:05 +0900 | [diff] [blame] | 973 | /* Camera subsystem requires NV12. */ |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 974 | if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) { |
| 975 | *out_format = DRM_FORMAT_NV12; |
| 976 | } else { |
| 977 | /* HACK: See b/28671744 */ |
| 978 | *out_format = DRM_FORMAT_XBGR8888; |
Yiwei Zhang | 3a171db | 2021-10-01 22:12:05 +0000 | [diff] [blame] | 979 | *out_use_flags &= ~BO_USE_HW_VIDEO_ENCODER; |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 980 | } |
| 981 | break; |
Lepton Wu | 249e863 | 2018-04-05 12:50:03 -0700 | [diff] [blame] | 982 | case DRM_FORMAT_FLEX_YCbCr_420_888: |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 983 | /* All of our host drivers prefer NV12 as their flexible media format. |
| 984 | * If that changes, this will need to be modified. */ |
| 985 | *out_format = DRM_FORMAT_NV12; |
| 986 | /* fallthrough */ |
| 987 | case DRM_FORMAT_NV12: |
| 988 | case DRM_FORMAT_ABGR8888: |
| 989 | case DRM_FORMAT_ARGB8888: |
| 990 | case DRM_FORMAT_RGB565: |
| 991 | case DRM_FORMAT_XBGR8888: |
| 992 | case DRM_FORMAT_XRGB8888: |
| 993 | /* These are the scanout capable formats to the guest. Strip scanout use_flag if the |
| 994 | * host does not natively support scanout on the requested format. */ |
| 995 | if ((use_flags & BO_USE_SCANOUT) && |
| 996 | !virgl_supports_combination_natively(drv, format, BO_USE_SCANOUT)) |
| 997 | *out_use_flags &= ~BO_USE_SCANOUT; |
| 998 | break; |
| 999 | case DRM_FORMAT_YVU420_ANDROID: |
| 1000 | *out_use_flags &= ~BO_USE_SCANOUT; |
| 1001 | /* HACK: See b/172389166. Also see gbm_bo_create. */ |
| 1002 | *out_use_flags |= BO_USE_LINEAR; |
| 1003 | break; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 1004 | default: |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1005 | break; |
Zach Reizner | 85c4c5f | 2017-10-04 13:15:57 -0700 | [diff] [blame] | 1006 | } |
| 1007 | } |
Yiwei Zhang | c1413ea | 2021-09-17 08:20:21 +0000 | [diff] [blame] | 1008 | |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1009 | static void virgl_2d_resolve_format_and_use_flags(uint32_t format, uint64_t use_flags, |
| 1010 | uint32_t *out_format, uint64_t *out_use_flags) |
Yiwei Zhang | c1413ea | 2021-09-17 08:20:21 +0000 | [diff] [blame] | 1011 | { |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1012 | *out_format = format; |
| 1013 | *out_use_flags = use_flags; |
Yiwei Zhang | c1413ea | 2021-09-17 08:20:21 +0000 | [diff] [blame] | 1014 | |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1015 | /* HACK: See crrev/c/1849773 */ |
| 1016 | if (format != DRM_FORMAT_XRGB8888) |
| 1017 | *out_use_flags &= ~BO_USE_SCANOUT; |
| 1018 | |
| 1019 | switch (format) { |
| 1020 | case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED: |
| 1021 | /* Camera subsystem requires NV12. */ |
| 1022 | if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) { |
| 1023 | *out_format = DRM_FORMAT_NV12; |
| 1024 | } else { |
| 1025 | /* HACK: See b/28671744 */ |
| 1026 | *out_format = DRM_FORMAT_XBGR8888; |
Yiwei Zhang | 3a171db | 2021-10-01 22:12:05 +0000 | [diff] [blame] | 1027 | *out_use_flags &= ~BO_USE_HW_VIDEO_ENCODER; |
Yiwei Zhang | 9420ffe | 2021-09-24 06:24:30 +0000 | [diff] [blame] | 1028 | } |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1029 | break; |
| 1030 | case DRM_FORMAT_FLEX_YCbCr_420_888: |
| 1031 | *out_format = DRM_FORMAT_YVU420_ANDROID; |
| 1032 | /* fallthrough */ |
| 1033 | case DRM_FORMAT_YVU420_ANDROID: |
| 1034 | *out_use_flags &= ~BO_USE_SCANOUT; |
| 1035 | /* HACK: See b/172389166. Also see gbm_bo_create. */ |
| 1036 | *out_use_flags |= BO_USE_LINEAR; |
| 1037 | break; |
| 1038 | default: |
| 1039 | break; |
Yiwei Zhang | 9420ffe | 2021-09-24 06:24:30 +0000 | [diff] [blame] | 1040 | } |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1041 | } |
Yiwei Zhang | c1413ea | 2021-09-17 08:20:21 +0000 | [diff] [blame] | 1042 | |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1043 | static void virgl_resolve_format_and_use_flags(struct driver *drv, uint32_t format, |
| 1044 | uint64_t use_flags, uint32_t *out_format, |
| 1045 | uint64_t *out_use_flags) |
| 1046 | { |
| 1047 | if (params[param_3d].value) { |
| 1048 | return virgl_3d_resolve_format_and_use_flags(drv, format, use_flags, out_format, |
| 1049 | out_use_flags); |
| 1050 | } else { |
| 1051 | return virgl_2d_resolve_format_and_use_flags(format, use_flags, out_format, |
| 1052 | out_use_flags); |
| 1053 | } |
Yiwei Zhang | c1413ea | 2021-09-17 08:20:21 +0000 | [diff] [blame] | 1054 | } |
| 1055 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 1056 | static int virgl_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES], |
Yiwei Zhang | a1e93fd | 2021-04-30 07:01:55 +0000 | [diff] [blame] | 1057 | uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier) |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1058 | { |
| 1059 | int ret; |
Chia-I Wu | 2e41f63 | 2021-01-11 11:08:21 -0800 | [diff] [blame] | 1060 | struct drm_virtgpu_resource_info_cros res_info = { 0 }; |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1061 | |
Gurchetan Singh | 73c141e | 2021-01-21 14:51:19 -0800 | [diff] [blame] | 1062 | if (!params[param_3d].value) |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1063 | return 0; |
| 1064 | |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1065 | res_info.bo_handle = bo->handles[0].u32; |
Chia-I Wu | 5085562 | 2021-01-12 12:38:09 -0800 | [diff] [blame] | 1066 | res_info.type = VIRTGPU_RESOURCE_INFO_TYPE_EXTENDED; |
Chia-I Wu | 2e41f63 | 2021-01-11 11:08:21 -0800 | [diff] [blame] | 1067 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_VIRTGPU_RESOURCE_INFO_CROS, &res_info); |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1068 | if (ret) { |
| 1069 | drv_log("DRM_IOCTL_VIRTGPU_RESOURCE_INFO failed with %s\n", strerror(errno)); |
| 1070 | return ret; |
| 1071 | } |
| 1072 | |
Yiwei Zhang | f58616e | 2021-08-26 05:54:15 +0000 | [diff] [blame] | 1073 | for (uint32_t plane = 0; plane < DRV_MAX_PLANES; plane++) { |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1074 | /* |
| 1075 | * Currently, kernel v4.14 (Betty) doesn't have the extended resource info |
| 1076 | * ioctl. |
| 1077 | */ |
Yiwei Zhang | f58616e | 2021-08-26 05:54:15 +0000 | [diff] [blame] | 1078 | if (!res_info.strides[plane]) |
| 1079 | break; |
| 1080 | |
| 1081 | strides[plane] = res_info.strides[plane]; |
| 1082 | offsets[plane] = res_info.offsets[plane]; |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1083 | } |
Yiwei Zhang | a1e93fd | 2021-04-30 07:01:55 +0000 | [diff] [blame] | 1084 | *format_modifier = res_info.format_modifier; |
Gurchetan Singh | bc4f023 | 2019-06-27 20:05:54 -0700 | [diff] [blame] | 1085 | |
| 1086 | return 0; |
| 1087 | } |
| 1088 | |
Jason Macnak | d6666c8 | 2021-09-29 11:13:25 -0700 | [diff] [blame] | 1089 | static uint32_t virgl_get_max_texture_2d_size(struct driver *drv) |
| 1090 | { |
| 1091 | if (params[param_3d].value) |
| 1092 | return virgl_3d_get_max_texture_2d_size(drv); |
| 1093 | else |
Jason Macnak | c06cc9c | 2021-10-06 10:16:19 -0700 | [diff] [blame] | 1094 | return VIRGL_2D_MAX_TEXTURE_2D_SIZE; |
Jason Macnak | d6666c8 | 2021-09-29 11:13:25 -0700 | [diff] [blame] | 1095 | } |
| 1096 | |
Gurchetan Singh | bbde01e | 2021-02-17 08:54:28 -0800 | [diff] [blame] | 1097 | const struct backend virtgpu_virgl = { .name = "virtgpu_virgl", |
| 1098 | .init = virgl_init, |
| 1099 | .close = virgl_close, |
| 1100 | .bo_create = virgl_bo_create, |
| 1101 | .bo_destroy = virgl_bo_destroy, |
| 1102 | .bo_import = drv_prime_bo_import, |
| 1103 | .bo_map = virgl_bo_map, |
| 1104 | .bo_unmap = drv_bo_munmap, |
| 1105 | .bo_invalidate = virgl_bo_invalidate, |
| 1106 | .bo_flush = virgl_bo_flush, |
Yiwei Zhang | b8ad7b8 | 2021-10-01 17:55:14 +0000 | [diff] [blame] | 1107 | .resolve_format_and_use_flags = |
| 1108 | virgl_resolve_format_and_use_flags, |
Jason Macnak | d6666c8 | 2021-09-29 11:13:25 -0700 | [diff] [blame] | 1109 | .resource_info = virgl_resource_info, |
| 1110 | .get_max_texture_2d_size = virgl_get_max_texture_2d_size }; |