cliechti | cb65c68 | 2008-06-22 22:47:02 +0000 | [diff] [blame] | 1 | #! /usr/bin/env python |
cliechti | d6bf52c | 2003-10-01 02:28:12 +0000 | [diff] [blame] | 2 | # |
Chris Liechti | 7c032f1 | 2015-10-27 23:02:00 +0100 | [diff] [blame] | 3 | # This file is part of pySerial - Cross platform serial port support for Python |
Chris Liechti | d73344d | 2015-08-06 17:52:51 +0200 | [diff] [blame] | 4 | # (C) 2001-2015 Chris Liechti <cliechti@gmx.net> |
Chris Liechti | 7c032f1 | 2015-10-27 23:02:00 +0100 | [diff] [blame] | 5 | # |
| 6 | # SPDX-License-Identifier: BSD-3-Clause |
cliechti | cb65c68 | 2008-06-22 22:47:02 +0000 | [diff] [blame] | 7 | """\ |
| 8 | Some tests for the serial module. |
Chris Liechti | d73344d | 2015-08-06 17:52:51 +0200 | [diff] [blame] | 9 | Part of pyserial (http://pyserial.sf.net) (C)2001-2015 cliechti@gmx.net |
cliechti | d6bf52c | 2003-10-01 02:28:12 +0000 | [diff] [blame] | 10 | |
| 11 | Intended to be run on different platforms, to ensure portability of |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 12 | the code. |
| 13 | |
cliechti | d6bf52c | 2003-10-01 02:28:12 +0000 | [diff] [blame] | 14 | For all these tests a simple hardware is required. |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 15 | Loopback HW adapter: |
cliechti | d6bf52c | 2003-10-01 02:28:12 +0000 | [diff] [blame] | 16 | Shortcut these pin pairs: |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 17 | TX <-> RX |
| 18 | RTS <-> CTS |
| 19 | DTR <-> DSR |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 20 | |
cliechti | d6bf52c | 2003-10-01 02:28:12 +0000 | [diff] [blame] | 21 | On a 9 pole DSUB these are the pins (2-3) (4-6) (7-8) |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 22 | """ |
| 23 | |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 24 | import unittest |
| 25 | import threading |
| 26 | import time |
cliechti | a75900c | 2009-07-28 00:12:52 +0000 | [diff] [blame] | 27 | import sys |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 28 | import serial |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 29 | |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 30 | # on which port should the tests be performed: |
Chris Liechti | 6ed12e0 | 2015-09-18 21:23:42 +0200 | [diff] [blame] | 31 | PORT = 'loop://' |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 32 | |
Chris Liechti | 6ed12e0 | 2015-09-18 21:23:42 +0200 | [diff] [blame] | 33 | # indirection via bytearray b/c bytes(range(256)) does something else in Pyhton 2.7 |
| 34 | bytes_0to255 = bytes(bytearray(range(256))) |
cliechti | 54c534e | 2009-08-06 23:24:26 +0000 | [diff] [blame] | 35 | |
| 36 | |
| 37 | def segments(data, size=16): |
| 38 | for a in range(0, len(data), size): |
| 39 | yield data[a:a+size] |
cliechti | a75900c | 2009-07-28 00:12:52 +0000 | [diff] [blame] | 40 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 41 | |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 42 | class Test4_Nonblocking(unittest.TestCase): |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 43 | """Test with timeouts""" |
cliechti | a75900c | 2009-07-28 00:12:52 +0000 | [diff] [blame] | 44 | timeout = 0 |
| 45 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 46 | def setUp(self): |
cliechti | e3ab353 | 2009-08-05 12:40:38 +0000 | [diff] [blame] | 47 | self.s = serial.serial_for_url(PORT, timeout=self.timeout) |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 48 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 49 | def tearDown(self): |
| 50 | self.s.close() |
| 51 | |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 52 | def test0_Messy(self): |
| 53 | """NonBlocking (timeout=0)""" |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 54 | # this is only here to write out the message in verbose mode |
| 55 | # because Test3 and Test4 print the same messages |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 56 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 57 | def test1_ReadEmpty(self): |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 58 | """timeout: After port open, the input buffer must be empty""" |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 59 | self.assertEqual(self.s.read(1), b'', "expected empty buffer") |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 60 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 61 | def test2_Loopback(self): |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 62 | """timeout: each sent character should return (binary test). |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 63 | this is also a test for the binary capability of a port.""" |
cliechti | 54c534e | 2009-08-06 23:24:26 +0000 | [diff] [blame] | 64 | for block in segments(bytes_0to255): |
| 65 | length = len(block) |
| 66 | self.s.write(block) |
cliechti | a75900c | 2009-07-28 00:12:52 +0000 | [diff] [blame] | 67 | # there might be a small delay until the character is ready (especially on win32) |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 68 | time.sleep(0.05) |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 69 | self.assertEqual(self.s.in_waiting, length, "expected exactly %d character for inWainting()" % length) |
| 70 | self.assertEqual(self.s.read(length), block)#, "expected a %r which was written before" % block) |
| 71 | self.assertEqual(self.s.read(1), b'', "expected empty buffer after all sent chars are read") |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 72 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 73 | def test2_LoopbackTimeout(self): |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 74 | """timeout: test the timeout/immediate return. |
| 75 | partial results should be returned.""" |
Chris Liechti | 6ed12e0 | 2015-09-18 21:23:42 +0200 | [diff] [blame] | 76 | self.s.write(b"HELLO") |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 77 | time.sleep(0.1) # there might be a small delay until the character is ready (especially on win32 and rfc2217) |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 78 | # read more characters as are available to run in the timeout |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 79 | self.assertEqual(self.s.read(10), b'HELLO', "expected the 'HELLO' which was written before") |
| 80 | self.assertEqual(self.s.read(1), b'', "expected empty buffer after all sent chars are read") |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 81 | |
| 82 | |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 83 | class Test3_Timeout(Test4_Nonblocking): |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 84 | """Same tests as the NonBlocking ones but this time with timeout""" |
cliechti | a75900c | 2009-07-28 00:12:52 +0000 | [diff] [blame] | 85 | timeout = 1 |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 86 | |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 87 | def test0_Messy(self): |
| 88 | """Blocking (timeout=1)""" |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 89 | # this is only here to write out the message in verbose mode |
| 90 | # because Test3 and Test4 print the same messages |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 91 | |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 92 | |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 93 | class SendEvent(threading.Thread): |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 94 | def __init__(self, serial, delay=3): |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 95 | threading.Thread.__init__(self) |
| 96 | self.serial = serial |
| 97 | self.delay = delay |
| 98 | self.x = threading.Event() |
| 99 | self.stopped = 0 |
| 100 | self.start() |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 101 | |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 102 | def run(self): |
| 103 | time.sleep(self.delay) |
cliechti | 8b599c9 | 2011-08-15 13:12:09 +0000 | [diff] [blame] | 104 | self.x.set() |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 105 | if not self.stopped: |
Chris Liechti | 6ed12e0 | 2015-09-18 21:23:42 +0200 | [diff] [blame] | 106 | self.serial.write(b"E") |
cliechti | 7fc7da0 | 2009-08-03 23:49:02 +0000 | [diff] [blame] | 107 | self.serial.flush() |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 108 | |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 109 | def isSet(self): |
| 110 | return self.x.isSet() |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 111 | |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 112 | def stop(self): |
| 113 | self.stopped = 1 |
| 114 | self.x.wait() |
| 115 | |
| 116 | class Test1_Forever(unittest.TestCase): |
| 117 | """Tests a port with no timeout. These tests require that a |
| 118 | character is sent after some time to stop the test, this is done |
| 119 | through the SendEvent class and the Loopback HW.""" |
| 120 | def setUp(self): |
cliechti | e3ab353 | 2009-08-05 12:40:38 +0000 | [diff] [blame] | 121 | self.s = serial.serial_for_url(PORT, timeout=None) |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 122 | self.event = SendEvent(self.s) |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 123 | |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 124 | def tearDown(self): |
| 125 | self.event.stop() |
| 126 | self.s.close() |
| 127 | |
| 128 | def test2_ReadEmpty(self): |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 129 | """no timeout: after port open, the input buffer must be empty (read). |
| 130 | a character is sent after some time to terminate the test (SendEvent).""" |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 131 | c = self.s.read(1) |
Chris Liechti | 6ed12e0 | 2015-09-18 21:23:42 +0200 | [diff] [blame] | 132 | if not (self.event.isSet() and c == b'E'): |
cliechti | 8b599c9 | 2011-08-15 13:12:09 +0000 | [diff] [blame] | 133 | self.fail("expected marker (evt=%r, c=%r)" % (self.event.isSet(), c)) |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 134 | |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 135 | |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 136 | class Test2_Forever(unittest.TestCase): |
| 137 | """Tests a port with no timeout""" |
| 138 | def setUp(self): |
cliechti | e3ab353 | 2009-08-05 12:40:38 +0000 | [diff] [blame] | 139 | self.s = serial.serial_for_url(PORT, timeout=None) |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 140 | |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 141 | def tearDown(self): |
| 142 | self.s.close() |
| 143 | |
| 144 | def test1_inWaitingEmpty(self): |
Chris Liechti | 20ed5fd | 2015-09-02 02:48:51 +0200 | [diff] [blame] | 145 | """no timeout: after port open, the input buffer must be empty (in_waiting)""" |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 146 | self.assertEqual(self.s.in_waiting, 0, "expected empty buffer") |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 147 | |
| 148 | def test2_Loopback(self): |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 149 | """no timeout: each sent character should return (binary test). |
cliechti | 1e95baa | 2002-06-04 22:46:50 +0000 | [diff] [blame] | 150 | this is also a test for the binary capability of a port.""" |
cliechti | 54c534e | 2009-08-06 23:24:26 +0000 | [diff] [blame] | 151 | for block in segments(bytes_0to255): |
| 152 | length = len(block) |
| 153 | self.s.write(block) |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 154 | # there might be a small delay until the character is ready (especially on win32 and rfc2217) |
| 155 | time.sleep(0.05) |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 156 | self.assertEqual(self.s.in_waiting, length)#, "expected exactly %d character for inWainting()" % length) |
| 157 | self.assertEqual(self.s.read(length), block) #, "expected %r which was written before" % block) |
| 158 | self.assertEqual(self.s.in_waiting, 0, "expected empty buffer after all sent chars are read") |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 159 | |
| 160 | |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 161 | class Test0_DataWires(unittest.TestCase): |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 162 | """Test modem control lines""" |
| 163 | def setUp(self): |
cliechti | e3ab353 | 2009-08-05 12:40:38 +0000 | [diff] [blame] | 164 | self.s = serial.serial_for_url(PORT) |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 165 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 166 | def tearDown(self): |
| 167 | self.s.close() |
| 168 | |
| 169 | def test1_RTS(self): |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 170 | """Test RTS/CTS""" |
Chris Liechti | 20ed5fd | 2015-09-02 02:48:51 +0200 | [diff] [blame] | 171 | self.s.rts = False |
cliechti | 7fc7da0 | 2009-08-03 23:49:02 +0000 | [diff] [blame] | 172 | time.sleep(1.1) |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 173 | self.assertTrue(not self.s.cts, "CTS -> 0") |
Chris Liechti | 20ed5fd | 2015-09-02 02:48:51 +0200 | [diff] [blame] | 174 | self.s.rts = True |
cliechti | 7fc7da0 | 2009-08-03 23:49:02 +0000 | [diff] [blame] | 175 | time.sleep(1.1) |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 176 | self.assertTrue(self.s.cts, "CTS -> 1") |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 177 | |
| 178 | def test2_DTR(self): |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 179 | """Test DTR/DSR""" |
Chris Liechti | 20ed5fd | 2015-09-02 02:48:51 +0200 | [diff] [blame] | 180 | self.s.dtr = False |
cliechti | 7fc7da0 | 2009-08-03 23:49:02 +0000 | [diff] [blame] | 181 | time.sleep(1.1) |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 182 | self.assertTrue(not self.s.dsr, "DSR -> 0") |
Chris Liechti | 20ed5fd | 2015-09-02 02:48:51 +0200 | [diff] [blame] | 183 | self.s.dtr = True |
cliechti | 7fc7da0 | 2009-08-03 23:49:02 +0000 | [diff] [blame] | 184 | time.sleep(1.1) |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 185 | self.assertTrue(self.s.dsr, "DSR -> 1") |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 186 | |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 187 | def test3_RI(self): |
| 188 | """Test RI""" |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 189 | self.assertTrue(not self.s.ri, "RI -> 0") |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 190 | |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 191 | |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 192 | class Test_MoreTimeouts(unittest.TestCase): |
| 193 | """Test with timeouts""" |
| 194 | def setUp(self): |
cliechti | f16c770 | 2009-08-02 00:00:55 +0000 | [diff] [blame] | 195 | # create an closed serial port |
cliechti | e3ab353 | 2009-08-05 12:40:38 +0000 | [diff] [blame] | 196 | self.s = serial.serial_for_url(PORT, do_not_open=True) |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 197 | |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 198 | def tearDown(self): |
Chris Liechti | a6f0b76 | 2015-08-03 15:48:56 +0200 | [diff] [blame] | 199 | #~ self.s.write(serial.XON) |
Chris Liechti | d73344d | 2015-08-06 17:52:51 +0200 | [diff] [blame] | 200 | self.s.close() |
| 201 | # reopen... some faulty USB-serial adapter make next test fail otherwise... |
| 202 | self.s.timeout = 1 |
| 203 | self.s.xonxoff = False |
| 204 | self.s.open() |
| 205 | self.s.read(10) |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 206 | self.s.close() |
| 207 | |
| 208 | def test_WriteTimeout(self): |
| 209 | """Test write() timeout.""" |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 210 | # use xonxoff setting and the loop-back adapter to switch traffic on hold |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 211 | self.s.port = PORT |
Chris Liechti | d73344d | 2015-08-06 17:52:51 +0200 | [diff] [blame] | 212 | self.s.writeTimeout = True |
| 213 | self.s.xonxoff = True |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 214 | self.s.open() |
| 215 | self.s.write(serial.XOFF) |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 216 | time.sleep(0.5) # some systems need a little delay so that they can react on XOFF |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 217 | t1 = time.time() |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 218 | self.assertRaises(serial.SerialTimeoutException, self.s.write, b"timeout please"*200) |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 219 | t2 = time.time() |
Chris Liechti | dedd3b7 | 2015-12-11 20:44:22 +0100 | [diff] [blame^] | 220 | self.assertTrue( 0.9 <= (t2-t1) < 2.1, "Timeout not in the given interval (%s)" % (t2-t1)) |
cliechti | 42007d3 | 2009-07-30 17:21:26 +0000 | [diff] [blame] | 221 | |
cliechti | 6261161 | 2004-04-20 01:55:43 +0000 | [diff] [blame] | 222 | |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 223 | if __name__ == '__main__': |
cliechti | a135a67 | 2002-06-11 15:10:46 +0000 | [diff] [blame] | 224 | import sys |
cliechti | 8f9e577 | 2009-02-07 00:30:53 +0000 | [diff] [blame] | 225 | sys.stdout.write(__doc__) |
cliechti | 764c88c | 2008-06-24 11:56:48 +0000 | [diff] [blame] | 226 | if len(sys.argv) > 1: |
| 227 | PORT = sys.argv[1] |
cliechti | 58a3efe | 2009-07-21 20:56:52 +0000 | [diff] [blame] | 228 | sys.stdout.write("Testing port: %r\n" % PORT) |
cliechti | 764c88c | 2008-06-24 11:56:48 +0000 | [diff] [blame] | 229 | sys.argv[1:] = ['-v'] |
cliechti | d6bf52c | 2003-10-01 02:28:12 +0000 | [diff] [blame] | 230 | # When this module is executed from the command-line, it runs all its tests |
cliechti | c813b21 | 2002-06-04 21:12:10 +0000 | [diff] [blame] | 231 | unittest.main() |