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gerrit-public.fairphone.software / platform / external / rmi4utils / refs/heads/rel/p/fp2/21.01.0-rel / . / f54test / f54test.h
blob: 6842cbab7dd8f0688ec9b2c94b1551392b1ec177 [file] [log] [blame]
Satoshi Noguchic5343602014-09-29 02:49:22 -0700[diff] [blame]1/*
2 * Copyright (C) 2014 Satoshi Noguchi
3 * Copyright (C) 2014 Synaptics Inc
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17
18#ifndef _F54TEST_H_
19#define _F54TEST_H_
20
21#include "rmidevice.h"
22
23#define COMMAND_TIMEOUT_100MS 20
24
25#define COMMAND_GET_REPORT 1
26#define COMMAND_FORCE_CAL 2
27#define COMMAND_FORCE_UPDATE 4
28
29#define REPORT_INDEX_OFFSET 1
30#define REPORT_DATA_OFFSET 3
31
32#define SENSOR_RX_MAPPING_OFFSET 1
33#define SENSOR_TX_MAPPING_OFFSET 2
34
35#define CONTROL_0_SIZE 1
36#define CONTROL_1_SIZE 1
37#define CONTROL_2_SIZE 2
38#define CONTROL_3_SIZE 1
39#define CONTROL_4_6_SIZE 3
40#define CONTROL_7_SIZE 1
41#define CONTROL_8_9_SIZE 3
42#define CONTROL_10_SIZE 1
43#define CONTROL_11_SIZE 2
44#define CONTROL_12_13_SIZE 2
45#define CONTROL_14_SIZE 1
46#define CONTROL_15_SIZE 1
47#define CONTROL_16_SIZE 1
48#define CONTROL_17_SIZE 1
49#define CONTROL_18_SIZE 1
50#define CONTROL_19_SIZE 1
51#define CONTROL_20_SIZE 1
52#define CONTROL_21_SIZE 2
53#define CONTROL_22_26_SIZE 7
54#define CONTROL_27_SIZE 1
55#define CONTROL_28_SIZE 2
56#define CONTROL_29_SIZE 1
57#define CONTROL_30_SIZE 1
58#define CONTROL_31_SIZE 1
59#define CONTROL_32_35_SIZE 8
60#define CONTROL_36_SIZE 1
61#define CONTROL_37_SIZE 1
62#define CONTROL_38_SIZE 1
63#define CONTROL_39_SIZE 1
64#define CONTROL_40_SIZE 1
65#define CONTROL_41_SIZE 1
66#define CONTROL_42_SIZE 2
67#define CONTROL_43_54_SIZE 13
68#define CONTROL_55_56_SIZE 2
69#define CONTROL_57_SIZE 1
70#define CONTROL_58_SIZE 1
71#define CONTROL_59_SIZE 2
72#define CONTROL_60_62_SIZE 3
73#define CONTROL_63_SIZE 1
74#define CONTROL_64_67_SIZE 4
75#define CONTROL_68_73_SIZE 8
76#define CONTROL_74_SIZE 2
77#define CONTROL_75_SIZE 1
78#define CONTROL_76_SIZE 1
79#define CONTROL_77_78_SIZE 2
80#define CONTROL_79_83_SIZE 5
81#define CONTROL_84_85_SIZE 2
82#define CONTROL_86_SIZE 1
83#define CONTROL_87_SIZE 1
84#define CONTROL_88_SIZE 1
85#define CONTROL_89_SIZE 1
86#define CONTROL_90_SIZE 1
87#define CONTROL_91_SIZE 1
88#define CONTROL_92_SIZE 1
89#define CONTROL_93_SIZE 1
90#define CONTROL_94_SIZE 1
91#define CONTROL_95_SIZE 1
92#define CONTROL_96_SIZE 1
93#define CONTROL_97_SIZE 1
94#define CONTROL_98_SIZE 1
95#define CONTROL_99_SIZE 1
96#define CONTROL_100_SIZE 1
97#define CONTROL_101_SIZE 1
98#define CONTROL_102_SIZE 1
99#define CONTROL_103_SIZE 1
100#define CONTROL_104_SIZE 1
101#define CONTROL_105_SIZE 1
102#define CONTROL_106_SIZE 1
103#define CONTROL_107_SIZE 1
104#define CONTROL_108_SIZE 1
105#define CONTROL_109_SIZE 1
106#define CONTROL_110_SIZE 1
107#define CONTROL_111_SIZE 1
108#define CONTROL_112_SIZE 1
109#define CONTROL_113_SIZE 1
110#define CONTROL_114_SIZE 1
111#define CONTROL_115_SIZE 1
112#define CONTROL_116_SIZE 1
113#define CONTROL_117_SIZE 1
114#define CONTROL_118_SIZE 1
115#define CONTROL_119_SIZE 1
116#define CONTROL_120_SIZE 1
117#define CONTROL_121_SIZE 1
118#define CONTROL_122_SIZE 1
119#define CONTROL_123_SIZE 1
120#define CONTROL_124_SIZE 1
121#define CONTROL_125_SIZE 1
122#define CONTROL_126_SIZE 1
123#define CONTROL_127_SIZE 1
124#define CONTROL_128_SIZE 1
125#define CONTROL_129_SIZE 1
126#define CONTROL_130_SIZE 1
127#define CONTROL_131_SIZE 1
128#define CONTROL_132_SIZE 1
129#define CONTROL_133_SIZE 1
130#define CONTROL_134_SIZE 1
131#define CONTROL_135_SIZE 1
132#define CONTROL_136_SIZE 1
133#define CONTROL_137_SIZE 1
134#define CONTROL_138_SIZE 1
135#define CONTROL_139_SIZE 1
136#define CONTROL_140_SIZE 1
137#define CONTROL_141_SIZE 1
138#define CONTROL_142_SIZE 1
139#define CONTROL_143_SIZE 1
140#define CONTROL_144_SIZE 1
141#define CONTROL_145_SIZE 1
142#define CONTROL_146_SIZE 1
143#define CONTROL_147_SIZE 1
144#define CONTROL_148_SIZE 1
145#define CONTROL_149_SIZE 1
146
147#define HIGH_RESISTANCE_DATA_SIZE 6
148#define FULL_RAW_CAP_MIN_MAX_DATA_SIZE 4
149#define TRX_OPEN_SHORT_DATA_SIZE 7
150
151enum f54_report_types {
152 F54_8BIT_IMAGE = 1,
153 F54_16BIT_IMAGE = 2,
154 F54_RAW_16BIT_IMAGE = 3,
155 F54_HIGH_RESISTANCE = 4,
156 F54_TX_TO_TX_SHORTS = 5,
157 F54_RX_TO_RX_SHORTS_1 = 7,
158 F54_TRUE_BASELINE = 9,
159 F54_FULL_RAW_CAP_MIN_MAX = 13,
160 F54_RX_OPENS_1 = 14,
161 F54_TX_OPENS = 15,
162 F54_TX_TO_GND_SHORTS = 16,
163 F54_RX_TO_RX_SHORTS_2 = 17,
164 F54_RX_OPENS_2 = 18,
165 F54_FULL_RAW_CAP = 19,
166 F54_FULL_RAW_CAP_NO_RX_COUPLING = 20,
167 F54_SENSOR_SPEED = 22,
168 F54_ADC_RANGE = 23,
169 F54_TRX_OPENS = 24,
170 F54_TRX_TO_GND_SHORTS = 25,
171 F54_TRX_SHORTS = 26,
172 F54_ABS_RAW_CAP = 38,
173 F54_ABS_DELTA_CAP = 40,
174 INVALID_REPORT_TYPE = -1,
175};
176
177struct f54_query {
178 union {
179 struct {
180 /* query 0 */
181 unsigned char num_of_rx_electrodes;
182
183 /* query 1 */
184 unsigned char num_of_tx_electrodes;
185
186 /* query 2 */
187 unsigned char f54_query2_b0__1:2;
188 unsigned char has_baseline:1;
189 unsigned char has_image8:1;
190 unsigned char f54_query2_b4__5:2;
191 unsigned char has_image16:1;
192 unsigned char f54_query2_b7:1;
193
194 /* queries 3.0 and 3.1 */
195 unsigned short clock_rate;
196
197 /* query 4 */
198 unsigned char touch_controller_family;
199
200 /* query 5 */
201 unsigned char has_pixel_touch_threshold_adjustment:1;
202 unsigned char f54_query5_b1__7:7;
203
204 /* query 6 */
205 unsigned char has_sensor_assignment:1;
206 unsigned char has_interference_metric:1;
207 unsigned char has_sense_frequency_control:1;
208 unsigned char has_firmware_noise_mitigation:1;
209 unsigned char has_ctrl11:1;
210 unsigned char has_two_byte_report_rate:1;
211 unsigned char has_one_byte_report_rate:1;
212 unsigned char has_relaxation_control:1;
213
214 /* query 7 */
215 unsigned char curve_compensation_mode:2;
216 unsigned char f54_query7_b2__7:6;
217
218 /* query 8 */
219 unsigned char f54_query8_b0:1;
220 unsigned char has_iir_filter:1;
221 unsigned char has_cmn_removal:1;
222 unsigned char has_cmn_maximum:1;
223 unsigned char has_touch_hysteresis:1;
224 unsigned char has_edge_compensation:1;
225 unsigned char has_per_frequency_noise_control:1;
226 unsigned char has_enhanced_stretch:1;
227
228 /* query 9 */
229 unsigned char has_force_fast_relaxation:1;
230 unsigned char has_multi_metric_state_machine:1;
231 unsigned char has_signal_clarity:1;
232 unsigned char has_variance_metric:1;
233 unsigned char has_0d_relaxation_control:1;
234 unsigned char has_0d_acquisition_control:1;
235 unsigned char has_status:1;
236 unsigned char has_slew_metric:1;
237
238 /* query 10 */
239 unsigned char has_h_blank:1;
240 unsigned char has_v_blank:1;
241 unsigned char has_long_h_blank:1;
242 unsigned char has_startup_fast_relaxation:1;
243 unsigned char has_esd_control:1;
244 unsigned char has_noise_mitigation2:1;
245 unsigned char has_noise_state:1;
246 unsigned char has_energy_ratio_relaxation:1;
247
248 /* query 11 */
249 unsigned char has_excessive_noise_reporting:1;
250 unsigned char has_slew_option:1;
251 unsigned char has_two_overhead_bursts:1;
252 unsigned char has_query13:1;
253 unsigned char has_one_overhead_burst:1;
254 unsigned char f54_query11_b5:1;
255 unsigned char has_ctrl88:1;
256 unsigned char has_query15:1;
257
258 /* query 12 */
259 unsigned char number_of_sensing_frequencies:4;
260 unsigned char f54_query12_b4__7:4;
261 } __attribute__((packed));
262 unsigned char data[14];
263 };
264};
265
266struct f54_query_13 {
267 union {
268 struct {
269 unsigned char has_ctrl86:1;
270 unsigned char has_ctrl87:1;
271 unsigned char has_ctrl87_sub0:1;
272 unsigned char has_ctrl87_sub1:1;
273 unsigned char has_ctrl87_sub2:1;
274 unsigned char has_cidim:1;
275 unsigned char has_noise_mitigation_enhancement:1;
276 unsigned char has_rail_im:1;
277 } __attribute__((packed));
278 unsigned char data[1];
279 };
280};
281
282struct f54_query_15 {
283 union {
284 struct {
285 unsigned char has_ctrl90:1;
286 unsigned char has_transmit_strength:1;
287 unsigned char has_ctrl87_sub3:1;
288 unsigned char has_query16:1;
289 unsigned char has_query20:1;
290 unsigned char has_query21:1;
291 unsigned char has_query22:1;
292 unsigned char has_query25:1;
293 } __attribute__((packed));
294 unsigned char data[1];
295 };
296};
297
298struct f54_query_16 {
299 union {
300 struct {
301 unsigned char has_query17:1;
302 unsigned char has_data17:1;
303 unsigned char has_ctrl92:1;
304 unsigned char has_ctrl93:1;
305 unsigned char has_ctrl94_query18:1;
306 unsigned char has_ctrl95_query19:1;
307 unsigned char has_ctrl99:1;
308 unsigned char has_ctrl100:1;
309 } __attribute__((packed));
310 unsigned char data[1];
311 };
312};
313
314struct f54_query_21 {
315 union {
316 struct {
317 unsigned char has_abs_rx:1;
318 unsigned char has_abs_tx:1;
319 unsigned char has_ctrl91:1;
320 unsigned char has_ctrl96:1;
321 unsigned char has_ctrl97:1;
322 unsigned char has_ctrl98:1;
323 unsigned char has_data19:1;
324 unsigned char has_query24_data18:1;
325 } __attribute__((packed));
326 unsigned char data[1];
327 };
328};
329
330struct f54_query_22 {
331 union {
332 struct {
333 unsigned char has_packed_image:1;
334 unsigned char has_ctrl101:1;
335 unsigned char has_dynamic_sense_display_ratio:1;
336 unsigned char has_query23:1;
337 unsigned char has_ctrl103_query26:1;
338 unsigned char has_ctrl104:1;
339 unsigned char has_ctrl105:1;
340 unsigned char has_query28:1;
341 } __attribute__((packed));
342 unsigned char data[1];
343 };
344};
345
346struct f54_query_23 {
347 union {
348 struct {
349 unsigned char has_ctrl102:1;
350 unsigned char has_ctrl102_sub1:1;
351 unsigned char has_ctrl102_sub2:1;
352 unsigned char has_ctrl102_sub4:1;
353 unsigned char has_ctrl102_sub5:1;
354 unsigned char has_ctrl102_sub9:1;
355 unsigned char has_ctrl102_sub10:1;
356 unsigned char has_ctrl102_sub11:1;
357 } __attribute__((packed));
358 unsigned char data[1];
359 };
360};
361
362struct f54_query_25 {
363 union {
364 struct {
365 unsigned char has_ctrl106:1;
366 unsigned char has_ctrl102_sub12:1;
367 unsigned char has_ctrl107:1;
368 unsigned char has_ctrl108:1;
369 unsigned char has_ctrl109:1;
370 unsigned char has_data20:1;
371 unsigned char f54_query25_b6:1;
372 unsigned char has_query27:1;
373 } __attribute__((packed));
374 unsigned char data[1];
375 };
376};
377
378struct f54_query_27 {
379 union {
380 struct {
381 unsigned char has_ctrl110:1;
382 unsigned char has_data21:1;
383 unsigned char has_ctrl111:1;
384 unsigned char has_ctrl112:1;
385 unsigned char has_ctrl113:1;
386 unsigned char has_data22:1;
387 unsigned char has_ctrl114:1;
388 unsigned char has_query29:1;
389 } __attribute__((packed));
390 unsigned char data[1];
391 };
392};
393
394struct f54_query_29 {
395 union {
396 struct {
397 unsigned char has_ctrl115:1;
398 unsigned char has_ground_ring_options:1;
399 unsigned char has_lost_bursts_tuning:1;
400 unsigned char has_aux_exvcom2_select:1;
401 unsigned char has_ctrl116:1;
402 unsigned char has_data23:1;
403 unsigned char has_ctrl117:1;
404 unsigned char has_query30:1;
405 } __attribute__((packed));
406 unsigned char data[1];
407 };
408};
409
410struct f54_query_30 {
411 union {
412 struct {
413 unsigned char has_ctrl118:1;
414 unsigned char has_ctrl119:1;
415 unsigned char has_ctrl120:1;
416 unsigned char has_ctrl121:1;
417 unsigned char has_ctrl122_query31:1;
418 unsigned char has_ctrl123:1;
419 unsigned char f54_query30_b6:1;
420 unsigned char has_query32:1;
421 } __attribute__((packed));
422 unsigned char data[1];
423 };
424};
425
426struct f54_query_32 {
427 union {
428 struct {
429 unsigned char has_ctrl125:1;
430 unsigned char has_ctrl126:1;
431 unsigned char has_ctrl127:1;
432 unsigned char has_abs_charge_pump_disable:1;
433 unsigned char has_query33:1;
434 unsigned char has_data24:1;
435 unsigned char has_query34:1;
436 unsigned char has_query35:1;
437 } __attribute__((packed));
438 unsigned char data[1];
439 };
440};
441
442struct f54_query_33 {
443 union {
444 struct {
445 unsigned char f54_query33_b0:1;
446 unsigned char f54_query33_b1:1;
447 unsigned char f54_query33_b2:1;
448 unsigned char f54_query33_b3:1;
449 unsigned char has_ctrl132:1;
450 unsigned char has_ctrl133:1;
451 unsigned char has_ctrl134:1;
452 unsigned char has_query36:1;
453 } __attribute__((packed));
454 unsigned char data[1];
455 };
456};
457
458struct f54_query_35 {
459 union {
460 struct {
461 unsigned char has_data25:1;
462 unsigned char f54_query35_b1:1;
463 unsigned char f54_query35_b2:1;
464 unsigned char has_ctrl137:1;
465 unsigned char has_ctrl138:1;
466 unsigned char has_ctrl139:1;
467 unsigned char has_data26:1;
468 unsigned char has_ctrl140:1;
469 } __attribute__((packed));
470 unsigned char data[1];
471 };
472};
473
474struct f54_query_36 {
475 union {
476 struct {
477 unsigned char f54_query36_b0:1;
478 unsigned char has_ctrl142:1;
479 unsigned char has_query37:1;
480 unsigned char has_ctrl143:1;
481 unsigned char has_ctrl144:1;
482 unsigned char has_ctrl145:1;
483 unsigned char has_ctrl146:1;
484 unsigned char has_query38:1;
485 } __attribute__((packed));
486 unsigned char data[1];
487 };
488};
489
490struct f54_query_38 {
491 union {
492 struct {
493 unsigned char has_ctrl147:1;
494 unsigned char has_ctrl148:1;
495 unsigned char has_ctrl149:1;
496 unsigned char f54_query38_b3:1;
497 unsigned char f54_query38_b4:1;
498 unsigned char f54_query38_b5:1;
499 unsigned char f54_query38_b6:1;
500 unsigned char f54_query38_b7:1;
501 } __attribute__((packed));
502 unsigned char data[1];
503 };
504};
505
506struct f54_control_7 {
507 union {
508 struct {
509 unsigned char cbc_cap:3;
510 unsigned char cbc_polarity:1;
511 unsigned char cbc_tx_carrier_selection:1;
512 unsigned char f54_ctrl7_b5__7:3;
513 } __attribute__((packed));
514 struct {
515 unsigned char data[1];
516 unsigned short address;
517 } __attribute__((packed));
518 };
519};
520
521struct f54_control_41 {
522 union {
523 struct {
524 unsigned char no_signal_clarity:1;
525 unsigned char f54_ctrl41_b1__7:7;
526 } __attribute__((packed));
527 struct {
528 unsigned char data[1];
529 unsigned short address;
530 } __attribute__((packed));
531 };
532};
533
534struct f54_control_57 {
535 union {
536 struct {
537 unsigned char cbc_cap:3;
538 unsigned char cbc_polarity:1;
539 unsigned char cbc_tx_carrier_selection:1;
540 unsigned char f54_ctrl57_b5__7:3;
541 } __attribute__((packed));
542 struct {
543 unsigned char data[1];
544 unsigned short address;
545 } __attribute__((packed));
546 };
547};
548
549struct f54_control_88 {
550 union {
551 struct {
552 unsigned char tx_low_reference_polarity:1;
553 unsigned char tx_high_reference_polarity:1;
554 unsigned char abs_low_reference_polarity:1;
555 unsigned char abs_polarity:1;
556 unsigned char cbc_polarity:1;
557 unsigned char cbc_tx_carrier_selection:1;
558 unsigned char charge_pump_enable:1;
559 unsigned char cbc_abs_auto_servo:1;
560 } __attribute__((packed));
561 struct {
562 unsigned char data[1];
563 unsigned short address;
564 } __attribute__((packed));
565 };
566};
567
568struct f54_control_110 {
569 union {
570 struct {
571 unsigned char active_stylus_rx_feedback_cap;
572 unsigned char active_stylus_rx_feedback_cap_reference;
573 unsigned char active_stylus_low_reference;
574 unsigned char active_stylus_high_reference;
575 unsigned char active_stylus_gain_control;
576 unsigned char active_stylus_gain_control_reference;
577 unsigned char active_stylus_timing_mode;
578 unsigned char active_stylus_discovery_bursts;
579 unsigned char active_stylus_detection_bursts;
580 unsigned char active_stylus_discovery_noise_multiplier;
581 unsigned char active_stylus_detection_envelope_min;
582 unsigned char active_stylus_detection_envelope_max;
583 unsigned char active_stylus_lose_count;
584 } __attribute__((packed));
585 struct {
586 unsigned char data[13];
587 unsigned short address;
588 } __attribute__((packed));
589 };
590};
591
592struct f54_control_149 {
593 union {
594 struct {
595 unsigned char trans_cbc_global_cap_enable:1;
596 unsigned char f54_ctrl49_b1__7:7;
597 } __attribute__((packed));
598 struct {
599 unsigned char data[1];
600 unsigned short address;
601 } __attribute__((packed));
602 };
603};
604
605struct f54_control {
606 struct f54_control_7 reg_7;
607 struct f54_control_41 reg_41;
608 struct f54_control_57 reg_57;
609 struct f54_control_88 reg_88;
610 struct f54_control_110 reg_110;
611 struct f54_control_149 reg_149;
612};
613
614struct f55_query {
615 union {
616 struct {
617 /* query 0 */
618 unsigned char num_of_rx_electrodes;
619
620 /* query 1 */
621 unsigned char num_of_tx_electrodes;
622
623 /* query 2 */
624 unsigned char has_sensor_assignment:1;
625 unsigned char has_edge_compensation:1;
626 unsigned char curve_compensation_mode:2;
627 unsigned char has_ctrl6:1;
628 unsigned char has_alternate_transmitter_assignment:1;
629 unsigned char has_single_layer_multi_touch:1;
630 unsigned char has_query5:1;
631 } __attribute__((packed));
632 unsigned char data[3];
633 };
634};
635
636class Display;
637
638class F54Test
639{
640public:
641 F54Test(RMIDevice & device, Display & display)
642 : m_device(device),
643 m_reportType(INVALID_REPORT_TYPE),
644 m_txAssignment(NULL),
645 m_rxAssignment(NULL),
646 m_reportBufferSize(0),
647 m_reportData(NULL),
648 m_display(display)
649 {}
650 ~F54Test();
651 int Prepare(f54_report_types reportType);
652 int Run();
653
654private:
655 int FindTestFunctions();
656 int ReadF54Queries();
657 int ReadF55Queries();
658 int SetupF54Controls();
659 int SetF54ReportType(f54_report_types report_type);
660 int SetF54ReportSize(f54_report_types report_type);
661 int SetF54Interrupt();
662 int DoF54Command(unsigned char command);
663 int WaitForF54CommandCompletion();
664 int ReadF54Report();
665 int ShowF54Report();
666
667private:
668 RMIDevice & m_device;
669
670 RMIFunction m_f01;
671 RMIFunction m_f54;
672 RMIFunction m_f55;
673
674 f54_query m_f54Query;
675 f54_query_13 m_f54Query_13;
676 f54_query_15 m_f54Query_15;
677 f54_query_16 m_f54Query_16;
678 f54_query_21 m_f54Query_21;
679 f54_query_22 m_f54Query_22;
680 f54_query_23 m_f54Query_23;
681 f54_query_25 m_f54Query_25;
682 f54_query_27 m_f54Query_27;
683 f54_query_29 m_f54Query_29;
684 f54_query_30 m_f54Query_30;
685 f54_query_32 m_f54Query_32;
686 f54_query_33 m_f54Query_33;
687 f54_query_35 m_f54Query_35;
688 f54_query_36 m_f54Query_36;
689 f54_query_38 m_f54Query_38;
690
691 f54_control m_f54Control;
692
693 f55_query m_f55Query;
694
695 f54_report_types m_reportType;
696 unsigned int m_reportSize;
697
698 unsigned char *m_txAssignment;
699 unsigned char *m_rxAssignment;
700 unsigned char m_txAssigned;
701 unsigned char m_rxAssigned;
702
703 unsigned int m_reportBufferSize;
704 unsigned char *m_reportData;
705
706 Display & m_display;
707};
708
709#endif // _F54TEST_H_