jvanverth | 9367992 | 2014-11-26 13:15:59 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Google Inc. |
| 3 | * |
| 4 | * Use of this source code is governed by a BSD-style license that can be |
| 5 | * found in the LICENSE file. |
| 6 | */ |
| 7 | |
| 8 | #ifndef SkHalf_DEFINED |
| 9 | #define SkHalf_DEFINED |
| 10 | |
mtklein | fff055c | 2016-02-11 06:30:03 -0800 | [diff] [blame] | 11 | #include "SkNx.h" |
jvanverth | 9367992 | 2014-11-26 13:15:59 -0800 | [diff] [blame] | 12 | #include "SkTypes.h" |
| 13 | |
| 14 | // 16-bit floating point value |
| 15 | // format is 1 bit sign, 5 bits exponent, 10 bits mantissa |
| 16 | // only used for storage |
| 17 | typedef uint16_t SkHalf; |
| 18 | |
msarett | 6bdbf44 | 2016-07-19 09:07:55 -0700 | [diff] [blame] | 19 | static constexpr uint16_t SK_HalfMin = 0x0400; // 2^-24 (minimum positive normal value) |
| 20 | static constexpr uint16_t SK_HalfMax = 0x7bff; // 65504 |
| 21 | static constexpr uint16_t SK_HalfEpsilon = 0x1400; // 2^-10 |
| 22 | static constexpr uint16_t SK_Half1 = 0x3C00; // 1 |
jvanverth | 28f9c60 | 2014-12-05 13:06:35 -0800 | [diff] [blame] | 23 | |
jvanverth | 9367992 | 2014-11-26 13:15:59 -0800 | [diff] [blame] | 24 | // convert between half and single precision floating point |
| 25 | float SkHalfToFloat(SkHalf h); |
| 26 | SkHalf SkFloatToHalf(float f); |
| 27 | |
mtklein | 58e389b | 2016-07-15 07:00:11 -0700 | [diff] [blame] | 28 | // Convert between half and single precision floating point, |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 29 | // assuming inputs and outputs are both finite, and |
| 30 | // flushing values which would be denormal half floats to zero. |
| 31 | static inline Sk4f SkHalfToFloat_finite_ftz(uint64_t); |
| 32 | static inline Sk4h SkFloatToHalf_finite_ftz(const Sk4f&); |
mtklein | fff055c | 2016-02-11 06:30:03 -0800 | [diff] [blame] | 33 | |
| 34 | // ~~~~~~~~~~~ impl ~~~~~~~~~~~~~~ // |
| 35 | |
| 36 | // Like the serial versions in SkHalf.cpp, these are based on |
| 37 | // https://fgiesen.wordpress.com/2012/03/28/half-to-float-done-quic/ |
| 38 | |
mtklein | be8c19e | 2016-02-19 09:40:24 -0800 | [diff] [blame] | 39 | // GCC 4.9 lacks the intrinsics to use ARMv8 f16<->f32 instructions, so we use inline assembly. |
| 40 | |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 41 | static inline Sk4f SkHalfToFloat_finite_ftz(const Sk4h& hs) { |
mtklein | be8c19e | 2016-02-19 09:40:24 -0800 | [diff] [blame] | 42 | #if !defined(SKNX_NO_SIMD) && defined(SK_CPU_ARM64) |
| 43 | float32x4_t fs; |
mtklein | f660b7c | 2016-07-26 08:01:19 -0700 | [diff] [blame] | 44 | asm ("fcvtl %[fs].4s, %[hs].4h \n" // vcvt_f32_f16(...) |
mtklein | be8c19e | 2016-02-19 09:40:24 -0800 | [diff] [blame] | 45 | : [fs] "=w" (fs) // =w: write-only NEON register |
mtklein | f660b7c | 2016-07-26 08:01:19 -0700 | [diff] [blame] | 46 | : [hs] "w" (hs.fVec)); // w: read-only NEON register |
mtklein | be8c19e | 2016-02-19 09:40:24 -0800 | [diff] [blame] | 47 | return fs; |
mtklein | fff055c | 2016-02-11 06:30:03 -0800 | [diff] [blame] | 48 | #else |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 49 | Sk4i bits = SkNx_cast<int>(hs), // Expand to 32 bit. |
| 50 | sign = bits & 0x00008000, // Save the sign bit for later... |
| 51 | positive = bits ^ sign, // ...but strip it off for now. |
| 52 | is_norm = 0x03ff < positive; // Exponent > 0? |
mtklein | 58e389b | 2016-07-15 07:00:11 -0700 | [diff] [blame] | 53 | |
| 54 | // For normal half floats, extend the mantissa by 13 zero bits, |
| 55 | // then adjust the exponent from 15 bias to 127 bias. |
| 56 | Sk4i norm = (positive << 13) + ((127 - 15) << 23); |
| 57 | |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 58 | Sk4i merged = (sign << 16) | (norm & is_norm); |
mtklein | 58e389b | 2016-07-15 07:00:11 -0700 | [diff] [blame] | 59 | return Sk4f::Load(&merged); |
mtklein | fff055c | 2016-02-11 06:30:03 -0800 | [diff] [blame] | 60 | #endif |
| 61 | } |
| 62 | |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 63 | static inline Sk4f SkHalfToFloat_finite_ftz(uint64_t hs) { |
| 64 | return SkHalfToFloat_finite_ftz(Sk4h::Load(&hs)); |
mtklein | f660b7c | 2016-07-26 08:01:19 -0700 | [diff] [blame] | 65 | } |
| 66 | |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 67 | static inline Sk4h SkFloatToHalf_finite_ftz(const Sk4f& fs) { |
mtklein | be8c19e | 2016-02-19 09:40:24 -0800 | [diff] [blame] | 68 | #if !defined(SKNX_NO_SIMD) && defined(SK_CPU_ARM64) |
| 69 | float32x4_t vec = fs.fVec; |
| 70 | asm ("fcvtn %[vec].4h, %[vec].4s \n" // vcvt_f16_f32(vec) |
msarett | 6bdbf44 | 2016-07-19 09:07:55 -0700 | [diff] [blame] | 71 | : [vec] "+w" (vec)); // +w: read-write NEON register |
| 72 | return vreinterpret_u16_f32(vget_low_f32(vec)); |
mtklein | fff055c | 2016-02-11 06:30:03 -0800 | [diff] [blame] | 73 | #else |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 74 | Sk4i bits = Sk4i::Load(&fs), |
| 75 | sign = bits & 0x80000000, // Save the sign bit for later... |
| 76 | positive = bits ^ sign, // ...but strip it off for now. |
| 77 | will_be_norm = 0x387fdfff < positive; // greater than largest denorm half? |
mtklein | 58e389b | 2016-07-15 07:00:11 -0700 | [diff] [blame] | 78 | |
| 79 | // For normal half floats, adjust the exponent from 127 bias to 15 bias, |
| 80 | // then drop the bottom 13 mantissa bits. |
| 81 | Sk4i norm = (positive - ((127 - 15) << 23)) >> 13; |
| 82 | |
mtklein | 8ae991e | 2016-08-22 13:20:18 -0700 | [diff] [blame^] | 83 | Sk4i merged = (sign >> 16) | (will_be_norm & norm); |
msarett | 6bdbf44 | 2016-07-19 09:07:55 -0700 | [diff] [blame] | 84 | return SkNx_cast<uint16_t>(merged); |
mtklein | fff055c | 2016-02-11 06:30:03 -0800 | [diff] [blame] | 85 | #endif |
| 86 | } |
| 87 | |
jvanverth | 9367992 | 2014-11-26 13:15:59 -0800 | [diff] [blame] | 88 | #endif |