Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 1 | A8 over A8 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 2 | 3 registers, 15 instructions: |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 3 | r0 = load8 arg(0) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 4 | r1 = splat 3B808081 (0.0039215689) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 5 | r0 = to_f32 r0 |
| 6 | r0 = mul_f32 r1 r0 |
| 7 | r2 = load8 arg(1) |
| 8 | r2 = to_f32 r2 |
| 9 | r2 = mul_f32 r1 r2 |
| 10 | r1 = splat 3F800000 (1) |
| 11 | r1 = sub_f32 r1 r0 |
| 12 | r1 = mad_f32 r2 r1 r0 |
| 13 | r2 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 14 | r0 = splat 3F000000 (0.5) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 15 | r0 = mad_f32 r1 r2 r0 |
| 16 | r0 = to_i32 r0 |
| 17 | store8 arg(1) r0 |
| 18 | |
| 19 | A8 over G8 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 20 | 4 registers, 21 instructions: |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 21 | r0 = load8 arg(0) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 22 | r1 = splat 3B808081 (0.0039215689) |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 23 | r0 = to_f32 r0 |
| 24 | r0 = mul_f32 r1 r0 |
| 25 | r2 = load8 arg(1) |
| 26 | r2 = to_f32 r2 |
| 27 | r2 = mul_f32 r1 r2 |
| 28 | r1 = splat 3F800000 (1) |
| 29 | r1 = sub_f32 r1 r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 30 | r1 = mul_f32 r2 r1 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 31 | r2 = splat 3E59B3D0 (0.21259999) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 32 | r0 = splat 3F371759 (0.71520001) |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 33 | r3 = splat 3D93DD98 (0.0722) |
| 34 | r3 = mul_f32 r1 r3 |
| 35 | r3 = mad_f32 r1 r0 r3 |
| 36 | r3 = mad_f32 r1 r2 r3 |
| 37 | r2 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 38 | r1 = splat 3F000000 (0.5) |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 39 | r1 = mad_f32 r3 r2 r1 |
| 40 | r1 = to_i32 r1 |
| 41 | store8 arg(1) r1 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 42 | |
| 43 | A8 over RGBA_8888 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 44 | 6 registers, 37 instructions: |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 45 | r0 = load8 arg(0) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 46 | r1 = splat 3B808081 (0.0039215689) |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 47 | r0 = to_f32 r0 |
| 48 | r0 = mul_f32 r1 r0 |
| 49 | r2 = load32 arg(1) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 50 | r3 = extract r2 FF |
| 51 | r3 = to_f32 r3 |
| 52 | r3 = mul_f32 r1 r3 |
| 53 | r4 = extract r2 FF00 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 54 | r4 = to_f32 r4 |
| 55 | r4 = mul_f32 r1 r4 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 56 | r5 = extract r2 FF0000 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 57 | r5 = to_f32 r5 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 58 | r5 = mul_f32 r1 r5 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 59 | r2 = shr r2 24 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 60 | r2 = to_f32 r2 |
| 61 | r2 = mul_f32 r1 r2 |
| 62 | r1 = splat 3F800000 (1) |
| 63 | r1 = sub_f32 r1 r0 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 64 | r3 = mul_f32 r3 r1 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 65 | r4 = mul_f32 r4 r1 |
| 66 | r5 = mul_f32 r5 r1 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 67 | r1 = mad_f32 r2 r1 r0 |
| 68 | r2 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 69 | r0 = splat 3F000000 (0.5) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 70 | r3 = mad_f32 r3 r2 r0 |
| 71 | r3 = to_i32 r3 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 72 | r4 = mad_f32 r4 r2 r0 |
| 73 | r4 = to_i32 r4 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 74 | r5 = mad_f32 r5 r2 r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 75 | r5 = to_i32 r5 |
Mike Klein | 1281851 | 2019-06-03 16:32:49 -0500 | [diff] [blame] | 76 | r0 = mad_f32 r1 r2 r0 |
| 77 | r0 = to_i32 r0 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 78 | r4 = pack r3 r4 8 |
| 79 | r0 = pack r5 r0 8 |
| 80 | r0 = pack r4 r0 16 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 81 | store32 arg(1) r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 82 | |
| 83 | G8 over A8 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 84 | 3 registers, 12 instructions: |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 85 | r0 = splat 3B808081 (0.0039215689) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 86 | r1 = splat 3F800000 (1) |
| 87 | r2 = load8 arg(1) |
| 88 | r2 = to_f32 r2 |
| 89 | r2 = mul_f32 r0 r2 |
| 90 | r0 = sub_f32 r1 r1 |
| 91 | r0 = mad_f32 r2 r0 r1 |
| 92 | r2 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 93 | r1 = splat 3F000000 (0.5) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 94 | r1 = mad_f32 r0 r2 r1 |
| 95 | r1 = to_i32 r1 |
| 96 | store8 arg(1) r1 |
| 97 | |
| 98 | G8 over G8 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 99 | 4 registers, 21 instructions: |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 100 | r0 = load8 arg(0) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 101 | r1 = splat 3B808081 (0.0039215689) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 102 | r0 = to_f32 r0 |
| 103 | r0 = mul_f32 r1 r0 |
| 104 | r2 = splat 3F800000 (1) |
| 105 | r3 = load8 arg(1) |
| 106 | r3 = to_f32 r3 |
| 107 | r3 = mul_f32 r1 r3 |
| 108 | r2 = sub_f32 r2 r2 |
| 109 | r2 = mad_f32 r3 r2 r0 |
| 110 | r3 = splat 3E59B3D0 (0.21259999) |
| 111 | r0 = splat 3F371759 (0.71520001) |
| 112 | r1 = splat 3D93DD98 (0.0722) |
| 113 | r1 = mul_f32 r2 r1 |
| 114 | r1 = mad_f32 r2 r0 r1 |
| 115 | r1 = mad_f32 r2 r3 r1 |
| 116 | r3 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 117 | r2 = splat 3F000000 (0.5) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 118 | r2 = mad_f32 r1 r3 r2 |
| 119 | r2 = to_i32 r2 |
| 120 | store8 arg(1) r2 |
| 121 | |
| 122 | G8 over RGBA_8888 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 123 | 7 registers, 37 instructions: |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 124 | r0 = load8 arg(0) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 125 | r1 = splat 3B808081 (0.0039215689) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 126 | r0 = to_f32 r0 |
| 127 | r0 = mul_f32 r1 r0 |
| 128 | r2 = splat 3F800000 (1) |
| 129 | r3 = load32 arg(1) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 130 | r4 = extract r3 FF |
| 131 | r4 = to_f32 r4 |
| 132 | r4 = mul_f32 r1 r4 |
| 133 | r5 = extract r3 FF00 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 134 | r5 = to_f32 r5 |
| 135 | r5 = mul_f32 r1 r5 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 136 | r6 = extract r3 FF0000 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 137 | r6 = to_f32 r6 |
| 138 | r6 = mul_f32 r1 r6 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 139 | r3 = shr r3 24 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 140 | r3 = to_f32 r3 |
| 141 | r3 = mul_f32 r1 r3 |
| 142 | r1 = sub_f32 r2 r2 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 143 | r4 = mad_f32 r4 r1 r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 144 | r5 = mad_f32 r5 r1 r0 |
| 145 | r6 = mad_f32 r6 r1 r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 146 | r1 = mad_f32 r3 r1 r2 |
| 147 | r3 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 148 | r2 = splat 3F000000 (0.5) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 149 | r4 = mad_f32 r4 r3 r2 |
| 150 | r4 = to_i32 r4 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 151 | r5 = mad_f32 r5 r3 r2 |
| 152 | r5 = to_i32 r5 |
| 153 | r6 = mad_f32 r6 r3 r2 |
| 154 | r6 = to_i32 r6 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 155 | r2 = mad_f32 r1 r3 r2 |
| 156 | r2 = to_i32 r2 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 157 | r5 = pack r4 r5 8 |
| 158 | r2 = pack r6 r2 8 |
| 159 | r2 = pack r5 r2 16 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 160 | store32 arg(1) r2 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 161 | |
| 162 | RGBA_8888 over A8 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 163 | 3 registers, 16 instructions: |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 164 | r0 = load32 arg(0) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 165 | r1 = splat 3B808081 (0.0039215689) |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 166 | r0 = shr r0 24 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 167 | r0 = to_f32 r0 |
| 168 | r0 = mul_f32 r1 r0 |
| 169 | r2 = load8 arg(1) |
| 170 | r2 = to_f32 r2 |
| 171 | r2 = mul_f32 r1 r2 |
| 172 | r1 = splat 3F800000 (1) |
| 173 | r1 = sub_f32 r1 r0 |
| 174 | r1 = mad_f32 r2 r1 r0 |
| 175 | r2 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 176 | r0 = splat 3F000000 (0.5) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 177 | r0 = mad_f32 r1 r2 r0 |
| 178 | r0 = to_i32 r0 |
| 179 | store8 arg(1) r0 |
| 180 | |
| 181 | RGBA_8888 over G8 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 182 | 6 registers, 33 instructions: |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 183 | r0 = load32 arg(0) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 184 | r1 = extract r0 FF |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 185 | r2 = splat 3B808081 (0.0039215689) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 186 | r1 = to_f32 r1 |
| 187 | r1 = mul_f32 r2 r1 |
| 188 | r3 = extract r0 FF00 |
| 189 | r3 = to_f32 r3 |
| 190 | r3 = mul_f32 r2 r3 |
| 191 | r4 = extract r0 FF0000 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 192 | r4 = to_f32 r4 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 193 | r4 = mul_f32 r2 r4 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 194 | r0 = shr r0 24 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 195 | r0 = to_f32 r0 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 196 | r0 = mul_f32 r2 r0 |
| 197 | r5 = load8 arg(1) |
| 198 | r5 = to_f32 r5 |
| 199 | r5 = mul_f32 r2 r5 |
| 200 | r2 = splat 3F800000 (1) |
| 201 | r2 = sub_f32 r2 r0 |
| 202 | r1 = mad_f32 r5 r2 r1 |
| 203 | r3 = mad_f32 r5 r2 r3 |
| 204 | r2 = mad_f32 r5 r2 r4 |
| 205 | r5 = splat 3E59B3D0 (0.21259999) |
| 206 | r4 = splat 3F371759 (0.71520001) |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 207 | r0 = splat 3D93DD98 (0.0722) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 208 | r0 = mul_f32 r2 r0 |
| 209 | r0 = mad_f32 r3 r4 r0 |
| 210 | r0 = mad_f32 r1 r5 r0 |
| 211 | r5 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 212 | r1 = splat 3F000000 (0.5) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 213 | r1 = mad_f32 r0 r5 r1 |
| 214 | r1 = to_i32 r1 |
| 215 | store8 arg(1) r1 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 216 | |
| 217 | RGBA_8888 over RGBA_8888 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 218 | 9 registers, 47 instructions: |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 219 | r0 = load32 arg(0) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 220 | r1 = extract r0 FF |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 221 | r2 = splat 3B808081 (0.0039215689) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 222 | r1 = to_f32 r1 |
| 223 | r1 = mul_f32 r2 r1 |
| 224 | r3 = extract r0 FF00 |
| 225 | r3 = to_f32 r3 |
| 226 | r3 = mul_f32 r2 r3 |
| 227 | r4 = extract r0 FF0000 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 228 | r4 = to_f32 r4 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 229 | r4 = mul_f32 r2 r4 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 230 | r0 = shr r0 24 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 231 | r0 = to_f32 r0 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 232 | r0 = mul_f32 r2 r0 |
| 233 | r5 = load32 arg(1) |
| 234 | r6 = extract r5 FF |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 235 | r6 = to_f32 r6 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 236 | r6 = mul_f32 r2 r6 |
| 237 | r7 = extract r5 FF00 |
| 238 | r7 = to_f32 r7 |
| 239 | r7 = mul_f32 r2 r7 |
| 240 | r8 = extract r5 FF0000 |
| 241 | r8 = to_f32 r8 |
| 242 | r8 = mul_f32 r2 r8 |
| 243 | r5 = shr r5 24 |
| 244 | r5 = to_f32 r5 |
| 245 | r5 = mul_f32 r2 r5 |
| 246 | r2 = splat 3F800000 (1) |
| 247 | r2 = sub_f32 r2 r0 |
| 248 | r6 = mad_f32 r6 r2 r1 |
| 249 | r7 = mad_f32 r7 r2 r3 |
| 250 | r8 = mad_f32 r8 r2 r4 |
| 251 | r2 = mad_f32 r5 r2 r0 |
| 252 | r5 = splat 437F0000 (255) |
Mike Klein | c2d9a31 | 2019-06-05 14:12:16 +0000 | [diff] [blame^] | 253 | r0 = splat 3F000000 (0.5) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 254 | r6 = mad_f32 r6 r5 r0 |
| 255 | r6 = to_i32 r6 |
| 256 | r7 = mad_f32 r7 r5 r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 257 | r7 = to_i32 r7 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 258 | r8 = mad_f32 r8 r5 r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 259 | r8 = to_i32 r8 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 260 | r0 = mad_f32 r2 r5 r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 261 | r0 = to_i32 r0 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 262 | r7 = pack r6 r7 8 |
| 263 | r0 = pack r8 r0 8 |
| 264 | r0 = pack r7 r0 16 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 265 | store32 arg(1) r0 |
Mike Klein | 267f507 | 2019-06-03 16:27:46 -0500 | [diff] [blame] | 266 | |
Mike Klein | 7b7077c | 2019-06-03 17:10:59 -0500 | [diff] [blame] | 267 | I32 8888 over 8888 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 268 | 9 registers, 24 instructions: |
Mike Klein | 7b7077c | 2019-06-03 17:10:59 -0500 | [diff] [blame] | 269 | r0 = load32 arg(0) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 270 | r1 = extract r0 FF |
| 271 | r2 = extract r0 FF00 |
| 272 | r3 = extract r0 FF0000 |
Mike Klein | 1665aaa | 2019-06-04 10:41:49 -0500 | [diff] [blame] | 273 | r0 = shr r0 24 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 274 | r4 = load32 arg(1) |
| 275 | r5 = extract r4 FF |
| 276 | r6 = extract r4 FF00 |
| 277 | r7 = extract r4 FF0000 |
| 278 | r4 = shr r4 24 |
| 279 | r8 = splat FF (3.5733111e-43) |
| 280 | r8 = sub_i32 r8 r0 |
| 281 | r5 = mul_unorm8 r5 r8 |
| 282 | r5 = add_i32 r1 r5 |
| 283 | r6 = mul_unorm8 r6 r8 |
Mike Klein | 7b7077c | 2019-06-03 17:10:59 -0500 | [diff] [blame] | 284 | r6 = add_i32 r2 r6 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 285 | r7 = mul_unorm8 r7 r8 |
Mike Klein | 7b7077c | 2019-06-03 17:10:59 -0500 | [diff] [blame] | 286 | r7 = add_i32 r3 r7 |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 287 | r8 = mul_unorm8 r4 r8 |
| 288 | r8 = add_i32 r0 r8 |
| 289 | r6 = pack r5 r6 8 |
| 290 | r8 = pack r7 r8 8 |
| 291 | r8 = pack r6 r8 16 |
| 292 | store32 arg(1) r8 |
Mike Klein | 7b7077c | 2019-06-03 17:10:59 -0500 | [diff] [blame] | 293 | |
| 294 | I32 (SWAR) 8888 over 8888 |
Mike Klein | 3c00d3d | 2019-06-04 11:47:55 -0500 | [diff] [blame] | 295 | 6 registers, 20 instructions: |
Mike Klein | 7b7077c | 2019-06-03 17:10:59 -0500 | [diff] [blame] | 296 | r0 = load32 arg(0) |
Mike Klein | 9656dce | 2019-06-04 11:33:25 -0500 | [diff] [blame] | 297 | r1 = extract r0 FF00FF |
| 298 | r0 = extract r0 FF00FF00 |
| 299 | r2 = load32 arg(1) |
| 300 | r3 = extract r2 FF00FF |
| 301 | r2 = extract r2 FF00FF00 |
| 302 | r4 = splat FF (3.5733111e-43) |
| 303 | r5 = shr r0 16 |
| 304 | r5 = sub_i32 r4 r5 |
| 305 | r4 = splat FF00FF (2.3418409e-38) |
| 306 | r3 = mul_i32 r3 r5 |
| 307 | r3 = add_i32 r3 r4 |
| 308 | r3 = extract r3 FF00FF00 |
| 309 | r3 = add_i32 r1 r3 |
| 310 | r5 = mul_i32 r2 r5 |
| 311 | r5 = add_i32 r5 r4 |
| 312 | r5 = extract r5 FF00FF00 |
| 313 | r5 = add_i32 r0 r5 |
| 314 | r5 = pack r3 r5 8 |
| 315 | store32 arg(1) r5 |
Mike Klein | 7b7077c | 2019-06-03 17:10:59 -0500 | [diff] [blame] | 316 | |