Subzero: Convert NULL->nullptr.
This is limited to the src directory, and not (yet) the crosstest directory.
BUG= none
R=jfb@chromium.org
Review URL: https://codereview.chromium.org/814353002
diff --git a/src/IceCfg.cpp b/src/IceCfg.cpp
index 59723ec..2f0e994 100644
--- a/src/IceCfg.cpp
+++ b/src/IceCfg.cpp
@@ -23,7 +23,7 @@
namespace Ice {
-thread_local const Cfg *Cfg::CurrentCfg = NULL;
+thread_local const Cfg *Cfg::CurrentCfg = nullptr;
ArenaAllocator *getCurrentCfgAllocator() {
return Cfg::getCurrentCfgAllocator();
@@ -32,23 +32,23 @@
Cfg::Cfg(GlobalContext *Ctx)
: Ctx(Ctx), FunctionName(""), ReturnType(IceType_void),
IsInternalLinkage(false), HasError(false), FocusedTiming(false),
- ErrorMessage(""), Entry(NULL), NextInstNumber(Inst::NumberInitial),
+ ErrorMessage(""), Entry(nullptr), NextInstNumber(Inst::NumberInitial),
Allocator(new ArenaAllocator()), Live(nullptr),
Target(TargetLowering::createLowering(Ctx->getTargetArch(), this)),
VMetadata(new VariablesMetadata(this)),
TargetAssembler(
TargetLowering::createAssembler(Ctx->getTargetArch(), this)),
- CurrentNode(NULL) {
+ CurrentNode(nullptr) {
assert(!Ctx->isIRGenerationDisabled() &&
"Attempt to build cfg when IR generation disabled");
}
Cfg::~Cfg() {
- // TODO(stichnot,kschimpf): Set CurrentCfg=NULL in the dtor for
+ // TODO(stichnot,kschimpf): Set CurrentCfg=nullptr in the dtor for
// safety. This can't be done currently because the translator
// manages the Cfg by creating a new Cfg (which sets CurrentCfg to
// the new value), then deleting the old Cfg (which would then reset
- // CurrentCfg to NULL).
+ // CurrentCfg to nullptr).
}
void Cfg::setError(const IceString &Message) {
@@ -338,12 +338,12 @@
bool Valid = true;
Ostream &Str = Ctx->getStrDump();
for (CfgNode *Node : Nodes) {
- Inst *FirstInst = NULL;
+ Inst *FirstInst = nullptr;
for (auto Inst = Node->getInsts().begin(), E = Node->getInsts().end();
Inst != E; ++Inst) {
if (Inst->isDeleted())
continue;
- if (FirstInst == NULL)
+ if (FirstInst == nullptr)
FirstInst = Inst;
InstNumberT InstNumber = Inst->getNumber();
if (Variable *Dest = Inst->getDest()) {
@@ -410,7 +410,7 @@
for (auto I = Nodes.begin(), E = Nodes.end(); I != E; ++I) {
auto NextNode = I;
++NextNode;
- (*I)->doBranchOpt(NextNode == E ? NULL : *NextNode);
+ (*I)->doBranchOpt(NextNode == E ? nullptr : *NextNode);
}
}
diff --git a/src/IceCfg.h b/src/IceCfg.h
index f037709..1db1357 100644
--- a/src/IceCfg.h
+++ b/src/IceCfg.h
@@ -154,7 +154,7 @@
// Manage the CurrentNode field, which is used for validating the
// Variable::DefNode field during dumping/emitting.
void setCurrentNode(const CfgNode *Node) { CurrentNode = Node; }
- void resetCurrentNode() { setCurrentNode(NULL); }
+ void resetCurrentNode() { setCurrentNode(nullptr); }
const CfgNode *getCurrentNode() const { return CurrentNode; }
void emit();
diff --git a/src/IceCfgNode.cpp b/src/IceCfgNode.cpp
index 42731ad..c542693 100644
--- a/src/IceCfgNode.cpp
+++ b/src/IceCfgNode.cpp
@@ -164,7 +164,7 @@
// Keep track of the dest variable of a compare instruction, so that
// we insert the new instruction at the SafeInsertionPoint if the
// compare's dest matches the Phi-lowered assignment's source.
- Variable *CmpInstDest = NULL;
+ Variable *CmpInstDest = nullptr;
// If the current insertion point is at a conditional branch
// instruction, and the previous instruction is a compare
// instruction, then we move the insertion point before the compare
@@ -553,8 +553,8 @@
bool CfgNode::liveness(Liveness *Liveness) {
SizeT NumVars = Liveness->getNumVarsInNode(this);
LivenessBV Live(NumVars);
- LiveBeginEndMap *LiveBegin = NULL;
- LiveBeginEndMap *LiveEnd = NULL;
+ LiveBeginEndMap *LiveBegin = nullptr;
+ LiveBeginEndMap *LiveEnd = nullptr;
// Mark the beginning and ending of each variable's live range
// with the sentinel instruction number 0.
if (Liveness->getMode() == Liveness_Intervals) {
@@ -723,7 +723,7 @@
void CfgNode::contractIfEmpty() {
if (InEdges.empty())
return;
- Inst *Branch = NULL;
+ Inst *Branch = nullptr;
for (auto I = Insts.begin(), E = Insts.end(); I != E; ++I) {
if (I->isDeleted())
continue;
diff --git a/src/IceGlobalContext.cpp b/src/IceGlobalContext.cpp
index 2903dde..eb312f9 100644
--- a/src/IceGlobalContext.cpp
+++ b/src/IceGlobalContext.cpp
@@ -78,7 +78,7 @@
UndefPool() : NextPoolID(0), Pool(IceType_NUM) {}
ConstantUndef *getOrAdd(GlobalContext *Ctx, Type Ty) {
- if (Pool[Ty] == NULL)
+ if (Pool[Ty] == nullptr)
Pool[Ty] = ConstantUndef::create(Ctx, Ty, NextPoolID++);
return Pool[Ty];
}
@@ -325,7 +325,7 @@
default:
llvm_unreachable("Bad integer type for getConstant");
}
- return NULL;
+ return nullptr;
}
Constant *GlobalContext::getConstantInt1(int8_t ConstantInt1) {
diff --git a/src/IceInst.cpp b/src/IceInst.cpp
index 0ad8000..845a6db 100644
--- a/src/IceInst.cpp
+++ b/src/IceInst.cpp
@@ -235,18 +235,18 @@
// semantics, there is at most one edge from one node to another.
InstBr::InstBr(Cfg *Func, Operand *Source, CfgNode *TargetTrue,
CfgNode *TargetFalse)
- : InstHighLevel(Func, Inst::Br, 1, NULL), TargetFalse(TargetFalse),
+ : InstHighLevel(Func, Inst::Br, 1, nullptr), TargetFalse(TargetFalse),
TargetTrue(TargetTrue) {
if (TargetTrue == TargetFalse) {
- TargetTrue = NULL; // turn into unconditional version
+ TargetTrue = nullptr; // turn into unconditional version
} else {
addSource(Source);
}
}
InstBr::InstBr(Cfg *Func, CfgNode *Target)
- : InstHighLevel(Func, Inst::Br, 0, NULL), TargetFalse(Target),
- TargetTrue(NULL) {}
+ : InstHighLevel(Func, Inst::Br, 0, nullptr), TargetFalse(Target),
+ TargetTrue(nullptr) {}
NodeList InstBr::getTerminatorEdges() const {
NodeList OutEdges;
@@ -331,7 +331,7 @@
return getSrc(I);
}
llvm_unreachable("Phi target not found");
- return NULL;
+ return nullptr;
}
// Updates liveness for a particular operand based on the given
@@ -369,7 +369,7 @@
}
InstRet::InstRet(Cfg *Func, Operand *RetValue)
- : InstHighLevel(Func, Ret, RetValue ? 1 : 0, NULL) {
+ : InstHighLevel(Func, Ret, RetValue ? 1 : 0, nullptr) {
if (RetValue)
addSource(RetValue);
}
@@ -384,14 +384,14 @@
}
InstStore::InstStore(Cfg *Func, Operand *Data, Operand *Addr)
- : InstHighLevel(Func, Inst::Store, 2, NULL) {
+ : InstHighLevel(Func, Inst::Store, 2, nullptr) {
addSource(Data);
addSource(Addr);
}
InstSwitch::InstSwitch(Cfg *Func, SizeT NumCases, Operand *Source,
CfgNode *LabelDefault)
- : InstHighLevel(Func, Inst::Switch, 1, NULL), LabelDefault(LabelDefault),
+ : InstHighLevel(Func, Inst::Switch, 1, nullptr), LabelDefault(LabelDefault),
NumCases(NumCases) {
addSource(Source);
Values = Func->allocateArrayOf<uint64_t>(NumCases);
@@ -399,7 +399,7 @@
// Initialize in case buggy code doesn't set all entries
for (SizeT I = 0; I < NumCases; ++I) {
Values[I] = 0;
- Labels[I] = NULL;
+ Labels[I] = nullptr;
}
}
@@ -434,7 +434,7 @@
}
InstUnreachable::InstUnreachable(Cfg *Func)
- : InstHighLevel(Func, Inst::Unreachable, 0, NULL) {}
+ : InstHighLevel(Func, Inst::Unreachable, 0, nullptr) {}
InstFakeDef::InstFakeDef(Cfg *Func, Variable *Dest, Variable *Src)
: InstHighLevel(Func, Inst::FakeDef, Src ? 1 : 0, Dest) {
@@ -444,16 +444,16 @@
}
InstFakeUse::InstFakeUse(Cfg *Func, Variable *Src)
- : InstHighLevel(Func, Inst::FakeUse, 1, NULL) {
+ : InstHighLevel(Func, Inst::FakeUse, 1, nullptr) {
assert(Src);
addSource(Src);
}
InstFakeKill::InstFakeKill(Cfg *Func, const Inst *Linked)
- : InstHighLevel(Func, Inst::FakeKill, 0, NULL), Linked(Linked) {}
+ : InstHighLevel(Func, Inst::FakeKill, 0, nullptr), Linked(Linked) {}
Type InstCall::getReturnType() const {
- if (Dest == NULL)
+ if (Dest == nullptr)
return IceType_void;
return Dest->getType();
}
diff --git a/src/IceInst.h b/src/IceInst.h
index 0b7dc03..8dd77ec 100644
--- a/src/IceInst.h
+++ b/src/IceInst.h
@@ -321,7 +321,7 @@
static InstBr *create(Cfg *Func, CfgNode *Target) {
return new (Func->allocate<InstBr>()) InstBr(Func, Target);
}
- bool isUnconditional() const { return getTargetTrue() == NULL; }
+ bool isUnconditional() const { return getTargetTrue() == nullptr; }
Operand *getCondition() const {
assert(!isUnconditional());
return getSrc(0);
@@ -346,7 +346,7 @@
~InstBr() override {}
CfgNode *TargetFalse; // Doubles as unconditional branch target
- CfgNode *TargetTrue; // NULL if unconditional branch
+ CfgNode *TargetTrue; // nullptr if unconditional branch
};
// Call instruction. The call target is captured as getSrc(0), and
@@ -615,7 +615,7 @@
InstRet &operator=(const InstRet &) = delete;
public:
- static InstRet *create(Cfg *Func, Operand *RetValue = NULL) {
+ static InstRet *create(Cfg *Func, Operand *RetValue = nullptr) {
return new (Func->allocate<InstRet>()) InstRet(Func, RetValue);
}
bool hasRetValue() const { return getSrcSize(); }
@@ -760,7 +760,8 @@
InstFakeDef &operator=(const InstFakeDef &) = delete;
public:
- static InstFakeDef *create(Cfg *Func, Variable *Dest, Variable *Src = NULL) {
+ static InstFakeDef *create(Cfg *Func, Variable *Dest,
+ Variable *Src = nullptr) {
return new (Func->allocate<InstFakeDef>()) InstFakeDef(Func, Dest, Src);
}
void emit(const Cfg *Func) const override;
diff --git a/src/IceInstX8632.cpp b/src/IceInstX8632.cpp
index 3f9250b..95be640 100644
--- a/src/IceInstX8632.cpp
+++ b/src/IceInstX8632.cpp
@@ -90,7 +90,7 @@
: OperandX8632(kMem, Ty), Base(Base), Offset(Offset), Index(Index),
Shift(Shift), SegmentReg(SegmentReg) {
assert(Shift <= 3);
- Vars = NULL;
+ Vars = nullptr;
NumVars = 0;
if (Base)
++NumVars;
@@ -137,7 +137,7 @@
}
InstX8632Label::InstX8632Label(Cfg *Func, TargetX8632 *Target)
- : InstX8632(Func, InstX8632::Label, 0, NULL),
+ : InstX8632(Func, InstX8632::Label, 0, nullptr),
Number(Target->makeNextLabelNumber()) {}
IceString InstX8632Label::getName(const Cfg *Func) const {
@@ -147,13 +147,13 @@
InstX8632Br::InstX8632Br(Cfg *Func, const CfgNode *TargetTrue,
const CfgNode *TargetFalse,
const InstX8632Label *Label, CondX86::BrCond Condition)
- : InstX8632(Func, InstX8632::Br, 0, NULL), Condition(Condition),
+ : InstX8632(Func, InstX8632::Br, 0, nullptr), Condition(Condition),
TargetTrue(TargetTrue), TargetFalse(TargetFalse), Label(Label) {}
bool InstX8632Br::optimizeBranch(const CfgNode *NextNode) {
// If there is no next block, then there can be no fallthrough to
// optimize.
- if (NextNode == NULL)
+ if (NextNode == nullptr)
return false;
// Intra-block conditional branches can't be optimized.
if (Label)
@@ -161,29 +161,29 @@
// If there is no fallthrough node, such as a non-default case label
// for a switch instruction, then there is no opportunity to
// optimize.
- if (getTargetFalse() == NULL)
+ if (getTargetFalse() == nullptr)
return false;
// Unconditional branch to the next node can be removed.
if (Condition == CondX86::Br_None && getTargetFalse() == NextNode) {
- assert(getTargetTrue() == NULL);
+ assert(getTargetTrue() == nullptr);
setDeleted();
return true;
}
- // If the fallthrough is to the next node, set fallthrough to NULL
+ // If the fallthrough is to the next node, set fallthrough to nullptr
// to indicate.
if (getTargetFalse() == NextNode) {
- TargetFalse = NULL;
+ TargetFalse = nullptr;
return true;
}
- // If TargetTrue is the next node, and TargetFalse is non-NULL
+ // If TargetTrue is the next node, and TargetFalse is not nullptr
// (which was already tested above), then invert the branch
- // condition, swap the targets, and set new fallthrough to NULL.
+ // condition, swap the targets, and set new fallthrough to nullptr.
if (getTargetTrue() == NextNode) {
assert(Condition != CondX86::Br_None);
Condition = InstX8632BrAttributes[Condition].Opposite;
TargetTrue = getTargetFalse();
- TargetFalse = NULL;
+ TargetFalse = nullptr;
return true;
}
return false;
@@ -237,7 +237,7 @@
Variable *Edx, Variable *Eax,
Variable *Ecx, Variable *Ebx,
bool Locked)
- : InstX8632Lockable(Func, InstX8632::Cmpxchg, 5, NULL, Locked) {
+ : InstX8632Lockable(Func, InstX8632::Cmpxchg, 5, nullptr, Locked) {
assert(Edx->getRegNum() == RegX8632::Reg_edx);
assert(Eax->getRegNum() == RegX8632::Reg_eax);
assert(Ecx->getRegNum() == RegX8632::Reg_ecx);
@@ -256,56 +256,56 @@
}
InstX8632Icmp::InstX8632Icmp(Cfg *Func, Operand *Src0, Operand *Src1)
- : InstX8632(Func, InstX8632::Icmp, 2, NULL) {
+ : InstX8632(Func, InstX8632::Icmp, 2, nullptr) {
addSource(Src0);
addSource(Src1);
}
InstX8632Ucomiss::InstX8632Ucomiss(Cfg *Func, Operand *Src0, Operand *Src1)
- : InstX8632(Func, InstX8632::Ucomiss, 2, NULL) {
+ : InstX8632(Func, InstX8632::Ucomiss, 2, nullptr) {
addSource(Src0);
addSource(Src1);
}
InstX8632UD2::InstX8632UD2(Cfg *Func)
- : InstX8632(Func, InstX8632::UD2, 0, NULL) {}
+ : InstX8632(Func, InstX8632::UD2, 0, nullptr) {}
InstX8632Test::InstX8632Test(Cfg *Func, Operand *Src1, Operand *Src2)
- : InstX8632(Func, InstX8632::Test, 2, NULL) {
+ : InstX8632(Func, InstX8632::Test, 2, nullptr) {
addSource(Src1);
addSource(Src2);
}
InstX8632Mfence::InstX8632Mfence(Cfg *Func)
- : InstX8632(Func, InstX8632::Mfence, 0, NULL) {
+ : InstX8632(Func, InstX8632::Mfence, 0, nullptr) {
HasSideEffects = true;
}
InstX8632Store::InstX8632Store(Cfg *Func, Operand *Value, OperandX8632 *Mem)
- : InstX8632(Func, InstX8632::Store, 2, NULL) {
+ : InstX8632(Func, InstX8632::Store, 2, nullptr) {
addSource(Value);
addSource(Mem);
}
InstX8632StoreP::InstX8632StoreP(Cfg *Func, Variable *Value,
OperandX8632Mem *Mem)
- : InstX8632(Func, InstX8632::StoreP, 2, NULL) {
+ : InstX8632(Func, InstX8632::StoreP, 2, nullptr) {
addSource(Value);
addSource(Mem);
}
InstX8632StoreQ::InstX8632StoreQ(Cfg *Func, Variable *Value,
OperandX8632Mem *Mem)
- : InstX8632(Func, InstX8632::StoreQ, 2, NULL) {
+ : InstX8632(Func, InstX8632::StoreQ, 2, nullptr) {
addSource(Value);
addSource(Mem);
}
InstX8632Nop::InstX8632Nop(Cfg *Func, InstX8632Nop::NopVariant Variant)
- : InstX8632(Func, InstX8632::Nop, 0, NULL), Variant(Variant) {}
+ : InstX8632(Func, InstX8632::Nop, 0, nullptr), Variant(Variant) {}
InstX8632Fld::InstX8632Fld(Cfg *Func, Operand *Src)
- : InstX8632(Func, InstX8632::Fld, 1, NULL) {
+ : InstX8632(Func, InstX8632::Fld, 1, nullptr) {
addSource(Src);
}
@@ -316,12 +316,12 @@
: InstX8632(Func, InstX8632::Pop, 0, Dest) {}
InstX8632Push::InstX8632Push(Cfg *Func, Variable *Source)
- : InstX8632(Func, InstX8632::Push, 1, NULL) {
+ : InstX8632(Func, InstX8632::Push, 1, nullptr) {
addSource(Source);
}
InstX8632Ret::InstX8632Ret(Cfg *Func, Variable *Source)
- : InstX8632(Func, InstX8632::Ret, Source ? 1 : 0, NULL) {
+ : InstX8632(Func, InstX8632::Ret, Source ? 1 : 0, nullptr) {
if (Source)
addSource(Source);
}
diff --git a/src/IceInstX8632.h b/src/IceInstX8632.h
index cc44a1a..e63e628 100644
--- a/src/IceInstX8632.h
+++ b/src/IceInstX8632.h
@@ -67,7 +67,7 @@
SegReg_NUM
};
static OperandX8632Mem *create(Cfg *Func, Type Ty, Variable *Base,
- Constant *Offset, Variable *Index = NULL,
+ Constant *Offset, Variable *Index = nullptr,
uint16_t Shift = 0,
SegmentRegisters SegmentReg = DefaultSegment) {
return new (Func->allocate<OperandX8632Mem>())
@@ -165,7 +165,7 @@
// Inherit dump() and emit() from Variable.
private:
SpillVariable(Type Ty, SizeT Index)
- : Variable(SpillVariableKind, Ty, Index), LinkedTo(NULL) {}
+ : Variable(SpillVariableKind, Ty, Index), LinkedTo(nullptr) {}
Variable *LinkedTo;
};
@@ -344,14 +344,14 @@
static InstX8632Br *create(Cfg *Func, CfgNode *TargetTrue,
CfgNode *TargetFalse, CondX86::BrCond Condition) {
assert(Condition != CondX86::Br_None);
- const InstX8632Label *NoLabel = NULL;
+ const InstX8632Label *NoLabel = nullptr;
return new (Func->allocate<InstX8632Br>())
InstX8632Br(Func, TargetTrue, TargetFalse, NoLabel, Condition);
}
// Create an unconditional branch to a node.
static InstX8632Br *create(Cfg *Func, CfgNode *Target) {
- const CfgNode *NoCondTarget = NULL;
- const InstX8632Label *NoLabel = NULL;
+ const CfgNode *NoCondTarget = nullptr;
+ const InstX8632Label *NoLabel = nullptr;
return new (Func->allocate<InstX8632Br>())
InstX8632Br(Func, NoCondTarget, Target, NoLabel, CondX86::Br_None);
}
@@ -361,8 +361,8 @@
static InstX8632Br *create(Cfg *Func, CfgNode *Target,
CondX86::BrCond Condition) {
assert(Condition != CondX86::Br_None);
- const CfgNode *NoUncondTarget = NULL;
- const InstX8632Label *NoLabel = NULL;
+ const CfgNode *NoUncondTarget = nullptr;
+ const InstX8632Label *NoLabel = nullptr;
return new (Func->allocate<InstX8632Br>())
InstX8632Br(Func, Target, NoUncondTarget, NoLabel, Condition);
}
@@ -370,8 +370,8 @@
// Condition==Br_None) to a label in the current block.
static InstX8632Br *create(Cfg *Func, InstX8632Label *Label,
CondX86::BrCond Condition) {
- const CfgNode *NoCondTarget = NULL;
- const CfgNode *NoUncondTarget = NULL;
+ const CfgNode *NoCondTarget = nullptr;
+ const CfgNode *NoUncondTarget = nullptr;
return new (Func->allocate<InstX8632Br>())
InstX8632Br(Func, NoCondTarget, NoUncondTarget, Label, Condition);
}
@@ -1486,7 +1486,7 @@
InstX8632Ret &operator=(const InstX8632Ret &) = delete;
public:
- static InstX8632Ret *create(Cfg *Func, Variable *Source = NULL) {
+ static InstX8632Ret *create(Cfg *Func, Variable *Source = nullptr) {
return new (Func->allocate<InstX8632Ret>()) InstX8632Ret(Func, Source);
}
void emit(const Cfg *Func) const override;
diff --git a/src/IceIntrinsics.cpp b/src/IceIntrinsics.cpp
index 2c97809..16d07e1 100644
--- a/src/IceIntrinsics.cpp
+++ b/src/IceIntrinsics.cpp
@@ -217,7 +217,7 @@
Intrinsics::find(const IceString &Name) const {
auto it = Map.find(Name);
if (it == Map.end())
- return NULL;
+ return nullptr;
return &it->second;
}
@@ -231,7 +231,7 @@
SizeT &ArgIndex) const {
assert(NumTypes >= 1);
Variable *Result = Call->getDest();
- if (Result == NULL) {
+ if (Result == nullptr) {
if (Signature[0] != Ice::IceType_void)
return Intrinsics::BadReturnType;
} else if (Signature[0] != Result->getType()) {
diff --git a/src/IceLiveness.cpp b/src/IceLiveness.cpp
index 2f7b20a..0da611e 100644
--- a/src/IceLiveness.cpp
+++ b/src/IceLiveness.cpp
@@ -51,11 +51,11 @@
// Resize each LivenessNode::LiveToVarMap, and the global
// LiveToVarMap. Reset the counts to 0.
for (SizeT i = 0; i < NumNodes; ++i) {
- Nodes[i].LiveToVarMap.assign(Nodes[i].NumLocals, NULL);
+ Nodes[i].LiveToVarMap.assign(Nodes[i].NumLocals, nullptr);
Nodes[i].NumLocals = 0;
Nodes[i].NumNonDeadPhis = 0;
}
- LiveToVarMap.assign(NumGlobals, NULL);
+ LiveToVarMap.assign(NumGlobals, nullptr);
// Sort each variable into the appropriate LiveToVarMap. Also set
// VarToLiveMap.
diff --git a/src/IceOperand.cpp b/src/IceOperand.cpp
index 8d0ffed..956d6e0 100644
--- a/src/IceOperand.cpp
+++ b/src/IceOperand.cpp
@@ -179,7 +179,7 @@
if (MakeMulti) {
MultiBlock = MBS_MultiBlock;
- SingleUseNode = NULL;
+ SingleUseNode = nullptr;
}
}
@@ -195,7 +195,7 @@
if (TrackingKind == VMK_All) {
const Inst *LastInstruction =
Definitions.empty() ? FirstOrSingleDefinition : Definitions.back();
- assert(LastInstruction == NULL ||
+ assert(LastInstruction == nullptr ||
Instr->getNumber() >= LastInstruction->getNumber());
}
#endif
@@ -204,13 +204,13 @@
markUse(TrackingKind, Instr, Node, IsFromDef, IsImplicit);
if (TrackingKind == VMK_Uses)
return;
- if (FirstOrSingleDefinition == NULL)
+ if (FirstOrSingleDefinition == nullptr)
FirstOrSingleDefinition = Instr;
else if (TrackingKind == VMK_All)
Definitions.push_back(Instr);
switch (MultiDef) {
case MDS_Unknown:
- assert(SingleDefNode == NULL);
+ assert(SingleDefNode == nullptr);
MultiDef = MDS_SingleDef;
SingleDefNode = Node;
break;
@@ -220,18 +220,18 @@
MultiDef = MDS_MultiDefSingleBlock;
} else {
MultiDef = MDS_MultiDefMultiBlock;
- SingleDefNode = NULL;
+ SingleDefNode = nullptr;
}
break;
case MDS_MultiDefSingleBlock:
assert(SingleDefNode);
if (Node != SingleDefNode) {
MultiDef = MDS_MultiDefMultiBlock;
- SingleDefNode = NULL;
+ SingleDefNode = nullptr;
}
break;
case MDS_MultiDefMultiBlock:
- assert(SingleDefNode == NULL);
+ assert(SingleDefNode == nullptr);
break;
}
}
@@ -240,13 +240,13 @@
switch (MultiDef) {
case MDS_Unknown:
case MDS_MultiDefMultiBlock:
- return NULL;
+ return nullptr;
case MDS_SingleDef:
case MDS_MultiDefSingleBlock:
assert(FirstOrSingleDefinition);
return FirstOrSingleDefinition;
}
- return NULL;
+ return nullptr;
}
const Inst *VariableTracking::getSingleDefinition() const {
@@ -254,12 +254,12 @@
case MDS_Unknown:
case MDS_MultiDefMultiBlock:
case MDS_MultiDefSingleBlock:
- return NULL;
+ return nullptr;
case MDS_SingleDef:
assert(FirstOrSingleDefinition);
return FirstOrSingleDefinition;
}
- return NULL;
+ return nullptr;
}
void VariablesMetadata::init(MetadataKind TrackingKind) {
@@ -270,7 +270,7 @@
// Mark implicit args as being used in the entry node.
for (Variable *Var : Func->getImplicitArgs()) {
- const Inst *NoInst = NULL;
+ const Inst *NoInst = nullptr;
const CfgNode *EntryNode = Func->getEntryNode();
const bool IsFromDef = false;
const bool IsImplicit = true;
@@ -356,7 +356,7 @@
const Inst *VariablesMetadata::getFirstDefinition(const Variable *Var) const {
assert(Kind != VMK_Uses);
if (!isTracked(Var))
- return NULL; // conservative answer
+ return nullptr; // conservative answer
SizeT VarNum = Var->getIndex();
return Metadata[VarNum].getFirstDefinition();
}
@@ -364,7 +364,7 @@
const Inst *VariablesMetadata::getSingleDefinition(const Variable *Var) const {
assert(Kind != VMK_Uses);
if (!isTracked(Var))
- return NULL; // conservative answer
+ return nullptr; // conservative answer
SizeT VarNum = Var->getIndex();
return Metadata[VarNum].getSingleDefinition();
}
@@ -380,7 +380,7 @@
const CfgNode *VariablesMetadata::getLocalUseNode(const Variable *Var) const {
if (!isTracked(Var))
- return NULL; // conservative answer
+ return nullptr; // conservative answer
SizeT VarNum = Var->getIndex();
return Metadata[VarNum].getNode();
}
@@ -397,7 +397,7 @@
void Variable::dump(const Cfg *Func, Ostream &Str) const {
if (!ALLOW_DUMP)
return;
- if (Func == NULL) {
+ if (Func == nullptr) {
Str << "%" << getName(Func);
return;
}
diff --git a/src/IceOperand.h b/src/IceOperand.h
index 7562382..1cc0441 100644
--- a/src/IceOperand.h
+++ b/src/IceOperand.h
@@ -62,7 +62,7 @@
}
virtual void emit(const Cfg *Func) const = 0;
// The dump(Func,Str) implementation must be sure to handle the
- // situation where Func==NULL.
+ // situation where Func==nullptr.
virtual void dump(const Cfg *Func, Ostream &Str) const = 0;
void dump(const Cfg *Func) const {
if (!ALLOW_DUMP)
@@ -72,7 +72,7 @@
}
void dump(Ostream &Str) const {
if (ALLOW_DUMP)
- dump(NULL, Str);
+ dump(nullptr, Str);
}
// Query whether this object was allocated in isolation, or added to
@@ -86,7 +86,7 @@
protected:
Operand(OperandKind Kind, Type Ty)
- : Ty(Ty), Kind(Kind), NumVars(0), Vars(NULL) {}
+ : Ty(Ty), Kind(Kind), NumVars(0), Vars(nullptr) {}
const Type Ty;
const OperandKind Kind;
@@ -122,7 +122,7 @@
protected:
Constant(OperandKind Kind, Type Ty, uint32_t PoolEntryID)
: Operand(Kind, Ty), PoolEntryID(PoolEntryID) {
- Vars = NULL;
+ Vars = nullptr;
NumVars = 0;
}
~Constant() override {}
@@ -457,8 +457,8 @@
Variable *getLo() const { return LoVar; }
Variable *getHi() const { return HiVar; }
void setLoHi(Variable *Lo, Variable *Hi) {
- assert(LoVar == NULL);
- assert(HiVar == NULL);
+ assert(LoVar == nullptr);
+ assert(HiVar == nullptr);
LoVar = Lo;
HiVar = Hi;
}
@@ -483,7 +483,7 @@
: Operand(K, Ty), Number(Index), NameIndex(Cfg::IdentifierIndexInvalid),
IsArgument(false), IsImplicitArgument(false), IgnoreLiveness(false),
StackOffset(0), RegNum(NoRegister), RegNumTmp(NoRegister), Weight(1),
- LoVar(NULL), HiVar(NULL) {
+ LoVar(nullptr), HiVar(nullptr) {
Vars = VarsReal;
Vars[0] = this;
NumVars = 1;
@@ -550,8 +550,8 @@
MBS_MultiBlock
};
VariableTracking()
- : MultiDef(MDS_Unknown), MultiBlock(MBS_Unknown), SingleUseNode(NULL),
- SingleDefNode(NULL), FirstOrSingleDefinition(NULL) {}
+ : MultiDef(MDS_Unknown), MultiBlock(MBS_Unknown), SingleUseNode(nullptr),
+ SingleDefNode(nullptr), FirstOrSingleDefinition(nullptr) {}
MultiDefState getMultiDef() const { return MultiDef; }
MultiBlockState getMultiBlock() const { return MultiBlock; }
const Inst *getFirstDefinition() const;
@@ -603,10 +603,10 @@
// the same block, e.g. T after the lowered sequence "T=B; T+=C;
// A=T", for which getFirstDefinition(T) would return the "T=B"
// instruction. For variables with definitions span multiple
- // blocks, NULL is returned.
+ // blocks, nullptr is returned.
const Inst *getFirstDefinition(const Variable *Var) const;
// Returns the definition instruction of the given Variable, when
- // the variable has exactly one definition. Otherwise, NULL is
+ // the variable has exactly one definition. Otherwise, nullptr is
// returned.
const Inst *getSingleDefinition(const Variable *Var) const;
// Returns the list of all definition instructions of the given
@@ -622,7 +622,7 @@
// entry block.
bool isMultiBlock(const Variable *Var) const;
// Returns the node that the given Variable is used in, assuming
- // isMultiBlock() returns false. Otherwise, NULL is returned.
+ // isMultiBlock() returns false. Otherwise, nullptr is returned.
const CfgNode *getLocalUseNode(const Variable *Var) const;
private:
diff --git a/src/IceRegAlloc.cpp b/src/IceRegAlloc.cpp
index 3601846..d2bc8fb 100644
--- a/src/IceRegAlloc.cpp
+++ b/src/IceRegAlloc.cpp
@@ -410,7 +410,7 @@
// but is never modified. Furthermore, overlap is only allowed
// when preferred Variable definition instructions do not appear
// within the current Variable's live range.
- Variable *Prefer = NULL;
+ Variable *Prefer = nullptr;
int32_t PreferReg = Variable::NoRegister;
bool AllowOverlap = false;
if (FindPreference) {
diff --git a/src/IceTargetLowering.cpp b/src/IceTargetLowering.cpp
index be1d2e1..c20f9f6 100644
--- a/src/IceTargetLowering.cpp
+++ b/src/IceTargetLowering.cpp
@@ -98,7 +98,7 @@
return IceTargetARM64::create(Func);
#endif
Func->setError("Unsupported target");
- return NULL;
+ return nullptr;
}
TargetLowering::TargetLowering(Cfg *Func)
@@ -113,7 +113,7 @@
if (Target == Target_X8632)
return new x86::AssemblerX86();
Func->setError("Unsupported target");
- return NULL;
+ return nullptr;
}
void TargetLowering::doAddressOpt() {
@@ -267,7 +267,7 @@
return IceTargetGlobalInitARM64::create(Ctx);
#endif
llvm_unreachable("Unsupported target");
- return NULL;
+ return nullptr;
}
TargetGlobalInitLowering::~TargetGlobalInitLowering() {}
diff --git a/src/IceTargetLowering.h b/src/IceTargetLowering.h
index d2bd6f8..e07bdeb 100644
--- a/src/IceTargetLowering.h
+++ b/src/IceTargetLowering.h
@@ -37,18 +37,18 @@
LoweringContext &operator=(const LoweringContext &) = delete;
public:
- LoweringContext() : Node(NULL), LastInserted(NULL) {}
+ LoweringContext() : Node(nullptr), LastInserted(nullptr) {}
~LoweringContext() {}
void init(CfgNode *Node);
Inst *getNextInst() const {
if (Next == End)
- return NULL;
+ return nullptr;
return Next;
}
Inst *getNextInst(InstList::iterator &Iter) const {
advanceForward(Iter);
if (Iter == End)
- return NULL;
+ return nullptr;
return Iter;
}
CfgNode *getNode() const { return Node; }
diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
index aeeb7c4..d838553 100644
--- a/src/IceTargetLoweringX8632.cpp
+++ b/src/IceTargetLoweringX8632.cpp
@@ -465,7 +465,7 @@
PhysicalRegisters[Ty].resize(RegX8632::Reg_NUM);
assert(RegNum < PhysicalRegisters[Ty].size());
Variable *Reg = PhysicalRegisters[Ty][RegNum];
- if (Reg == NULL) {
+ if (Reg == nullptr) {
Reg = Func->makeVariable(Ty);
Reg->setRegNum(RegNum);
PhysicalRegisters[Ty][RegNum] = Reg;
@@ -1050,7 +1050,7 @@
assert(Hi);
return;
}
- assert(Hi == NULL);
+ assert(Hi == nullptr);
Lo = Func->makeVariable(IceType_i32);
Hi = Func->makeVariable(IceType_i32);
if (ALLOW_DUMP) {
@@ -1081,7 +1081,7 @@
Mem->getShift(), Mem->getSegmentRegister());
}
llvm_unreachable("Unsupported operand type");
- return NULL;
+ return nullptr;
}
Operand *TargetX8632::hiOperand(Operand *Operand) {
@@ -1098,7 +1098,7 @@
}
if (OperandX8632Mem *Mem = llvm::dyn_cast<OperandX8632Mem>(Operand)) {
Constant *Offset = Mem->getOffset();
- if (Offset == NULL) {
+ if (Offset == nullptr) {
Offset = Ctx->getConstantInt32(4);
} else if (ConstantInteger32 *IntOffset =
llvm::dyn_cast<ConstantInteger32>(Offset)) {
@@ -1115,7 +1115,7 @@
Mem->getSegmentRegister());
}
llvm_unreachable("Unsupported operand type");
- return NULL;
+ return nullptr;
}
llvm::SmallBitVector TargetX8632::getRegisterSet(RegSetMask Include,
@@ -1202,7 +1202,7 @@
Operand *Src0Hi = hiOperand(Src0);
Operand *Src1Lo = loOperand(Src1);
Operand *Src1Hi = hiOperand(Src1);
- Variable *T_Lo = NULL, *T_Hi = NULL;
+ Variable *T_Lo = nullptr, *T_Hi = nullptr;
switch (Inst->getOp()) {
case InstArithmetic::_num:
llvm_unreachable("Unknown arithmetic operator");
@@ -1248,7 +1248,7 @@
_mov(DestHi, T_Hi);
break;
case InstArithmetic::Mul: {
- Variable *T_1 = NULL, *T_2 = NULL, *T_3 = NULL;
+ Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr;
Variable *T_4Lo = makeReg(IceType_i32, RegX8632::Reg_eax);
Variable *T_4Hi = makeReg(IceType_i32, RegX8632::Reg_edx);
// gcc does the following:
@@ -1294,7 +1294,7 @@
// L1:
// a.lo = t2
// a.hi = t3
- Variable *T_1 = NULL, *T_2 = NULL, *T_3 = NULL;
+ Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr;
Constant *BitTest = Ctx->getConstantInt32(0x20);
Constant *Zero = Ctx->getConstantZero(IceType_i32);
InstX8632Label *Label = InstX8632Label::create(Func, this);
@@ -1329,7 +1329,7 @@
// L1:
// a.lo = t2
// a.hi = t3
- Variable *T_1 = NULL, *T_2 = NULL, *T_3 = NULL;
+ Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr;
Constant *BitTest = Ctx->getConstantInt32(0x20);
Constant *Zero = Ctx->getConstantZero(IceType_i32);
InstX8632Label *Label = InstX8632Label::create(Func, this);
@@ -1364,7 +1364,7 @@
// L1:
// a.lo = t2
// a.hi = t3
- Variable *T_1 = NULL, *T_2 = NULL, *T_3 = NULL;
+ Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr;
Constant *BitTest = Ctx->getConstantInt32(0x20);
Constant *SignExtend = Ctx->getConstantInt32(0x1f);
InstX8632Label *Label = InstX8632Label::create(Func, this);
@@ -1549,8 +1549,8 @@
break;
}
} else { // Dest->getType() is non-i64 scalar
- Variable *T_edx = NULL;
- Variable *T = NULL;
+ Variable *T_edx = nullptr;
+ Variable *T = nullptr;
switch (Inst->getOp()) {
case InstArithmetic::_num:
llvm_unreachable("Unknown arithmetic operator");
@@ -1623,7 +1623,7 @@
// immediates as the operand.
Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
if (isByteSizedArithType(Dest->getType())) {
- Variable *T_ah = NULL;
+ Variable *T_ah = nullptr;
Constant *Zero = Ctx->getConstantZero(IceType_i8);
_mov(T, Src0, RegX8632::Reg_eax);
_mov(T_ah, Zero, RegX8632::Reg_ah);
@@ -1655,7 +1655,7 @@
case InstArithmetic::Urem:
Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
if (isByteSizedArithType(Dest->getType())) {
- Variable *T_ah = NULL;
+ Variable *T_ah = nullptr;
Constant *Zero = Ctx->getConstantZero(IceType_i8);
_mov(T, Src0, RegX8632::Reg_eax);
_mov(T_ah, Zero, RegX8632::Reg_ah);
@@ -1729,7 +1729,7 @@
Operand *Src0Hi = hiOperand(Src0);
Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
- Variable *T_Lo = NULL, *T_Hi = NULL;
+ Variable *T_Lo = nullptr, *T_Hi = nullptr;
_mov(T_Lo, Src0Lo);
_mov(DestLo, T_Lo);
_mov(T_Hi, Src0Hi);
@@ -1847,8 +1847,8 @@
// with high register allocation weight.
Variable *Dest = Instr->getDest();
// ReturnReg doubles as ReturnRegLo as necessary.
- Variable *ReturnReg = NULL;
- Variable *ReturnRegHi = NULL;
+ Variable *ReturnReg = nullptr;
+ Variable *ReturnRegHi = nullptr;
if (Dest) {
switch (Dest->getType()) {
case IceType_NUM:
@@ -1868,7 +1868,7 @@
break;
case IceType_f32:
case IceType_f64:
- // Leave ReturnReg==ReturnRegHi==NULL, and capture the result with
+ // Leave ReturnReg==ReturnRegHi==nullptr, and capture the result with
// the fstp instruction.
break;
case IceType_v4i1:
@@ -1992,7 +1992,7 @@
_movsx(T_Lo, Src0RM);
}
_mov(DestLo, T_Lo);
- Variable *T_Hi = NULL;
+ Variable *T_Hi = nullptr;
_mov(T_Hi, T_Lo);
if (Src0RM->getType() != IceType_i1)
// For i1, the sar instruction is already done above.
@@ -2091,7 +2091,7 @@
Src0 = loOperand(Src0);
Operand *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem);
// t1 = trunc Src0RM; Dest = t1
- Variable *T = NULL;
+ Variable *T = nullptr;
_mov(T, Src0RM);
if (Dest->getType() == IceType_i1)
_and(T, Ctx->getConstantInt1(1));
@@ -2287,7 +2287,7 @@
// t.f32 = b.f32
// s.f32 = spill t.f32
// a.i32 = s.f32
- Variable *T = NULL;
+ Variable *T = nullptr;
// TODO: Should be able to force a spill setup by calling legalize() with
// Legal_Mem and not Legal_Reg or Legal_Imm.
SpillVariable *SpillVar = Func->makeVariable<SpillVariable>(SrcType);
@@ -2342,7 +2342,7 @@
Variable *Spill = SpillVar;
Spill->setWeight(RegWeight::Zero);
- Variable *T_Lo = NULL, *T_Hi = NULL;
+ Variable *T_Lo = nullptr, *T_Hi = nullptr;
VariableSplit *SpillLo =
VariableSplit::create(Func, Spill, VariableSplit::Low);
VariableSplit *SpillHi =
@@ -2410,7 +2410,7 @@
_pextr(ExtractedElementR, SourceVectR, Mask);
} else if (Ty == IceType_v4i32 || Ty == IceType_v4f32 || Ty == IceType_v4i1) {
// Use pshufd and movd/movss.
- Variable *T = NULL;
+ Variable *T = nullptr;
if (Index) {
// The shuffle only needs to occur if the element to be extracted
// is not at the lowest index.
@@ -2479,7 +2479,7 @@
Src1 = T;
}
- Variable *T = NULL;
+ Variable *T = nullptr;
if (Condition == InstFcmp::True) {
// makeVectorOfOnes() requires an integer vector type.
@@ -2548,7 +2548,7 @@
if (HasC1) {
Src0 = legalize(Src0);
Operand *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem);
- Variable *T = NULL;
+ Variable *T = nullptr;
_mov(T, Src0);
_ucomiss(T, Src1RM);
}
@@ -2785,7 +2785,7 @@
_movp(Inst->getDest(), T);
} else if (Ty == IceType_v4i32 || Ty == IceType_v4f32 || Ty == IceType_v4i1) {
// Use shufps or movss.
- Variable *ElementR = NULL;
+ Variable *ElementR = nullptr;
Operand *SourceVectRM =
legalize(SourceVectNotLegalized, Legal_Reg | Legal_Mem);
@@ -3032,7 +3032,7 @@
assert(Val->getType() == IceType_i16);
Val = legalize(Val);
Constant *Eight = Ctx->getConstantInt16(8);
- Variable *T = NULL;
+ Variable *T = nullptr;
_mov(T, Val);
_rol(T, Eight);
_mov(Dest, T);
@@ -3065,7 +3065,7 @@
// a well-defined value.
Operand *Val = legalize(Instr->getArg(0));
Operand *FirstVal;
- Operand *SecondVal = NULL;
+ Operand *SecondVal = nullptr;
if (Val->getType() == IceType_i64) {
FirstVal = loOperand(Val);
SecondVal = hiOperand(Val);
@@ -3082,7 +3082,7 @@
// a well-defined value.
Operand *Val = legalize(Instr->getArg(0));
Operand *FirstVal;
- Operand *SecondVal = NULL;
+ Operand *SecondVal = nullptr;
if (Val->getType() == IceType_i64) {
FirstVal = hiOperand(Val);
SecondVal = loOperand(Val);
@@ -3095,7 +3095,7 @@
return;
}
case Intrinsics::Longjmp: {
- InstCall *Call = makeHelperCall("longjmp", NULL, 2);
+ InstCall *Call = makeHelperCall("longjmp", nullptr, 2);
Call->addArg(Instr->getArg(0));
Call->addArg(Instr->getArg(1));
lowerCall(Call);
@@ -3104,7 +3104,7 @@
case Intrinsics::Memcpy: {
// In the future, we could potentially emit an inline memcpy/memset, etc.
// for intrinsic calls w/ a known length.
- InstCall *Call = makeHelperCall("memcpy", NULL, 3);
+ InstCall *Call = makeHelperCall("memcpy", nullptr, 3);
Call->addArg(Instr->getArg(0));
Call->addArg(Instr->getArg(1));
Call->addArg(Instr->getArg(2));
@@ -3112,7 +3112,7 @@
return;
}
case Intrinsics::Memmove: {
- InstCall *Call = makeHelperCall("memmove", NULL, 3);
+ InstCall *Call = makeHelperCall("memmove", nullptr, 3);
Call->addArg(Instr->getArg(0));
Call->addArg(Instr->getArg(1));
Call->addArg(Instr->getArg(2));
@@ -3127,7 +3127,7 @@
assert(ValOp->getType() == IceType_i8);
Variable *ValExt = Func->makeVariable(stackSlotType());
lowerCast(InstCast::create(Func, InstCast::Zext, ValExt, ValOp));
- InstCall *Call = makeHelperCall("memset", NULL, 3);
+ InstCall *Call = makeHelperCall("memset", nullptr, 3);
Call->addArg(Instr->getArg(0));
Call->addArg(ValExt);
Call->addArg(Instr->getArg(2));
@@ -3137,10 +3137,11 @@
case Intrinsics::NaClReadTP: {
if (Ctx->getFlags().UseSandboxing) {
Constant *Zero = Ctx->getConstantZero(IceType_i32);
- Operand *Src = OperandX8632Mem::create(
- Func, IceType_i32, NULL, Zero, NULL, 0, OperandX8632Mem::SegReg_GS);
+ Operand *Src =
+ OperandX8632Mem::create(Func, IceType_i32, nullptr, Zero, nullptr, 0,
+ OperandX8632Mem::SegReg_GS);
Variable *Dest = Instr->getDest();
- Variable *T = NULL;
+ Variable *T = nullptr;
_mov(T, Src);
_mov(Dest, T);
} else {
@@ -3291,8 +3292,8 @@
void TargetX8632::lowerAtomicRMW(Variable *Dest, uint32_t Operation,
Operand *Ptr, Operand *Val) {
bool NeedsCmpxchg = false;
- LowerBinOp Op_Lo = NULL;
- LowerBinOp Op_Hi = NULL;
+ LowerBinOp Op_Lo = nullptr;
+ LowerBinOp Op_Hi = nullptr;
switch (Operation) {
default:
Func->setError("Unknown AtomicRMW operation");
@@ -3308,7 +3309,7 @@
}
OperandX8632Mem *Addr = FormMemoryOperand(Ptr, Dest->getType());
const bool Locked = true;
- Variable *T = NULL;
+ Variable *T = nullptr;
_mov(T, Val);
_xadd(Addr, T, Locked);
_mov(Dest, T);
@@ -3323,7 +3324,7 @@
}
OperandX8632Mem *Addr = FormMemoryOperand(Ptr, Dest->getType());
const bool Locked = true;
- Variable *T = NULL;
+ Variable *T = nullptr;
_mov(T, Val);
_neg(T);
_xadd(Addr, T, Locked);
@@ -3355,12 +3356,12 @@
NeedsCmpxchg = true;
// NeedsCmpxchg, but no real Op_Lo/Op_Hi need to be done. The values
// just need to be moved to the ecx and ebx registers.
- Op_Lo = NULL;
- Op_Hi = NULL;
+ Op_Lo = nullptr;
+ Op_Hi = nullptr;
break;
}
OperandX8632Mem *Addr = FormMemoryOperand(Ptr, Dest->getType());
- Variable *T = NULL;
+ Variable *T = nullptr;
_mov(T, Val);
_xchg(Addr, T);
_mov(Dest, T);
@@ -3398,7 +3399,7 @@
// jne .LABEL
// mov <dest>, eax
//
- // If Op_{Lo,Hi} are NULL, then just copy the value.
+ // If Op_{Lo,Hi} are nullptr, then just copy the value.
Val = legalize(Val);
Type Ty = Val->getType();
if (Ty == IceType_i64) {
@@ -3410,7 +3411,7 @@
Variable *T_ecx = makeReg(IceType_i32, RegX8632::Reg_ecx);
Variable *T_ebx = makeReg(IceType_i32, RegX8632::Reg_ebx);
InstX8632Label *Label = InstX8632Label::create(Func, this);
- const bool IsXchg8b = Op_Lo == NULL && Op_Hi == NULL;
+ const bool IsXchg8b = Op_Lo == nullptr && Op_Hi == nullptr;
if (!IsXchg8b) {
Context.insert(Label);
_mov(T_ebx, T_eax);
@@ -3456,7 +3457,7 @@
InstX8632Label *Label = InstX8632Label::create(Func, this);
Context.insert(Label);
// We want to pick a different register for T than Eax, so don't use
- // _mov(T == NULL, T_eax).
+ // _mov(T == nullptr, T_eax).
Variable *T = makeReg(Ty);
_mov(T, T_eax);
(this->*Op_Lo)(T, Val);
@@ -3586,7 +3587,7 @@
const Inst *&Reason) {
// Var originates from Var=SrcVar ==>
// set Var:=SrcVar
- if (Var == NULL)
+ if (Var == nullptr)
return false;
if (const Inst *VarAssign = VMetadata->getSingleDefinition(Var)) {
assert(!VMetadata->isMultiDef(Var));
@@ -3610,14 +3611,14 @@
bool matchCombinedBaseIndex(const VariablesMetadata *VMetadata, Variable *&Base,
Variable *&Index, uint16_t &Shift,
const Inst *&Reason) {
- // Index==NULL && Base is Base=Var1+Var2 ==>
+ // Index==nullptr && Base is Base=Var1+Var2 ==>
// set Base=Var1, Index=Var2, Shift=0
- if (Base == NULL)
+ if (Base == nullptr)
return false;
- if (Index != NULL)
+ if (Index != nullptr)
return false;
const Inst *BaseInst = VMetadata->getSingleDefinition(Base);
- if (BaseInst == NULL)
+ if (BaseInst == nullptr)
return false;
assert(!VMetadata->isMultiDef(Base));
if (BaseInst->getSrcSize() < 2)
@@ -3646,10 +3647,10 @@
uint16_t &Shift, const Inst *&Reason) {
// Index is Index=Var*Const && log2(Const)+Shift<=3 ==>
// Index=Var, Shift+=log2(Const)
- if (Index == NULL)
+ if (Index == nullptr)
return false;
const Inst *IndexInst = VMetadata->getSingleDefinition(Index);
- if (IndexInst == NULL)
+ if (IndexInst == nullptr)
return false;
assert(!VMetadata->isMultiDef(Index));
if (IndexInst->getSrcSize() < 2)
@@ -3698,10 +3699,10 @@
// set Base=Var, Offset+=Const
// Base is Base=Var-Const ==>
// set Base=Var, Offset-=Const
- if (Base == NULL)
+ if (Base == nullptr)
return false;
const Inst *BaseInst = VMetadata->getSingleDefinition(Base);
- if (BaseInst == NULL)
+ if (BaseInst == nullptr)
return false;
assert(!VMetadata->isMultiDef(Base));
if (const InstArithmetic *ArithInst =
@@ -3710,8 +3711,8 @@
ArithInst->getOp() != InstArithmetic::Sub)
return false;
bool IsAdd = ArithInst->getOp() == InstArithmetic::Add;
- Variable *Var = NULL;
- ConstantInteger32 *Const = NULL;
+ Variable *Var = nullptr;
+ ConstantInteger32 *Const = nullptr;
if (Variable *VariableOperand =
llvm::dyn_cast<Variable>(ArithInst->getSrc(0))) {
Var = VariableOperand;
@@ -3720,7 +3721,7 @@
Const = llvm::dyn_cast<ConstantInteger32>(ArithInst->getSrc(0));
Var = llvm::dyn_cast<Variable>(ArithInst->getSrc(1));
}
- if (Var == NULL || Const == NULL || VMetadata->isMultiDef(Var))
+ if (Var == nullptr || Const == nullptr || VMetadata->isMultiDef(Var))
return false;
int32_t MoreOffset = IsAdd ? Const->getValue() : -Const->getValue();
if (Utils::WouldOverflowAdd(Offset, MoreOffset))
@@ -3742,7 +3743,7 @@
Instr->dumpDecorated(Func);
}
(void)Offset; // TODO: pattern-match for non-zero offsets.
- if (Base == NULL)
+ if (Base == nullptr)
return;
// If the Base has more than one use or is live across multiple
// blocks, then don't go further. Alternatively (?), never consider
@@ -3754,7 +3755,7 @@
const VariablesMetadata *VMetadata = Func->getVMetadata();
bool Continue = true;
while (Continue) {
- const Inst *Reason = NULL;
+ const Inst *Reason = nullptr;
if (matchTransitiveAssign(VMetadata, Base, Reason) ||
matchTransitiveAssign(VMetadata, Index, Reason) ||
matchCombinedBaseIndex(VMetadata, Base, Index, Shift, Reason) ||
@@ -3815,7 +3816,7 @@
// load instruction's dest variable, and that instruction ends that
// variable's live range, then make the substitution. Deal with
// commutativity optimization in the arithmetic instruction lowering.
- InstArithmetic *NewArith = NULL;
+ InstArithmetic *NewArith = nullptr;
if (InstArithmetic *Arith =
llvm::dyn_cast_or_null<InstArithmetic>(Context.getNextInst())) {
Variable *DestLoad = Inst->getDest();
@@ -3846,7 +3847,7 @@
Inst *Inst = Context.getCur();
Variable *Dest = Inst->getDest();
Operand *Addr = Inst->getSrc(0);
- Variable *Index = NULL;
+ Variable *Index = nullptr;
uint16_t Shift = 0;
int32_t Offset = 0; // TODO: make Constant
// Vanilla ICE load instructions should not use the segment registers,
@@ -3878,7 +3879,7 @@
}
void TargetX8632::lowerRet(const InstRet *Inst) {
- Variable *Reg = NULL;
+ Variable *Reg = nullptr;
if (Inst->hasRetValue()) {
Operand *Src0 = legalize(Inst->getRetValue());
if (Src0->getType() == IceType_i64) {
@@ -4024,7 +4025,7 @@
InstStore *Inst = llvm::cast<InstStore>(Context.getCur());
Operand *Data = Inst->getData();
Operand *Addr = Inst->getAddr();
- Variable *Index = NULL;
+ Variable *Index = nullptr;
uint16_t Shift = 0;
int32_t Offset = 0; // TODO: make Constant
Variable *Base = llvm::dyn_cast<Variable>(Addr);
@@ -4143,7 +4144,7 @@
void TargetX8632::lowerUnreachable(const InstUnreachable * /*Inst*/) {
const SizeT MaxSrcs = 0;
- Variable *Dest = NULL;
+ Variable *Dest = nullptr;
InstCall *Call = makeHelperCall("ice_unreachable", Dest, MaxSrcs);
lowerCall(Call);
}
@@ -4258,8 +4259,8 @@
const llvm::SmallBitVector &RegsForType =
getRegisterSetForType(Dest->getType());
llvm::SmallBitVector AvailRegsForType = RegsForType & Available;
- Variable *SpillLoc = NULL;
- Variable *Preg = NULL;
+ Variable *SpillLoc = nullptr;
+ Variable *Preg = nullptr;
// TODO(stichnot): Opportunity for register randomization.
int32_t RegNum = AvailRegsForType.find_first();
bool IsVector = isVectorType(Dest->getType());
@@ -4408,8 +4409,8 @@
// that the Base and Index components are in physical registers.
Variable *Base = Mem->getBase();
Variable *Index = Mem->getIndex();
- Variable *RegBase = NULL;
- Variable *RegIndex = NULL;
+ Variable *RegBase = nullptr;
+ Variable *RegIndex = nullptr;
if (Base) {
RegBase = legalizeToVar(Base);
}
diff --git a/src/IceTargetLoweringX8632.h b/src/IceTargetLoweringX8632.h
index 6e2bed9..cd82d7a 100644
--- a/src/IceTargetLoweringX8632.h
+++ b/src/IceTargetLoweringX8632.h
@@ -292,12 +292,12 @@
Context.insert(InstX8632Lea::create(Func, Dest, Src0));
}
void _mfence() { Context.insert(InstX8632Mfence::create(Func)); }
- // If Dest=NULL is passed in, then a new variable is created, marked
- // as infinite register allocation weight, and returned through the
- // in/out Dest argument.
+ // If Dest=nullptr is passed in, then a new variable is created,
+ // marked as infinite register allocation weight, and returned
+ // through the in/out Dest argument.
void _mov(Variable *&Dest, Operand *Src0,
int32_t RegNum = Variable::NoRegister) {
- if (Dest == NULL)
+ if (Dest == nullptr)
Dest = makeReg(Src0->getType(), RegNum);
Context.insert(InstX8632Mov::create(Func, Dest, Src0));
}
@@ -396,7 +396,7 @@
void _pxor(Variable *Dest, Operand *Src0) {
Context.insert(InstX8632Pxor::create(Func, Dest, Src0));
}
- void _ret(Variable *Src0 = NULL) {
+ void _ret(Variable *Src0 = nullptr) {
Context.insert(InstX8632Ret::create(Func, Src0));
}
void _rol(Variable *Dest, Operand *Src0) {