Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 1 | //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// |
| 2 | // |
| 3 | // The Subzero Code Generator |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 9 | /// |
| 10 | /// \file |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 11 | /// This file declares the InstARM32 and OperandARM32 classes and their |
| 12 | /// subclasses. This represents the machine instructions and operands used for |
| 13 | /// ARM32 code selection. |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 14 | /// |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 15 | //===----------------------------------------------------------------------===// |
| 16 | |
| 17 | #ifndef SUBZERO_SRC_ICEINSTARM32_H |
| 18 | #define SUBZERO_SRC_ICEINSTARM32_H |
| 19 | |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 20 | #include "IceConditionCodesARM32.h" |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 21 | #include "IceDefs.h" |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 22 | #include "IceInst.h" |
| 23 | #include "IceInstARM32.def" |
| 24 | #include "IceOperand.h" |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 25 | |
| 26 | namespace Ice { |
| 27 | |
| 28 | class TargetARM32; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 29 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 30 | /// OperandARM32 extends the Operand hierarchy. Its subclasses are |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 31 | /// OperandARM32Mem and OperandARM32Flex. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 32 | class OperandARM32 : public Operand { |
| 33 | OperandARM32() = delete; |
| 34 | OperandARM32(const OperandARM32 &) = delete; |
| 35 | OperandARM32 &operator=(const OperandARM32 &) = delete; |
| 36 | |
| 37 | public: |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 38 | enum OperandKindARM32 { |
| 39 | k__Start = Operand::kTarget, |
| 40 | kMem, |
| 41 | kFlexStart, |
| 42 | kFlexImm = kFlexStart, |
| 43 | kFlexReg, |
| 44 | kFlexEnd = kFlexReg |
| 45 | }; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 46 | |
| 47 | enum ShiftKind { |
| 48 | kNoShift = -1, |
| 49 | #define X(enum, emit) enum, |
| 50 | ICEINSTARM32SHIFT_TABLE |
| 51 | #undef X |
| 52 | }; |
| 53 | |
| 54 | using Operand::dump; |
| 55 | void dump(const Cfg *, Ostream &Str) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 56 | if (BuildDefs::dump()) |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 57 | Str << "<OperandARM32>"; |
| 58 | } |
| 59 | |
| 60 | protected: |
| 61 | OperandARM32(OperandKindARM32 Kind, Type Ty) |
| 62 | : Operand(static_cast<OperandKind>(Kind), Ty) {} |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 63 | }; |
| 64 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 65 | /// OperandARM32Mem represents a memory operand in any of the various ARM32 |
| 66 | /// addressing modes. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 67 | class OperandARM32Mem : public OperandARM32 { |
| 68 | OperandARM32Mem() = delete; |
| 69 | OperandARM32Mem(const OperandARM32Mem &) = delete; |
| 70 | OperandARM32Mem &operator=(const OperandARM32Mem &) = delete; |
| 71 | |
| 72 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 73 | /// Memory operand addressing mode. |
| 74 | /// The enum value also carries the encoding. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 75 | // TODO(jvoung): unify with the assembler. |
| 76 | enum AddrMode { |
| 77 | // bit encoding P U W |
| 78 | Offset = (8 | 4 | 0) << 21, // offset (w/o writeback to base) |
| 79 | PreIndex = (8 | 4 | 1) << 21, // pre-indexed addressing with writeback |
| 80 | PostIndex = (0 | 4 | 0) << 21, // post-indexed addressing with writeback |
| 81 | NegOffset = (8 | 0 | 0) << 21, // negative offset (w/o writeback to base) |
| 82 | NegPreIndex = (8 | 0 | 1) << 21, // negative pre-indexed with writeback |
| 83 | NegPostIndex = (0 | 0 | 0) << 21 // negative post-indexed with writeback |
| 84 | }; |
| 85 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 86 | /// Provide two constructors. |
| 87 | /// NOTE: The Variable-typed operands have to be registers. |
| 88 | /// |
| 89 | /// (1) Reg + Imm. The Immediate actually has a limited number of bits |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 90 | /// for encoding, so check canHoldOffset first. It cannot handle general |
| 91 | /// Constant operands like ConstantRelocatable, since a relocatable can |
| 92 | /// potentially take up too many bits. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 93 | static OperandARM32Mem *create(Cfg *Func, Type Ty, Variable *Base, |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 94 | ConstantInteger32 *ImmOffset, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 95 | AddrMode Mode = Offset) { |
| 96 | return new (Func->allocate<OperandARM32Mem>()) |
| 97 | OperandARM32Mem(Func, Ty, Base, ImmOffset, Mode); |
| 98 | } |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 99 | /// (2) Reg +/- Reg with an optional shift of some kind and amount. Note that |
| 100 | /// this mode is disallowed in the NaCl sandbox. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 101 | static OperandARM32Mem *create(Cfg *Func, Type Ty, Variable *Base, |
| 102 | Variable *Index, ShiftKind ShiftOp = kNoShift, |
| 103 | uint16_t ShiftAmt = 0, |
| 104 | AddrMode Mode = Offset) { |
| 105 | return new (Func->allocate<OperandARM32Mem>()) |
| 106 | OperandARM32Mem(Func, Ty, Base, Index, ShiftOp, ShiftAmt, Mode); |
| 107 | } |
| 108 | Variable *getBase() const { return Base; } |
| 109 | ConstantInteger32 *getOffset() const { return ImmOffset; } |
| 110 | Variable *getIndex() const { return Index; } |
| 111 | ShiftKind getShiftOp() const { return ShiftOp; } |
| 112 | uint16_t getShiftAmt() const { return ShiftAmt; } |
| 113 | AddrMode getAddrMode() const { return Mode; } |
| 114 | |
| 115 | bool isRegReg() const { return Index != nullptr; } |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 116 | bool isNegAddrMode() const { |
| 117 | // Positive address modes have the "U" bit set, and negative modes don't. |
| 118 | static_assert((PreIndex & (4 << 21)) != 0, |
| 119 | "Positive addr modes should have U bit set."); |
| 120 | static_assert((NegPreIndex & (4 << 21)) == 0, |
| 121 | "Negative addr modes should have U bit clear."); |
| 122 | return (Mode & (4 << 21)) == 0; |
| 123 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 124 | |
| 125 | void emit(const Cfg *Func) const override; |
| 126 | using OperandARM32::dump; |
| 127 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 128 | |
| 129 | static bool classof(const Operand *Operand) { |
| 130 | return Operand->getKind() == static_cast<OperandKind>(kMem); |
| 131 | } |
| 132 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 133 | /// Return true if a load/store instruction for an element of type Ty can |
| 134 | /// encode the Offset directly in the immediate field of the 32-bit ARM |
| 135 | /// instruction. For some types, if the load is Sign extending, then the range |
| 136 | /// is reduced. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 137 | static bool canHoldOffset(Type Ty, bool SignExt, int32_t Offset); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 138 | |
| 139 | private: |
| 140 | OperandARM32Mem(Cfg *Func, Type Ty, Variable *Base, |
| 141 | ConstantInteger32 *ImmOffset, AddrMode Mode); |
| 142 | OperandARM32Mem(Cfg *Func, Type Ty, Variable *Base, Variable *Index, |
| 143 | ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode); |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 144 | |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 145 | Variable *Base; |
| 146 | ConstantInteger32 *ImmOffset; |
| 147 | Variable *Index; |
| 148 | ShiftKind ShiftOp; |
| 149 | uint16_t ShiftAmt; |
| 150 | AddrMode Mode; |
| 151 | }; |
| 152 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 153 | /// OperandARM32Flex represent the "flexible second operand" for data-processing |
| 154 | /// instructions. It can be a rotatable 8-bit constant, or a register with an |
| 155 | /// optional shift operand. The shift amount can even be a third register. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 156 | class OperandARM32Flex : public OperandARM32 { |
| 157 | OperandARM32Flex() = delete; |
| 158 | OperandARM32Flex(const OperandARM32Flex &) = delete; |
| 159 | OperandARM32Flex &operator=(const OperandARM32Flex &) = delete; |
| 160 | |
| 161 | public: |
| 162 | static bool classof(const Operand *Operand) { |
| 163 | return static_cast<OperandKind>(kFlexStart) <= Operand->getKind() && |
| 164 | Operand->getKind() <= static_cast<OperandKind>(kFlexEnd); |
| 165 | } |
| 166 | |
| 167 | protected: |
| 168 | OperandARM32Flex(OperandKindARM32 Kind, Type Ty) : OperandARM32(Kind, Ty) {} |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 169 | }; |
| 170 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 171 | /// Rotated immediate variant. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 172 | class OperandARM32FlexImm : public OperandARM32Flex { |
| 173 | OperandARM32FlexImm() = delete; |
| 174 | OperandARM32FlexImm(const OperandARM32FlexImm &) = delete; |
| 175 | OperandARM32FlexImm &operator=(const OperandARM32FlexImm &) = delete; |
| 176 | |
| 177 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 178 | /// Immed_8 rotated by an even number of bits (2 * RotateAmt). |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 179 | static OperandARM32FlexImm *create(Cfg *Func, Type Ty, uint32_t Imm, |
| 180 | uint32_t RotateAmt) { |
| 181 | return new (Func->allocate<OperandARM32FlexImm>()) |
| 182 | OperandARM32FlexImm(Func, Ty, Imm, RotateAmt); |
| 183 | } |
| 184 | |
| 185 | void emit(const Cfg *Func) const override; |
| 186 | using OperandARM32::dump; |
| 187 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 188 | |
| 189 | static bool classof(const Operand *Operand) { |
| 190 | return Operand->getKind() == static_cast<OperandKind>(kFlexImm); |
| 191 | } |
| 192 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 193 | /// Return true if the Immediate can fit in the ARM flexible operand. Fills in |
| 194 | /// the out-params RotateAmt and Immed_8 if Immediate fits. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 195 | static bool canHoldImm(uint32_t Immediate, uint32_t *RotateAmt, |
| 196 | uint32_t *Immed_8); |
| 197 | |
| 198 | uint32_t getImm() const { return Imm; } |
| 199 | uint32_t getRotateAmt() const { return RotateAmt; } |
| 200 | |
| 201 | private: |
| 202 | OperandARM32FlexImm(Cfg *Func, Type Ty, uint32_t Imm, uint32_t RotateAmt); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 203 | |
| 204 | uint32_t Imm; |
| 205 | uint32_t RotateAmt; |
| 206 | }; |
| 207 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 208 | /// Shifted register variant. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 209 | class OperandARM32FlexReg : public OperandARM32Flex { |
| 210 | OperandARM32FlexReg() = delete; |
| 211 | OperandARM32FlexReg(const OperandARM32FlexReg &) = delete; |
| 212 | OperandARM32FlexReg &operator=(const OperandARM32FlexReg &) = delete; |
| 213 | |
| 214 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 215 | /// Register with immediate/reg shift amount and shift operation. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 216 | static OperandARM32FlexReg *create(Cfg *Func, Type Ty, Variable *Reg, |
| 217 | ShiftKind ShiftOp, Operand *ShiftAmt) { |
| 218 | return new (Func->allocate<OperandARM32FlexReg>()) |
| 219 | OperandARM32FlexReg(Func, Ty, Reg, ShiftOp, ShiftAmt); |
| 220 | } |
| 221 | |
| 222 | void emit(const Cfg *Func) const override; |
| 223 | using OperandARM32::dump; |
| 224 | void dump(const Cfg *Func, Ostream &Str) const override; |
| 225 | |
| 226 | static bool classof(const Operand *Operand) { |
| 227 | return Operand->getKind() == static_cast<OperandKind>(kFlexReg); |
| 228 | } |
| 229 | |
| 230 | Variable *getReg() const { return Reg; } |
| 231 | ShiftKind getShiftOp() const { return ShiftOp; } |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 232 | /// ShiftAmt can represent an immediate or a register. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 233 | Operand *getShiftAmt() const { return ShiftAmt; } |
| 234 | |
| 235 | private: |
| 236 | OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp, |
| 237 | Operand *ShiftAmt); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 238 | |
| 239 | Variable *Reg; |
| 240 | ShiftKind ShiftOp; |
| 241 | Operand *ShiftAmt; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 242 | }; |
| 243 | |
Jan Voung | 28068ad | 2015-07-31 12:58:46 -0700 | [diff] [blame] | 244 | /// StackVariable represents a Var that isn't assigned a register (stack-only). |
| 245 | /// It is assigned a stack slot, but the slot's offset may be too large to |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 246 | /// represent in the native addressing mode, and so it has a separate base |
| 247 | /// register from SP/FP, where the offset from that base register is then in |
| 248 | /// range. |
Jan Voung | 28068ad | 2015-07-31 12:58:46 -0700 | [diff] [blame] | 249 | class StackVariable final : public Variable { |
| 250 | StackVariable() = delete; |
| 251 | StackVariable(const StackVariable &) = delete; |
| 252 | StackVariable &operator=(const StackVariable &) = delete; |
| 253 | |
| 254 | public: |
| 255 | static StackVariable *create(Cfg *Func, Type Ty, SizeT Index) { |
| 256 | return new (Func->allocate<StackVariable>()) StackVariable(Ty, Index); |
| 257 | } |
| 258 | const static OperandKind StackVariableKind = |
| 259 | static_cast<OperandKind>(kVariable_Target); |
| 260 | static bool classof(const Operand *Operand) { |
| 261 | return Operand->getKind() == StackVariableKind; |
| 262 | } |
| 263 | void setBaseRegNum(int32_t RegNum) { BaseRegNum = RegNum; } |
| 264 | int32_t getBaseRegNum() const override { return BaseRegNum; } |
| 265 | // Inherit dump() and emit() from Variable. |
| 266 | |
| 267 | private: |
| 268 | StackVariable(Type Ty, SizeT Index) |
| 269 | : Variable(StackVariableKind, Ty, Index) {} |
| 270 | int32_t BaseRegNum = Variable::NoRegister; |
| 271 | }; |
| 272 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 273 | /// Base class for ARM instructions. While most ARM instructions can be |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 274 | /// conditionally executed, a few of them are not predicable (halt, memory |
| 275 | /// barriers, etc.). |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 276 | class InstARM32 : public InstTarget { |
| 277 | InstARM32() = delete; |
| 278 | InstARM32(const InstARM32 &) = delete; |
| 279 | InstARM32 &operator=(const InstARM32 &) = delete; |
| 280 | |
| 281 | public: |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 282 | enum InstKindARM32 { |
| 283 | k__Start = Inst::Target, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 284 | Adc, |
| 285 | Add, |
Jan Voung | b0a8c24 | 2015-06-18 15:00:14 -0700 | [diff] [blame] | 286 | Adjuststack, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 287 | And, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 288 | Asr, |
Jan Voung | 55500db | 2015-05-26 14:25:40 -0700 | [diff] [blame] | 289 | Bic, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 290 | Br, |
| 291 | Call, |
| 292 | Cmp, |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 293 | Clz, |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 294 | Dmb, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 295 | Eor, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 296 | Label, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 297 | Ldr, |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 298 | Ldrex, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 299 | Lsl, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 300 | Lsr, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 301 | Mla, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 302 | Mls, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 303 | Mov, |
| 304 | Movt, |
| 305 | Movw, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 306 | Mul, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 307 | Mvn, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 308 | Orr, |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 309 | Pop, |
| 310 | Push, |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 311 | Rbit, |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 312 | Ret, |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 313 | Rev, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 314 | Rsb, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 315 | Sbc, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 316 | Sdiv, |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 317 | Str, |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 318 | Strex, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 319 | Sub, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 320 | Sxt, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 321 | Trap, |
| 322 | Tst, |
| 323 | Udiv, |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 324 | Umull, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 325 | Uxt, |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 326 | Vabs, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 327 | Vadd, |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 328 | Vcmp, |
John Porto | c31e2ed | 2015-09-11 05:17:08 -0700 | [diff] [blame] | 329 | Vcvt, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 330 | Vdiv, |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 331 | Vmrs, |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 332 | Vmul, |
| 333 | Vsqrt, |
| 334 | Vsub |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 335 | }; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 336 | |
| 337 | static const char *getWidthString(Type Ty); |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 338 | static const char *getVecWidthString(Type Ty); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 339 | static CondARM32::Cond getOppositeCondition(CondARM32::Cond Cond); |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 340 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 341 | /// Shared emit routines for common forms of instructions. |
| 342 | static void emitThreeAddrFP(const char *Opcode, const InstARM32 *Inst, |
| 343 | const Cfg *Func); |
| 344 | |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 345 | void dump(const Cfg *Func) const override; |
| 346 | |
Karl Schimpf | 2fee2a2 | 2015-10-22 08:19:26 -0700 | [diff] [blame^] | 347 | void emitIAS(const Cfg *Func) const override; |
| 348 | |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 349 | protected: |
| 350 | InstARM32(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest) |
| 351 | : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 352 | |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 353 | static bool isClassof(const Inst *Inst, InstKindARM32 MyKind) { |
| 354 | return Inst->getKind() == static_cast<InstKind>(MyKind); |
| 355 | } |
Karl Schimpf | 2fee2a2 | 2015-10-22 08:19:26 -0700 | [diff] [blame^] | 356 | |
| 357 | // Generates text of assembly instruction using method emit(), and then adds |
| 358 | // to the assembly buffer as a Fixup. |
| 359 | void emitUsingTextFixup(const Cfg *Func) const; |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 360 | }; |
| 361 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 362 | /// A predicable ARM instruction. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 363 | class InstARM32Pred : public InstARM32 { |
| 364 | InstARM32Pred() = delete; |
| 365 | InstARM32Pred(const InstARM32Pred &) = delete; |
| 366 | InstARM32Pred &operator=(const InstARM32Pred &) = delete; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 367 | |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 368 | public: |
| 369 | InstARM32Pred(Cfg *Func, InstKindARM32 Kind, SizeT Maxsrcs, Variable *Dest, |
| 370 | CondARM32::Cond Predicate) |
| 371 | : InstARM32(Func, Kind, Maxsrcs, Dest), Predicate(Predicate) {} |
| 372 | |
| 373 | CondARM32::Cond getPredicate() const { return Predicate; } |
| 374 | void setPredicate(CondARM32::Cond Pred) { Predicate = Pred; } |
| 375 | |
| 376 | static const char *predString(CondARM32::Cond Predicate); |
| 377 | void dumpOpcodePred(Ostream &Str, const char *Opcode, Type Ty) const; |
| 378 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 379 | /// Shared emit routines for common forms of instructions. |
Jan Voung | 66c3d5e | 2015-06-04 17:02:31 -0700 | [diff] [blame] | 380 | static void emitUnaryopGPR(const char *Opcode, const InstARM32Pred *Inst, |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 381 | const Cfg *Func, bool NeedsWidthSuffix); |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 382 | static void emitUnaryopFP(const char *Opcode, const InstARM32Pred *Inst, |
| 383 | const Cfg *Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 384 | static void emitTwoAddr(const char *Opcode, const InstARM32Pred *Inst, |
| 385 | const Cfg *Func); |
| 386 | static void emitThreeAddr(const char *Opcode, const InstARM32Pred *Inst, |
| 387 | const Cfg *Func, bool SetFlags); |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 388 | static void emitFourAddr(const char *Opcode, const InstARM32Pred *Inst, |
| 389 | const Cfg *Func); |
| 390 | static void emitCmpLike(const char *Opcode, const InstARM32Pred *Inst, |
| 391 | const Cfg *Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 392 | |
| 393 | protected: |
| 394 | CondARM32::Cond Predicate; |
| 395 | }; |
| 396 | |
| 397 | template <typename StreamType> |
| 398 | inline StreamType &operator<<(StreamType &Stream, CondARM32::Cond Predicate) { |
| 399 | Stream << InstARM32Pred::predString(Predicate); |
| 400 | return Stream; |
| 401 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 402 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 403 | /// Instructions of the form x := op(y). |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 404 | template <InstARM32::InstKindARM32 K, bool NeedsWidthSuffix> |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 405 | class InstARM32UnaryopGPR : public InstARM32Pred { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 406 | InstARM32UnaryopGPR() = delete; |
| 407 | InstARM32UnaryopGPR(const InstARM32UnaryopGPR &) = delete; |
| 408 | InstARM32UnaryopGPR &operator=(const InstARM32UnaryopGPR &) = delete; |
| 409 | |
| 410 | public: |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 411 | static InstARM32UnaryopGPR *create(Cfg *Func, Variable *Dest, Operand *Src, |
| 412 | CondARM32::Cond Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 413 | return new (Func->allocate<InstARM32UnaryopGPR>()) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 414 | InstARM32UnaryopGPR(Func, Dest, Src, Predicate); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 415 | } |
| 416 | void emit(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 417 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 418 | return; |
Jan Voung | f645d85 | 2015-07-09 10:35:09 -0700 | [diff] [blame] | 419 | emitUnaryopGPR(Opcode, this, Func, NeedsWidthSuffix); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 420 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 421 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 422 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 423 | return; |
| 424 | Ostream &Str = Func->getContext()->getStrDump(); |
| 425 | dumpDest(Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 426 | Str << " = "; |
| 427 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 428 | Str << " "; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 429 | dumpSources(Func); |
| 430 | } |
| 431 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 432 | |
| 433 | private: |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 434 | InstARM32UnaryopGPR(Cfg *Func, Variable *Dest, Operand *Src, |
| 435 | CondARM32::Cond Predicate) |
| 436 | : InstARM32Pred(Func, K, 1, Dest, Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 437 | addSource(Src); |
| 438 | } |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 439 | |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 440 | static const char *Opcode; |
| 441 | }; |
| 442 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 443 | /// Instructions of the form x := op(y), for vector/FP. |
| 444 | template <InstARM32::InstKindARM32 K> |
| 445 | class InstARM32UnaryopFP : public InstARM32Pred { |
| 446 | InstARM32UnaryopFP() = delete; |
| 447 | InstARM32UnaryopFP(const InstARM32UnaryopFP &) = delete; |
| 448 | InstARM32UnaryopFP &operator=(const InstARM32UnaryopFP &) = delete; |
| 449 | |
| 450 | public: |
| 451 | static InstARM32UnaryopFP *create(Cfg *Func, Variable *Dest, Variable *Src, |
| 452 | CondARM32::Cond Predicate) { |
| 453 | return new (Func->allocate<InstARM32UnaryopFP>()) |
| 454 | InstARM32UnaryopFP(Func, Dest, Src, Predicate); |
| 455 | } |
| 456 | void emit(const Cfg *Func) const override { |
| 457 | if (!BuildDefs::dump()) |
| 458 | return; |
| 459 | emitUnaryopFP(Opcode, this, Func); |
| 460 | } |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 461 | void dump(const Cfg *Func) const override { |
| 462 | if (!BuildDefs::dump()) |
| 463 | return; |
| 464 | Ostream &Str = Func->getContext()->getStrDump(); |
| 465 | dumpDest(Func); |
| 466 | Str << " = "; |
| 467 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 468 | Str << " "; |
| 469 | dumpSources(Func); |
| 470 | } |
| 471 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 472 | |
| 473 | private: |
| 474 | InstARM32UnaryopFP(Cfg *Func, Variable *Dest, Operand *Src, |
| 475 | CondARM32::Cond Predicate) |
| 476 | : InstARM32Pred(Func, K, 1, Dest, Predicate) { |
| 477 | addSource(Src); |
| 478 | } |
| 479 | |
| 480 | static const char *Opcode; |
| 481 | }; |
| 482 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 483 | /// Instructions of the form x := x op y. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 484 | template <InstARM32::InstKindARM32 K> |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 485 | class InstARM32TwoAddrGPR : public InstARM32Pred { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 486 | InstARM32TwoAddrGPR() = delete; |
| 487 | InstARM32TwoAddrGPR(const InstARM32TwoAddrGPR &) = delete; |
| 488 | InstARM32TwoAddrGPR &operator=(const InstARM32TwoAddrGPR &) = delete; |
| 489 | |
| 490 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 491 | /// Dest must be a register. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 492 | static InstARM32TwoAddrGPR *create(Cfg *Func, Variable *Dest, Operand *Src, |
| 493 | CondARM32::Cond Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 494 | return new (Func->allocate<InstARM32TwoAddrGPR>()) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 495 | InstARM32TwoAddrGPR(Func, Dest, Src, Predicate); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 496 | } |
| 497 | void emit(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 498 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 499 | return; |
| 500 | emitTwoAddr(Opcode, this, Func); |
| 501 | } |
Karl Schimpf | 2fee2a2 | 2015-10-22 08:19:26 -0700 | [diff] [blame^] | 502 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 503 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 504 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 505 | return; |
| 506 | Ostream &Str = Func->getContext()->getStrDump(); |
| 507 | dumpDest(Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 508 | Str << " = "; |
| 509 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 510 | Str << " "; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 511 | dumpSources(Func); |
| 512 | } |
| 513 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 514 | |
| 515 | private: |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 516 | InstARM32TwoAddrGPR(Cfg *Func, Variable *Dest, Operand *Src, |
| 517 | CondARM32::Cond Predicate) |
| 518 | : InstARM32Pred(Func, K, 2, Dest, Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 519 | addSource(Dest); |
| 520 | addSource(Src); |
| 521 | } |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 522 | |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 523 | static const char *Opcode; |
| 524 | }; |
| 525 | |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 526 | /// Base class for load instructions. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 527 | template <InstARM32::InstKindARM32 K> |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 528 | class InstARM32LoadBase : public InstARM32Pred { |
| 529 | InstARM32LoadBase() = delete; |
| 530 | InstARM32LoadBase(const InstARM32LoadBase &) = delete; |
| 531 | InstARM32LoadBase &operator=(const InstARM32LoadBase &) = delete; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 532 | |
| 533 | public: |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 534 | static InstARM32LoadBase *create(Cfg *Func, Variable *Dest, Operand *Source, |
| 535 | CondARM32::Cond Predicate) { |
| 536 | return new (Func->allocate<InstARM32LoadBase>()) |
| 537 | InstARM32LoadBase(Func, Dest, Source, Predicate); |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 538 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 539 | void emit(const Cfg *Func) const override; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 540 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 541 | if (!BuildDefs::dump()) |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 542 | return; |
| 543 | Ostream &Str = Func->getContext()->getStrDump(); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 544 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 545 | Str << " "; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 546 | dumpDest(Func); |
| 547 | Str << ", "; |
| 548 | dumpSources(Func); |
| 549 | } |
| 550 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 551 | |
| 552 | private: |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 553 | InstARM32LoadBase(Cfg *Func, Variable *Dest, Operand *Source, |
| 554 | CondARM32::Cond Predicate) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 555 | : InstARM32Pred(Func, K, 1, Dest, Predicate) { |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 556 | addSource(Source); |
| 557 | } |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 558 | |
| 559 | static const char *Opcode; |
| 560 | }; |
| 561 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 562 | /// Instructions of the form x := y op z. May have the side-effect of setting |
| 563 | /// status flags. |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 564 | template <InstARM32::InstKindARM32 K> |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 565 | class InstARM32ThreeAddrGPR : public InstARM32Pred { |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 566 | InstARM32ThreeAddrGPR() = delete; |
| 567 | InstARM32ThreeAddrGPR(const InstARM32ThreeAddrGPR &) = delete; |
| 568 | InstARM32ThreeAddrGPR &operator=(const InstARM32ThreeAddrGPR &) = delete; |
| 569 | |
| 570 | public: |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 571 | /// Create an ordinary binary-op instruction like add, and sub. Dest and Src1 |
| 572 | /// must be registers. |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 573 | static InstARM32ThreeAddrGPR *create(Cfg *Func, Variable *Dest, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 574 | Variable *Src0, Operand *Src1, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 575 | CondARM32::Cond Predicate, |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 576 | bool SetFlags = false) { |
| 577 | return new (Func->allocate<InstARM32ThreeAddrGPR>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 578 | InstARM32ThreeAddrGPR(Func, Dest, Src0, Src1, Predicate, SetFlags); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 579 | } |
| 580 | void emit(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 581 | if (!BuildDefs::dump()) |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 582 | return; |
| 583 | emitThreeAddr(Opcode, this, Func, SetFlags); |
| 584 | } |
Karl Schimpf | 372bdd6 | 2015-10-13 14:39:14 -0700 | [diff] [blame] | 585 | void emitIAS(const Cfg *Func) const override; |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 586 | void dump(const Cfg *Func) const override { |
Jim Stichnoth | 20b71f5 | 2015-06-24 15:52:24 -0700 | [diff] [blame] | 587 | if (!BuildDefs::dump()) |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 588 | return; |
| 589 | Ostream &Str = Func->getContext()->getStrDump(); |
| 590 | dumpDest(Func); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 591 | Str << " = "; |
| 592 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 593 | Str << (SetFlags ? ".s " : " "); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 594 | dumpSources(Func); |
| 595 | } |
| 596 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 597 | |
| 598 | private: |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 599 | InstARM32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, |
| 600 | Operand *Src1, CondARM32::Cond Predicate, bool SetFlags) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 601 | : InstARM32Pred(Func, K, 2, Dest, Predicate), SetFlags(SetFlags) { |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 602 | addSource(Src0); |
| 603 | addSource(Src1); |
| 604 | } |
| 605 | |
| 606 | static const char *Opcode; |
| 607 | bool SetFlags; |
| 608 | }; |
| 609 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 610 | /// Instructions of the form x := y op z, for vector/FP. We leave these as |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 611 | /// unconditional: "ARM deprecates the conditional execution of any instruction |
| 612 | /// encoding provided by the Advanced SIMD Extension that is not also provided |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 613 | /// by the Floating-point (VFP) extension". They do not set flags. |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 614 | template <InstARM32::InstKindARM32 K> |
| 615 | class InstARM32ThreeAddrFP : public InstARM32 { |
| 616 | InstARM32ThreeAddrFP() = delete; |
| 617 | InstARM32ThreeAddrFP(const InstARM32ThreeAddrFP &) = delete; |
| 618 | InstARM32ThreeAddrFP &operator=(const InstARM32ThreeAddrFP &) = delete; |
| 619 | |
| 620 | public: |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 621 | /// Create a vector/FP binary-op instruction like vadd, and vsub. Everything |
| 622 | /// must be a register. |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 623 | static InstARM32ThreeAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0, |
| 624 | Variable *Src1) { |
| 625 | return new (Func->allocate<InstARM32ThreeAddrFP>()) |
| 626 | InstARM32ThreeAddrFP(Func, Dest, Src0, Src1); |
| 627 | } |
| 628 | void emit(const Cfg *Func) const override { |
| 629 | if (!BuildDefs::dump()) |
| 630 | return; |
| 631 | emitThreeAddrFP(Opcode, this, Func); |
| 632 | } |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 633 | void dump(const Cfg *Func) const override { |
| 634 | if (!BuildDefs::dump()) |
| 635 | return; |
| 636 | Ostream &Str = Func->getContext()->getStrDump(); |
| 637 | dumpDest(Func); |
| 638 | Str << " = "; |
| 639 | Str << Opcode << "." << getDest()->getType() << " "; |
| 640 | dumpSources(Func); |
| 641 | } |
| 642 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 643 | |
| 644 | private: |
| 645 | InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, |
| 646 | Variable *Src1) |
| 647 | : InstARM32(Func, K, 2, Dest) { |
| 648 | addSource(Src0); |
| 649 | addSource(Src1); |
| 650 | } |
| 651 | |
| 652 | static const char *Opcode; |
| 653 | }; |
| 654 | |
| 655 | /// Instructions of the form x := a op1 (y op2 z). E.g., multiply accumulate. |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 656 | template <InstARM32::InstKindARM32 K> |
| 657 | class InstARM32FourAddrGPR : public InstARM32Pred { |
| 658 | InstARM32FourAddrGPR() = delete; |
| 659 | InstARM32FourAddrGPR(const InstARM32FourAddrGPR &) = delete; |
| 660 | InstARM32FourAddrGPR &operator=(const InstARM32FourAddrGPR &) = delete; |
| 661 | |
| 662 | public: |
| 663 | // Every operand must be a register. |
| 664 | static InstARM32FourAddrGPR *create(Cfg *Func, Variable *Dest, Variable *Src0, |
| 665 | Variable *Src1, Variable *Src2, |
| 666 | CondARM32::Cond Predicate) { |
| 667 | return new (Func->allocate<InstARM32FourAddrGPR>()) |
| 668 | InstARM32FourAddrGPR(Func, Dest, Src0, Src1, Src2, Predicate); |
| 669 | } |
| 670 | void emit(const Cfg *Func) const override { |
| 671 | if (!BuildDefs::dump()) |
| 672 | return; |
| 673 | emitFourAddr(Opcode, this, Func); |
| 674 | } |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 675 | void dump(const Cfg *Func) const override { |
| 676 | if (!BuildDefs::dump()) |
| 677 | return; |
| 678 | Ostream &Str = Func->getContext()->getStrDump(); |
| 679 | dumpDest(Func); |
| 680 | Str << " = "; |
| 681 | dumpOpcodePred(Str, Opcode, getDest()->getType()); |
| 682 | Str << " "; |
| 683 | dumpSources(Func); |
| 684 | } |
| 685 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 686 | |
| 687 | private: |
| 688 | InstARM32FourAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, |
| 689 | Variable *Src1, Variable *Src2, |
| 690 | CondARM32::Cond Predicate) |
| 691 | : InstARM32Pred(Func, K, 3, Dest, Predicate) { |
| 692 | addSource(Src0); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 693 | addSource(Src1); |
| 694 | addSource(Src2); |
| 695 | } |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 696 | |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 697 | static const char *Opcode; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 698 | }; |
| 699 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 700 | /// Instructions of the form x cmpop y (setting flags). |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 701 | template <InstARM32::InstKindARM32 K> |
| 702 | class InstARM32CmpLike : public InstARM32Pred { |
| 703 | InstARM32CmpLike() = delete; |
| 704 | InstARM32CmpLike(const InstARM32CmpLike &) = delete; |
| 705 | InstARM32CmpLike &operator=(const InstARM32CmpLike &) = delete; |
| 706 | |
| 707 | public: |
| 708 | static InstARM32CmpLike *create(Cfg *Func, Variable *Src0, Operand *Src1, |
| 709 | CondARM32::Cond Predicate) { |
| 710 | return new (Func->allocate<InstARM32CmpLike>()) |
| 711 | InstARM32CmpLike(Func, Src0, Src1, Predicate); |
| 712 | } |
| 713 | void emit(const Cfg *Func) const override { |
| 714 | if (!BuildDefs::dump()) |
| 715 | return; |
| 716 | emitCmpLike(Opcode, this, Func); |
| 717 | } |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 718 | void dump(const Cfg *Func) const override { |
| 719 | if (!BuildDefs::dump()) |
| 720 | return; |
| 721 | Ostream &Str = Func->getContext()->getStrDump(); |
| 722 | dumpOpcodePred(Str, Opcode, getSrc(0)->getType()); |
| 723 | Str << " "; |
| 724 | dumpSources(Func); |
| 725 | } |
| 726 | static bool classof(const Inst *Inst) { return isClassof(Inst, K); } |
| 727 | |
| 728 | private: |
| 729 | InstARM32CmpLike(Cfg *Func, Variable *Src0, Operand *Src1, |
| 730 | CondARM32::Cond Predicate) |
| 731 | : InstARM32Pred(Func, K, 2, nullptr, Predicate) { |
| 732 | addSource(Src0); |
| 733 | addSource(Src1); |
| 734 | } |
| 735 | |
| 736 | static const char *Opcode; |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 737 | }; |
| 738 | |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 739 | using InstARM32Adc = InstARM32ThreeAddrGPR<InstARM32::Adc>; |
| 740 | using InstARM32Add = InstARM32ThreeAddrGPR<InstARM32::Add>; |
| 741 | using InstARM32And = InstARM32ThreeAddrGPR<InstARM32::And>; |
| 742 | using InstARM32Asr = InstARM32ThreeAddrGPR<InstARM32::Asr>; |
| 743 | using InstARM32Bic = InstARM32ThreeAddrGPR<InstARM32::Bic>; |
| 744 | using InstARM32Eor = InstARM32ThreeAddrGPR<InstARM32::Eor>; |
| 745 | using InstARM32Lsl = InstARM32ThreeAddrGPR<InstARM32::Lsl>; |
| 746 | using InstARM32Lsr = InstARM32ThreeAddrGPR<InstARM32::Lsr>; |
| 747 | using InstARM32Mul = InstARM32ThreeAddrGPR<InstARM32::Mul>; |
| 748 | using InstARM32Orr = InstARM32ThreeAddrGPR<InstARM32::Orr>; |
| 749 | using InstARM32Rsb = InstARM32ThreeAddrGPR<InstARM32::Rsb>; |
| 750 | using InstARM32Sbc = InstARM32ThreeAddrGPR<InstARM32::Sbc>; |
| 751 | using InstARM32Sdiv = InstARM32ThreeAddrGPR<InstARM32::Sdiv>; |
| 752 | using InstARM32Sub = InstARM32ThreeAddrGPR<InstARM32::Sub>; |
| 753 | using InstARM32Udiv = InstARM32ThreeAddrGPR<InstARM32::Udiv>; |
| 754 | using InstARM32Vadd = InstARM32ThreeAddrFP<InstARM32::Vadd>; |
| 755 | using InstARM32Vdiv = InstARM32ThreeAddrFP<InstARM32::Vdiv>; |
| 756 | using InstARM32Vmul = InstARM32ThreeAddrFP<InstARM32::Vmul>; |
| 757 | using InstARM32Vsub = InstARM32ThreeAddrFP<InstARM32::Vsub>; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 758 | using InstARM32Ldr = InstARM32LoadBase<InstARM32::Ldr>; |
| 759 | using InstARM32Ldrex = InstARM32LoadBase<InstARM32::Ldrex>; |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 760 | /// MovT leaves the bottom bits alone so dest is also a source. This helps |
| 761 | /// indicate that a previous MovW setting dest is not dead code. |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 762 | using InstARM32Movt = InstARM32TwoAddrGPR<InstARM32::Movt>; |
| 763 | using InstARM32Movw = InstARM32UnaryopGPR<InstARM32::Movw, false>; |
| 764 | using InstARM32Clz = InstARM32UnaryopGPR<InstARM32::Clz, false>; |
| 765 | using InstARM32Mvn = InstARM32UnaryopGPR<InstARM32::Mvn, false>; |
| 766 | using InstARM32Rbit = InstARM32UnaryopGPR<InstARM32::Rbit, false>; |
| 767 | using InstARM32Rev = InstARM32UnaryopGPR<InstARM32::Rev, false>; |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 768 | // Technically, the uxt{b,h} and sxt{b,h} instructions have a rotation operand |
| 769 | // as well (rotate source by 8, 16, 24 bits prior to extending), but we aren't |
| 770 | // using that for now, so just model as a Unaryop. |
Andrew Scull | 8072bae | 2015-09-14 16:01:26 -0700 | [diff] [blame] | 771 | using InstARM32Sxt = InstARM32UnaryopGPR<InstARM32::Sxt, true>; |
| 772 | using InstARM32Uxt = InstARM32UnaryopGPR<InstARM32::Uxt, true>; |
| 773 | using InstARM32Vsqrt = InstARM32UnaryopFP<InstARM32::Vsqrt>; |
| 774 | using InstARM32Mla = InstARM32FourAddrGPR<InstARM32::Mla>; |
| 775 | using InstARM32Mls = InstARM32FourAddrGPR<InstARM32::Mls>; |
| 776 | using InstARM32Cmp = InstARM32CmpLike<InstARM32::Cmp>; |
| 777 | using InstARM32Tst = InstARM32CmpLike<InstARM32::Tst>; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 778 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 779 | // InstARM32Label represents an intra-block label that is the target of an |
| 780 | // intra-block branch. The offset between the label and the branch must be fit |
| 781 | // in the instruction immediate (considered "near"). |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 782 | class InstARM32Label : public InstARM32 { |
| 783 | InstARM32Label() = delete; |
| 784 | InstARM32Label(const InstARM32Label &) = delete; |
| 785 | InstARM32Label &operator=(const InstARM32Label &) = delete; |
| 786 | |
| 787 | public: |
| 788 | static InstARM32Label *create(Cfg *Func, TargetARM32 *Target) { |
| 789 | return new (Func->allocate<InstARM32Label>()) InstARM32Label(Func, Target); |
| 790 | } |
| 791 | uint32_t getEmitInstCount() const override { return 0; } |
| 792 | IceString getName(const Cfg *Func) const; |
| 793 | SizeT getNumber() const { return Number; } |
| 794 | void emit(const Cfg *Func) const override; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 795 | void dump(const Cfg *Func) const override; |
| 796 | |
| 797 | private: |
| 798 | InstARM32Label(Cfg *Func, TargetARM32 *Target); |
| 799 | |
| 800 | SizeT Number; // used for unique label generation. |
| 801 | }; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 802 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 803 | /// Direct branch instruction. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 804 | class InstARM32Br : public InstARM32Pred { |
| 805 | InstARM32Br() = delete; |
| 806 | InstARM32Br(const InstARM32Br &) = delete; |
| 807 | InstARM32Br &operator=(const InstARM32Br &) = delete; |
| 808 | |
| 809 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 810 | /// Create a conditional branch to one of two nodes. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 811 | static InstARM32Br *create(Cfg *Func, CfgNode *TargetTrue, |
| 812 | CfgNode *TargetFalse, CondARM32::Cond Predicate) { |
| 813 | assert(Predicate != CondARM32::AL); |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 814 | constexpr InstARM32Label *NoLabel = nullptr; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 815 | return new (Func->allocate<InstARM32Br>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 816 | InstARM32Br(Func, TargetTrue, TargetFalse, NoLabel, Predicate); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 817 | } |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 818 | /// Create an unconditional branch to a node. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 819 | static InstARM32Br *create(Cfg *Func, CfgNode *Target) { |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 820 | constexpr CfgNode *NoCondTarget = nullptr; |
| 821 | constexpr InstARM32Label *NoLabel = nullptr; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 822 | return new (Func->allocate<InstARM32Br>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 823 | InstARM32Br(Func, NoCondTarget, Target, NoLabel, CondARM32::AL); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 824 | } |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 825 | /// Create a non-terminator conditional branch to a node, with a fallthrough |
| 826 | /// to the next instruction in the current node. This is used for switch |
| 827 | /// lowering. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 828 | static InstARM32Br *create(Cfg *Func, CfgNode *Target, |
| 829 | CondARM32::Cond Predicate) { |
| 830 | assert(Predicate != CondARM32::AL); |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 831 | constexpr CfgNode *NoUncondTarget = nullptr; |
| 832 | constexpr InstARM32Label *NoLabel = nullptr; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 833 | return new (Func->allocate<InstARM32Br>()) |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 834 | InstARM32Br(Func, Target, NoUncondTarget, NoLabel, Predicate); |
| 835 | } |
| 836 | // Create a conditional intra-block branch (or unconditional, if |
| 837 | // Condition==AL) to a label in the current block. |
| 838 | static InstARM32Br *create(Cfg *Func, InstARM32Label *Label, |
| 839 | CondARM32::Cond Predicate) { |
| 840 | constexpr CfgNode *NoCondTarget = nullptr; |
| 841 | constexpr CfgNode *NoUncondTarget = nullptr; |
| 842 | return new (Func->allocate<InstARM32Br>()) |
| 843 | InstARM32Br(Func, NoCondTarget, NoUncondTarget, Label, Predicate); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 844 | } |
| 845 | const CfgNode *getTargetTrue() const { return TargetTrue; } |
| 846 | const CfgNode *getTargetFalse() const { return TargetFalse; } |
| 847 | bool optimizeBranch(const CfgNode *NextNode); |
| 848 | uint32_t getEmitInstCount() const override { |
| 849 | uint32_t Sum = 0; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 850 | if (Label) |
| 851 | ++Sum; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 852 | if (getTargetTrue()) |
| 853 | ++Sum; |
| 854 | if (getTargetFalse()) |
| 855 | ++Sum; |
| 856 | return Sum; |
| 857 | } |
| 858 | bool isUnconditionalBranch() const override { |
| 859 | return getPredicate() == CondARM32::AL; |
| 860 | } |
Andrew Scull | 87f80c1 | 2015-07-20 10:19:16 -0700 | [diff] [blame] | 861 | bool repointEdges(CfgNode *OldNode, CfgNode *NewNode) override; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 862 | void emit(const Cfg *Func) const override; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 863 | void dump(const Cfg *Func) const override; |
| 864 | static bool classof(const Inst *Inst) { return isClassof(Inst, Br); } |
| 865 | |
| 866 | private: |
| 867 | InstARM32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse, |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 868 | const InstARM32Label *Label, CondARM32::Cond Predicate); |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 869 | |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 870 | const CfgNode *TargetTrue; |
| 871 | const CfgNode *TargetFalse; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 872 | const InstARM32Label *Label; // Intra-block branch target |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 873 | }; |
| 874 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 875 | /// AdjustStack instruction - subtracts SP by the given amount and updates the |
| 876 | /// stack offset during code emission. |
Jan Voung | b0a8c24 | 2015-06-18 15:00:14 -0700 | [diff] [blame] | 877 | class InstARM32AdjustStack : public InstARM32 { |
| 878 | InstARM32AdjustStack() = delete; |
| 879 | InstARM32AdjustStack(const InstARM32AdjustStack &) = delete; |
| 880 | InstARM32AdjustStack &operator=(const InstARM32AdjustStack &) = delete; |
| 881 | |
| 882 | public: |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 883 | /// Note: We need both Amount and SrcAmount. If Amount is too large then it |
| 884 | /// needs to be copied to a register (so SrcAmount could be a register). |
| 885 | /// However, we also need the numeric Amount for bookkeeping, and it's hard to |
| 886 | /// pull that from the generic SrcAmount operand. |
Jan Voung | b0a8c24 | 2015-06-18 15:00:14 -0700 | [diff] [blame] | 887 | static InstARM32AdjustStack *create(Cfg *Func, Variable *SP, SizeT Amount, |
| 888 | Operand *SrcAmount) { |
| 889 | return new (Func->allocate<InstARM32AdjustStack>()) |
| 890 | InstARM32AdjustStack(Func, SP, Amount, SrcAmount); |
| 891 | } |
| 892 | void emit(const Cfg *Func) const override; |
Jan Voung | b0a8c24 | 2015-06-18 15:00:14 -0700 | [diff] [blame] | 893 | void dump(const Cfg *Func) const override; |
| 894 | static bool classof(const Inst *Inst) { return isClassof(Inst, Adjuststack); } |
Jan Voung | 28068ad | 2015-07-31 12:58:46 -0700 | [diff] [blame] | 895 | SizeT getAmount() const { return Amount; } |
Jan Voung | b0a8c24 | 2015-06-18 15:00:14 -0700 | [diff] [blame] | 896 | |
| 897 | private: |
| 898 | InstARM32AdjustStack(Cfg *Func, Variable *SP, SizeT Amount, |
| 899 | Operand *SrcAmount); |
| 900 | const SizeT Amount; |
| 901 | }; |
| 902 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 903 | /// Call instruction (bl/blx). Arguments should have already been pushed. |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 904 | /// Technically bl and the register form of blx can be predicated, but we'll |
| 905 | /// leave that out until needed. |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 906 | class InstARM32Call : public InstARM32 { |
| 907 | InstARM32Call() = delete; |
| 908 | InstARM32Call(const InstARM32Call &) = delete; |
| 909 | InstARM32Call &operator=(const InstARM32Call &) = delete; |
| 910 | |
| 911 | public: |
| 912 | static InstARM32Call *create(Cfg *Func, Variable *Dest, Operand *CallTarget) { |
| 913 | return new (Func->allocate<InstARM32Call>()) |
| 914 | InstARM32Call(Func, Dest, CallTarget); |
| 915 | } |
| 916 | Operand *getCallTarget() const { return getSrc(0); } |
| 917 | void emit(const Cfg *Func) const override; |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 918 | void dump(const Cfg *Func) const override; |
| 919 | static bool classof(const Inst *Inst) { return isClassof(Inst, Call); } |
| 920 | |
| 921 | private: |
| 922 | InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget); |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 923 | }; |
| 924 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 925 | /// Pop into a list of GPRs. Technically this can be predicated, but we don't |
| 926 | /// need that functionality. |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 927 | class InstARM32Pop : public InstARM32 { |
| 928 | InstARM32Pop() = delete; |
| 929 | InstARM32Pop(const InstARM32Pop &) = delete; |
| 930 | InstARM32Pop &operator=(const InstARM32Pop &) = delete; |
| 931 | |
| 932 | public: |
| 933 | static InstARM32Pop *create(Cfg *Func, const VarList &Dests) { |
| 934 | return new (Func->allocate<InstARM32Pop>()) InstARM32Pop(Func, Dests); |
| 935 | } |
| 936 | void emit(const Cfg *Func) const override; |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 937 | void dump(const Cfg *Func) const override; |
| 938 | static bool classof(const Inst *Inst) { return isClassof(Inst, Pop); } |
| 939 | |
| 940 | private: |
| 941 | InstARM32Pop(Cfg *Func, const VarList &Dests); |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 942 | |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 943 | VarList Dests; |
| 944 | }; |
| 945 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 946 | /// Push a list of GPRs. Technically this can be predicated, but we don't need |
| 947 | /// that functionality. |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 948 | class InstARM32Push : public InstARM32 { |
| 949 | InstARM32Push() = delete; |
| 950 | InstARM32Push(const InstARM32Push &) = delete; |
| 951 | InstARM32Push &operator=(const InstARM32Push &) = delete; |
| 952 | |
| 953 | public: |
| 954 | static InstARM32Push *create(Cfg *Func, const VarList &Srcs) { |
| 955 | return new (Func->allocate<InstARM32Push>()) InstARM32Push(Func, Srcs); |
| 956 | } |
| 957 | void emit(const Cfg *Func) const override; |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 958 | void dump(const Cfg *Func) const override; |
| 959 | static bool classof(const Inst *Inst) { return isClassof(Inst, Push); } |
| 960 | |
| 961 | private: |
| 962 | InstARM32Push(Cfg *Func, const VarList &Srcs); |
Jan Voung | 0fa6c5a | 2015-06-01 11:04:04 -0700 | [diff] [blame] | 963 | }; |
| 964 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 965 | /// Ret pseudo-instruction. This is actually a "bx" instruction with an "lr" |
| 966 | /// register operand, but epilogue lowering will search for a Ret instead of a |
| 967 | /// generic "bx". This instruction also takes a Source operand (for non-void |
| 968 | /// returning functions) for liveness analysis, though a FakeUse before the ret |
| 969 | /// would do just as well. |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 970 | /// |
| 971 | /// NOTE: Even though "bx" can be predicated, for now leave out the predication |
| 972 | /// since it's not yet known to be useful for Ret. That may complicate finding |
| 973 | /// the terminator instruction if it's not guaranteed to be executed. |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 974 | class InstARM32Ret : public InstARM32 { |
| 975 | InstARM32Ret() = delete; |
| 976 | InstARM32Ret(const InstARM32Ret &) = delete; |
| 977 | InstARM32Ret &operator=(const InstARM32Ret &) = delete; |
| 978 | |
| 979 | public: |
| 980 | static InstARM32Ret *create(Cfg *Func, Variable *LR, |
| 981 | Variable *Source = nullptr) { |
| 982 | return new (Func->allocate<InstARM32Ret>()) InstARM32Ret(Func, LR, Source); |
| 983 | } |
| 984 | void emit(const Cfg *Func) const override; |
| 985 | void emitIAS(const Cfg *Func) const override; |
| 986 | void dump(const Cfg *Func) const override; |
| 987 | static bool classof(const Inst *Inst) { return isClassof(Inst, Ret); } |
| 988 | |
| 989 | private: |
| 990 | InstARM32Ret(Cfg *Func, Variable *LR, Variable *Source); |
Jan Voung | b2d5084 | 2015-05-12 09:53:50 -0700 | [diff] [blame] | 991 | }; |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 992 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 993 | /// Store instruction. It's important for liveness that there is no Dest operand |
| 994 | /// (OperandARM32Mem instead of Dest Variable). |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 995 | class InstARM32Str final : public InstARM32Pred { |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 996 | InstARM32Str() = delete; |
| 997 | InstARM32Str(const InstARM32Str &) = delete; |
| 998 | InstARM32Str &operator=(const InstARM32Str &) = delete; |
| 999 | |
| 1000 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1001 | /// Value must be a register. |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 1002 | static InstARM32Str *create(Cfg *Func, Variable *Value, OperandARM32Mem *Mem, |
| 1003 | CondARM32::Cond Predicate) { |
| 1004 | return new (Func->allocate<InstARM32Str>()) |
| 1005 | InstARM32Str(Func, Value, Mem, Predicate); |
| 1006 | } |
| 1007 | void emit(const Cfg *Func) const override; |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 1008 | void dump(const Cfg *Func) const override; |
| 1009 | static bool classof(const Inst *Inst) { return isClassof(Inst, Str); } |
| 1010 | |
| 1011 | private: |
| 1012 | InstARM32Str(Cfg *Func, Variable *Value, OperandARM32Mem *Mem, |
| 1013 | CondARM32::Cond Predicate); |
Jan Voung | befd03a | 2015-06-02 11:03:03 -0700 | [diff] [blame] | 1014 | }; |
| 1015 | |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1016 | /// Exclusive Store instruction. Like its non-exclusive sibling, it's important |
| 1017 | /// for liveness that there is no Dest operand (OperandARM32Mem instead of Dest |
| 1018 | /// Variable). |
| 1019 | class InstARM32Strex final : public InstARM32Pred { |
| 1020 | InstARM32Strex() = delete; |
| 1021 | InstARM32Strex(const InstARM32Strex &) = delete; |
| 1022 | InstARM32Strex &operator=(const InstARM32Strex &) = delete; |
| 1023 | |
| 1024 | public: |
| 1025 | /// Value must be a register. |
| 1026 | static InstARM32Strex *create(Cfg *Func, Variable *Dest, Variable *Value, |
| 1027 | OperandARM32Mem *Mem, |
| 1028 | CondARM32::Cond Predicate) { |
| 1029 | return new (Func->allocate<InstARM32Strex>()) |
| 1030 | InstARM32Strex(Func, Dest, Value, Mem, Predicate); |
| 1031 | } |
| 1032 | void emit(const Cfg *Func) const override; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1033 | void dump(const Cfg *Func) const override; |
| 1034 | static bool classof(const Inst *Inst) { return isClassof(Inst, Strex); } |
| 1035 | |
| 1036 | private: |
| 1037 | InstARM32Strex(Cfg *Func, Variable *Dest, Variable *Value, |
| 1038 | OperandARM32Mem *Mem, CondARM32::Cond Predicate); |
| 1039 | }; |
| 1040 | |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1041 | class InstARM32Trap : public InstARM32 { |
| 1042 | InstARM32Trap() = delete; |
| 1043 | InstARM32Trap(const InstARM32Trap &) = delete; |
| 1044 | InstARM32Trap &operator=(const InstARM32Trap &) = delete; |
| 1045 | |
| 1046 | public: |
| 1047 | static InstARM32Trap *create(Cfg *Func) { |
| 1048 | return new (Func->allocate<InstARM32Trap>()) InstARM32Trap(Func); |
| 1049 | } |
| 1050 | void emit(const Cfg *Func) const override; |
Jan Voung | 6ec369e | 2015-06-30 11:03:15 -0700 | [diff] [blame] | 1051 | void dump(const Cfg *Func) const override; |
| 1052 | static bool classof(const Inst *Inst) { return isClassof(Inst, Trap); } |
| 1053 | |
| 1054 | private: |
| 1055 | explicit InstARM32Trap(Cfg *Func); |
| 1056 | }; |
| 1057 | |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1058 | /// Unsigned Multiply Long: d.lo, d.hi := x * y |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1059 | class InstARM32Umull : public InstARM32Pred { |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1060 | InstARM32Umull() = delete; |
| 1061 | InstARM32Umull(const InstARM32Umull &) = delete; |
| 1062 | InstARM32Umull &operator=(const InstARM32Umull &) = delete; |
| 1063 | |
| 1064 | public: |
Andrew Scull | 9612d32 | 2015-07-06 14:53:25 -0700 | [diff] [blame] | 1065 | /// Everything must be a register. |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1066 | static InstARM32Umull *create(Cfg *Func, Variable *DestLo, Variable *DestHi, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1067 | Variable *Src0, Variable *Src1, |
| 1068 | CondARM32::Cond Predicate) { |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1069 | return new (Func->allocate<InstARM32Umull>()) |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1070 | InstARM32Umull(Func, DestLo, DestHi, Src0, Src1, Predicate); |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1071 | } |
| 1072 | void emit(const Cfg *Func) const override; |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1073 | void dump(const Cfg *Func) const override; |
| 1074 | static bool classof(const Inst *Inst) { return isClassof(Inst, Umull); } |
| 1075 | |
| 1076 | private: |
| 1077 | InstARM32Umull(Cfg *Func, Variable *DestLo, Variable *DestHi, Variable *Src0, |
Jan Voung | 3bfd99a | 2015-05-22 16:35:25 -0700 | [diff] [blame] | 1078 | Variable *Src1, CondARM32::Cond Predicate); |
John Porto | 1bec8bc | 2015-06-22 10:51:13 -0700 | [diff] [blame] | 1079 | |
Jan Voung | 2971997 | 2015-05-19 11:24:51 -0700 | [diff] [blame] | 1080 | Variable *DestHi; |
| 1081 | }; |
| 1082 | |
John Porto | c31e2ed | 2015-09-11 05:17:08 -0700 | [diff] [blame] | 1083 | /// Handles fp2int, int2fp, and fp2fp conversions. |
| 1084 | class InstARM32Vcvt final : public InstARM32Pred { |
| 1085 | InstARM32Vcvt() = delete; |
| 1086 | InstARM32Vcvt(const InstARM32Vcvt &) = delete; |
| 1087 | InstARM32Vcvt &operator=(const InstARM32Vcvt &) = delete; |
| 1088 | |
| 1089 | public: |
| 1090 | enum VcvtVariant { S2si, S2ui, Si2s, Ui2s, D2si, D2ui, Si2d, Ui2d, S2d, D2s }; |
| 1091 | static InstARM32Vcvt *create(Cfg *Func, Variable *Dest, Variable *Src, |
| 1092 | VcvtVariant Variant, CondARM32::Cond Predicate) { |
| 1093 | return new (Func->allocate<InstARM32Vcvt>()) |
| 1094 | InstARM32Vcvt(Func, Dest, Src, Variant, Predicate); |
| 1095 | } |
| 1096 | void emit(const Cfg *Func) const override; |
John Porto | c31e2ed | 2015-09-11 05:17:08 -0700 | [diff] [blame] | 1097 | void dump(const Cfg *Func) const override; |
| 1098 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vcvt); } |
| 1099 | |
| 1100 | private: |
| 1101 | InstARM32Vcvt(Cfg *Func, Variable *Dest, Variable *Src, VcvtVariant Variant, |
| 1102 | CondARM32::Cond Predicate); |
| 1103 | |
| 1104 | const VcvtVariant Variant; |
| 1105 | }; |
| 1106 | |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1107 | /// Handles (some of) vmov's various formats. |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1108 | class InstARM32Mov final : public InstARM32Pred { |
| 1109 | InstARM32Mov() = delete; |
| 1110 | InstARM32Mov(const InstARM32Mov &) = delete; |
| 1111 | InstARM32Mov &operator=(const InstARM32Mov &) = delete; |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1112 | |
| 1113 | public: |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1114 | static InstARM32Mov *create(Cfg *Func, Variable *Dest, Operand *Src, |
| 1115 | CondARM32::Cond Predicate) { |
| 1116 | return new (Func->allocate<InstARM32Mov>()) |
| 1117 | InstARM32Mov(Func, Dest, Src, Predicate); |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1118 | } |
| 1119 | bool isRedundantAssign() const override { |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1120 | return !isMultiDest() && !isMultiSource() && |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1121 | checkForRedundantAssign(getDest(), getSrc(0)); |
| 1122 | } |
Jim Stichnoth | 28b71be | 2015-10-12 15:24:46 -0700 | [diff] [blame] | 1123 | bool isVarAssign() const override { return llvm::isa<Variable>(getSrc(0)); } |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1124 | void emit(const Cfg *Func) const override; |
| 1125 | void emitIAS(const Cfg *Func) const override; |
| 1126 | void dump(const Cfg *Func) const override; |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1127 | static bool classof(const Inst *Inst) { return isClassof(Inst, Mov); } |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1128 | |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1129 | bool isMultiDest() const { return DestHi != nullptr; } |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1130 | |
| 1131 | bool isMultiSource() const { |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1132 | assert(getSrcSize() == 1 || getSrcSize() == 2); |
| 1133 | return getSrcSize() == 2; |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1134 | } |
| 1135 | |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1136 | Variable *getDestHi() const { return DestHi; } |
| 1137 | |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1138 | private: |
| 1139 | InstARM32Mov(Cfg *Func, Variable *Dest, Operand *Src, |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1140 | CondARM32::Cond Predicate); |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1141 | |
| 1142 | void emitMultiDestSingleSource(const Cfg *Func) const; |
| 1143 | void emitSingleDestMultiSource(const Cfg *Func) const; |
| 1144 | void emitSingleDestSingleSource(const Cfg *Func) const; |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1145 | |
Karl Schimpf | 85342a7 | 2015-10-13 09:49:31 -0700 | [diff] [blame] | 1146 | void emitIASSingleDestSingleSource(const Cfg *Func) const; |
| 1147 | |
John Porto | e0b829f | 2015-09-28 09:50:48 -0700 | [diff] [blame] | 1148 | Variable *DestHi = nullptr; |
John Porto | f977f71 | 2015-09-14 16:28:33 -0700 | [diff] [blame] | 1149 | }; |
| 1150 | |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1151 | class InstARM32Vcmp final : public InstARM32Pred { |
| 1152 | InstARM32Vcmp() = delete; |
| 1153 | InstARM32Vcmp(const InstARM32Vcmp &) = delete; |
| 1154 | InstARM32Vcmp &operator=(const InstARM32Vcmp &) = delete; |
| 1155 | |
| 1156 | public: |
| 1157 | static InstARM32Vcmp *create(Cfg *Func, Variable *Src0, Variable *Src1, |
| 1158 | CondARM32::Cond Predicate) { |
| 1159 | return new (Func->allocate<InstARM32Vcmp>()) |
| 1160 | InstARM32Vcmp(Func, Src0, Src1, Predicate); |
| 1161 | } |
| 1162 | void emit(const Cfg *Func) const override; |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1163 | void dump(const Cfg *Func) const override; |
| 1164 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vcmp); } |
| 1165 | |
| 1166 | private: |
| 1167 | InstARM32Vcmp(Cfg *Func, Variable *Src0, Variable *Src1, |
| 1168 | CondARM32::Cond Predicate); |
| 1169 | }; |
| 1170 | |
| 1171 | /// Copies the FP Status and Control Register the core flags. |
| 1172 | class InstARM32Vmrs final : public InstARM32Pred { |
| 1173 | InstARM32Vmrs() = delete; |
| 1174 | InstARM32Vmrs(const InstARM32Vmrs &) = delete; |
| 1175 | InstARM32Vmrs &operator=(const InstARM32Vmrs &) = delete; |
| 1176 | |
| 1177 | public: |
| 1178 | static InstARM32Vmrs *create(Cfg *Func, CondARM32::Cond Predicate) { |
| 1179 | return new (Func->allocate<InstARM32Vmrs>()) InstARM32Vmrs(Func, Predicate); |
| 1180 | } |
| 1181 | void emit(const Cfg *Func) const override; |
John Porto | 2f5534f | 2015-09-18 15:59:47 -0700 | [diff] [blame] | 1182 | void dump(const Cfg *Func) const override; |
| 1183 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vmrs); } |
| 1184 | |
| 1185 | private: |
| 1186 | InstARM32Vmrs(Cfg *Func, CondARM32::Cond Predicate); |
| 1187 | }; |
| 1188 | |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1189 | class InstARM32Vabs final : public InstARM32Pred { |
| 1190 | InstARM32Vabs() = delete; |
| 1191 | InstARM32Vabs(const InstARM32Vabs &) = delete; |
| 1192 | InstARM32Vabs &operator=(const InstARM32Vabs &) = delete; |
| 1193 | |
| 1194 | public: |
| 1195 | static InstARM32Vabs *create(Cfg *Func, Variable *Dest, Variable *Src, |
| 1196 | CondARM32::Cond Predicate) { |
| 1197 | return new (Func->allocate<InstARM32Vabs>()) |
| 1198 | InstARM32Vabs(Func, Dest, Src, Predicate); |
| 1199 | } |
| 1200 | void emit(const Cfg *Func) const override; |
John Porto | ba6a67c | 2015-09-25 15:19:45 -0700 | [diff] [blame] | 1201 | void dump(const Cfg *Func) const override; |
| 1202 | static bool classof(const Inst *Inst) { return isClassof(Inst, Vabs); } |
| 1203 | |
| 1204 | private: |
| 1205 | InstARM32Vabs(Cfg *Func, Variable *Dest, Variable *Src, |
| 1206 | CondARM32::Cond Predicate); |
| 1207 | }; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1208 | |
| 1209 | class InstARM32Dmb final : public InstARM32Pred { |
| 1210 | InstARM32Dmb() = delete; |
| 1211 | InstARM32Dmb(const InstARM32Dmb &) = delete; |
| 1212 | InstARM32Dmb &operator=(const InstARM32Dmb &) = delete; |
| 1213 | |
| 1214 | public: |
| 1215 | static InstARM32Dmb *create(Cfg *Func) { |
| 1216 | return new (Func->allocate<InstARM32Dmb>()) InstARM32Dmb(Func); |
| 1217 | } |
| 1218 | void emit(const Cfg *Func) const override; |
John Porto | 1699184 | 2015-10-01 15:11:23 -0700 | [diff] [blame] | 1219 | void dump(const Cfg *Func) const override; |
| 1220 | static bool classof(const Inst *Inst) { return isClassof(Inst, Dmb); } |
| 1221 | |
| 1222 | private: |
| 1223 | explicit InstARM32Dmb(Cfg *Func); |
| 1224 | }; |
| 1225 | |
Andrew Scull | 57e1268 | 2015-09-16 11:30:19 -0700 | [diff] [blame] | 1226 | // Declare partial template specializations of emit() methods that already have |
| 1227 | // default implementations. Without this, there is the possibility of ODR |
| 1228 | // violations and link errors. |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 1229 | |
Jan Voung | 86ebec1 | 2015-08-09 07:58:35 -0700 | [diff] [blame] | 1230 | template <> void InstARM32Ldr::emit(const Cfg *Func) const; |
Jan Voung | b3401d2 | 2015-05-18 09:38:21 -0700 | [diff] [blame] | 1231 | template <> void InstARM32Movw::emit(const Cfg *Func) const; |
| 1232 | template <> void InstARM32Movt::emit(const Cfg *Func) const; |
| 1233 | |
Jan Voung | b36ad9b | 2015-04-21 17:01:49 -0700 | [diff] [blame] | 1234 | } // end of namespace Ice |
| 1235 | |
| 1236 | #endif // SUBZERO_SRC_ICEINSTARM32_H |