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Jan Voungbd385e42014-09-18 18:18:10 -07001//===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===//
2//
3// The Subzero Code Generator
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
Andrew Scull9612d322015-07-06 14:53:25 -07009///
10/// \file
Jim Stichnoth92a6e5b2015-12-02 16:52:44 -080011/// \brief Declares the registers and their encodings for x86-32.
Andrew Scull9612d322015-07-06 14:53:25 -070012///
Jan Voungbd385e42014-09-18 18:18:10 -070013//===----------------------------------------------------------------------===//
14
15#ifndef SUBZERO_SRC_ICEREGISTERSX8632_H
16#define SUBZERO_SRC_ICEREGISTERSX8632_H
17
18#include "IceDefs.h"
19#include "IceInstX8632.def"
Jan Voung3b43b892014-09-24 13:32:39 -070020#include "IceTypes.h"
Jan Voungbd385e42014-09-18 18:18:10 -070021
22namespace Ice {
23
John Porto5d0acff2015-06-30 15:29:21 -070024class RegX8632 {
25public:
Andrew Scull57e12682015-09-16 11:30:19 -070026 /// An enum of every register. The enum value may not match the encoding used
27 /// to binary encode register operands in instructions.
John Porto5d0acff2015-06-30 15:29:21 -070028 enum AllRegisters {
Jim Stichnoth5bff61c2015-10-28 09:26:00 -070029#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
30 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
31 isTrunc8Rcvr, isAhRcvr, aliases) \
Jan Voungbd385e42014-09-18 18:18:10 -070032 val,
John Porto5d0acff2015-06-30 15:29:21 -070033 REGX8632_TABLE
Jan Voungbd385e42014-09-18 18:18:10 -070034#undef X
Jim Stichnoth5bff61c2015-10-28 09:26:00 -070035 Reg_NUM
John Porto5d0acff2015-06-30 15:29:21 -070036 };
Jan Voungbd385e42014-09-18 18:18:10 -070037
Andrew Scull57e12682015-09-16 11:30:19 -070038 /// An enum of GPR Registers. The enum value does match the encoding used to
39 /// binary encode register operands in instructions.
John Porto5d0acff2015-06-30 15:29:21 -070040 enum GPRRegister {
Jim Stichnoth5bff61c2015-10-28 09:26:00 -070041#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
42 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
43 isTrunc8Rcvr, isAhRcvr, aliases) \
Jim Stichnoth728c1d42015-07-15 09:00:07 -070044 Encoded_##val = encode,
John Porto5d0acff2015-06-30 15:29:21 -070045 REGX8632_GPR_TABLE
Jan Voung8acded02014-09-22 18:02:25 -070046#undef X
John Porto5d0acff2015-06-30 15:29:21 -070047 Encoded_Not_GPR = -1
48 };
Jan Voung8acded02014-09-22 18:02:25 -070049
Andrew Scull57e12682015-09-16 11:30:19 -070050 /// An enum of XMM Registers. The enum value does match the encoding used to
51 /// binary encode register operands in instructions.
John Porto5d0acff2015-06-30 15:29:21 -070052 enum XmmRegister {
Jim Stichnoth5bff61c2015-10-28 09:26:00 -070053#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
54 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
55 isTrunc8Rcvr, isAhRcvr, aliases) \
Jim Stichnoth728c1d42015-07-15 09:00:07 -070056 Encoded_##val = encode,
John Porto5d0acff2015-06-30 15:29:21 -070057 REGX8632_XMM_TABLE
Jan Voung8acded02014-09-22 18:02:25 -070058#undef X
John Porto5d0acff2015-06-30 15:29:21 -070059 Encoded_Not_Xmm = -1
60 };
Jan Voung8acded02014-09-22 18:02:25 -070061
Andrew Scull57e12682015-09-16 11:30:19 -070062 /// An enum of Byte Registers. The enum value does match the encoding used to
63 /// binary encode register operands in instructions.
John Porto5d0acff2015-06-30 15:29:21 -070064 enum ByteRegister {
Jim Stichnoth5bff61c2015-10-28 09:26:00 -070065#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
66 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
67 isTrunc8Rcvr, isAhRcvr, aliases) \
68 Encoded_8_##val = encode,
John Porto5d0acff2015-06-30 15:29:21 -070069 REGX8632_BYTEREG_TABLE
Jan Voung8acded02014-09-22 18:02:25 -070070#undef X
John Porto5d0acff2015-06-30 15:29:21 -070071 Encoded_Not_ByteReg = -1
72 };
Jan Voung8acded02014-09-22 18:02:25 -070073
Andrew Scull87f80c12015-07-20 10:19:16 -070074 /// An enum of X87 Stack Registers. The enum value does match the encoding
75 /// used to binary encode register operands in instructions.
John Porto5d0acff2015-06-30 15:29:21 -070076 enum X87STRegister {
Jim Stichnoth5bff61c2015-10-28 09:26:00 -070077#define X(val, encode, name) Encoded_##val = encode,
John Porto5d0acff2015-06-30 15:29:21 -070078 X87ST_REGX8632_TABLE
Jan Voung479e5632014-10-08 21:05:27 -070079#undef X
John Porto5d0acff2015-06-30 15:29:21 -070080 Encoded_Not_X87STReg = -1
81 };
82
Jim Stichnoth8aa39662016-02-10 11:20:30 -080083 static inline X87STRegister getEncodedSTReg(uint32_t X87RegNum) {
84 assert(int(Encoded_X87ST_First) <= int(X87RegNum));
85 assert(X87RegNum <= Encoded_X87ST_Last);
86 return X87STRegister(X87RegNum);
John Porto5d0acff2015-06-30 15:29:21 -070087 }
Jan Voung479e5632014-10-08 21:05:27 -070088};
89
Jan Voungbd385e42014-09-18 18:18:10 -070090} // end of namespace Ice
91
92#endif // SUBZERO_SRC_ICEREGISTERSX8632_H