Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 1 | //===- subzero/src/IceRegAlloc.cpp - Linear-scan implementation -----------===// |
| 2 | // |
| 3 | // The Subzero Code Generator |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file implements the LinearScan class, which performs the |
| 11 | // linear-scan register allocation after liveness analysis has been |
| 12 | // performed. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #include "IceCfg.h" |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 17 | #include "IceCfgNode.h" |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 18 | #include "IceInst.h" |
| 19 | #include "IceOperand.h" |
| 20 | #include "IceRegAlloc.h" |
| 21 | #include "IceTargetLowering.h" |
| 22 | |
| 23 | namespace Ice { |
| 24 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 25 | namespace { |
| 26 | |
| 27 | // Returns true if Var has any definitions within Item's live range. |
Jim Stichnoth | 037fa1d | 2014-10-07 11:09:33 -0700 | [diff] [blame] | 28 | // TODO(stichnot): Consider trimming the Definitions list similar to |
| 29 | // how the live ranges are trimmed, since all the overlapsDefs() tests |
| 30 | // are whether some variable's definitions overlap Cur, and trimming |
| 31 | // is with respect Cur.start. Initial tests show no measurable |
| 32 | // performance difference, so we'll keep the code simple for now. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 33 | bool overlapsDefs(const Cfg *Func, const Variable *Item, const Variable *Var) { |
Jim Stichnoth | 037fa1d | 2014-10-07 11:09:33 -0700 | [diff] [blame] | 34 | const bool UseTrimmed = true; |
| 35 | VariablesMetadata *VMetadata = Func->getVMetadata(); |
Jim Stichnoth | 877b04e | 2014-10-15 15:13:06 -0700 | [diff] [blame] | 36 | if (const Inst *FirstDef = VMetadata->getFirstDefinition(Var)) |
| 37 | if (Item->getLiveRange().overlapsInst(FirstDef->getNumber(), UseTrimmed)) |
| 38 | return true; |
| 39 | const InstDefList &Defs = VMetadata->getLatterDefinitions(Var); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 40 | for (size_t i = 0; i < Defs.size(); ++i) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 41 | if (Item->getLiveRange().overlapsInst(Defs[i]->getNumber(), UseTrimmed)) |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 42 | return true; |
| 43 | } |
| 44 | return false; |
| 45 | } |
| 46 | |
| 47 | void dumpDisableOverlap(const Cfg *Func, const Variable *Var, |
| 48 | const char *Reason) { |
| 49 | if (Func->getContext()->isVerbose(IceV_LinearScan)) { |
Jim Stichnoth | 037fa1d | 2014-10-07 11:09:33 -0700 | [diff] [blame] | 50 | VariablesMetadata *VMetadata = Func->getVMetadata(); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 51 | Ostream &Str = Func->getContext()->getStrDump(); |
| 52 | Str << "Disabling Overlap due to " << Reason << " " << *Var |
| 53 | << " LIVE=" << Var->getLiveRange() << " Defs="; |
Jim Stichnoth | 877b04e | 2014-10-15 15:13:06 -0700 | [diff] [blame] | 54 | if (const Inst *FirstDef = VMetadata->getFirstDefinition(Var)) |
| 55 | Str << FirstDef->getNumber(); |
| 56 | const InstDefList &Defs = VMetadata->getLatterDefinitions(Var); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 57 | for (size_t i = 0; i < Defs.size(); ++i) { |
Jim Stichnoth | 877b04e | 2014-10-15 15:13:06 -0700 | [diff] [blame] | 58 | Str << "," << Defs[i]->getNumber(); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 59 | } |
| 60 | Str << "\n"; |
| 61 | } |
| 62 | } |
| 63 | |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 64 | void dumpLiveRange(const Variable *Var, const Cfg *Func) { |
| 65 | Ostream &Str = Func->getContext()->getStrDump(); |
| 66 | const static size_t BufLen = 30; |
| 67 | char buf[BufLen]; |
| 68 | snprintf(buf, BufLen, "%2d", Var->getRegNumTmp()); |
| 69 | Str << "R=" << buf << " V="; |
| 70 | Var->dump(Func); |
| 71 | Str << " Range=" << Var->getLiveRange(); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 72 | } |
| 73 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 74 | } // end of anonymous namespace |
| 75 | |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame^] | 76 | // Prepare for full register allocation of all variables. We depend |
| 77 | // on liveness analysis to have calculated live ranges. |
| 78 | void LinearScan::initForGlobal() { |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 79 | TimerMarker T(TimerStack::TT_initUnhandled, Func); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame^] | 80 | FindPreference = true; |
| 81 | FindOverlap = true; |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 82 | const VarList &Vars = Func->getVariables(); |
| 83 | Unhandled.reserve(Vars.size()); |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame^] | 84 | // Gather the live ranges of all variables and add them to the |
| 85 | // Unhandled set. |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 86 | for (Variable *Var : Vars) { |
| 87 | // Explicitly don't consider zero-weight variables, which are |
| 88 | // meant to be spill slots. |
| 89 | if (Var->getWeight() == RegWeight::Zero) |
| 90 | continue; |
| 91 | // Don't bother if the variable has a null live range, which means |
| 92 | // it was never referenced. |
| 93 | if (Var->getLiveRange().isEmpty()) |
| 94 | continue; |
| 95 | Var->untrimLiveRange(); |
| 96 | Unhandled.push_back(Var); |
| 97 | if (Var->hasReg()) { |
| 98 | Var->setRegNumTmp(Var->getRegNum()); |
| 99 | Var->setLiveRangeInfiniteWeight(); |
| 100 | UnhandledPrecolored.push_back(Var); |
| 101 | } |
| 102 | } |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame^] | 103 | |
| 104 | // Build the (ordered) list of FakeKill instruction numbers. |
| 105 | Kills.clear(); |
| 106 | for (CfgNode *Node : Func->getNodes()) { |
| 107 | for (auto I = Node->getInsts().begin(), E = Node->getInsts().end(); I != E; |
| 108 | ++I) { |
| 109 | if (auto Kill = llvm::dyn_cast<InstFakeKill>(I)) { |
| 110 | if (!Kill->isDeleted() && !Kill->getLinked()->isDeleted()) |
| 111 | Kills.push_back(I->getNumber()); |
| 112 | } |
| 113 | } |
| 114 | } |
| 115 | } |
| 116 | |
| 117 | // Prepare for very simple register allocation of only infinite-weight |
| 118 | // Variables while respecting pre-colored Variables. Some properties |
| 119 | // we take advantage of: |
| 120 | // |
| 121 | // * Live ranges of interest consist of a single segment. |
| 122 | // |
| 123 | // * Live ranges of interest never span a call instruction. |
| 124 | // |
| 125 | // * Phi instructions are not considered because either phis have |
| 126 | // already been lowered, or they don't contain any pre-colored or |
| 127 | // infinite-weight Variables. |
| 128 | // |
| 129 | // * We don't need to renumber instructions before computing live |
| 130 | // ranges because all the high-level ICE instructions are deleted |
| 131 | // prior to lowering, and the low-level instructions are added in |
| 132 | // monotonically increasing order. |
| 133 | // |
| 134 | // * There are no opportunities for register preference or allowing |
| 135 | // overlap. |
| 136 | // |
| 137 | // Some properties we aren't (yet) taking advantage of: |
| 138 | // |
| 139 | // * Because live ranges are a single segment, the Unhandled set will |
| 140 | // always be empty, and the live range trimming operation is |
| 141 | // unnecessary. |
| 142 | // |
| 143 | // * Calculating overlap of single-segment live ranges could be |
| 144 | // optimized a bit. |
| 145 | void LinearScan::initForInfOnly() { |
| 146 | TimerMarker T(TimerStack::TT_initUnhandled, Func); |
| 147 | FindPreference = false; |
| 148 | FindOverlap = false; |
| 149 | SizeT NumVars = 0; |
| 150 | const VarList &Vars = Func->getVariables(); |
| 151 | |
| 152 | // Iterate across all instructions and record the begin and end of |
| 153 | // the live range for each variable that is pre-colored or infinite |
| 154 | // weight. |
| 155 | std::vector<InstNumberT> LRBegin(Vars.size(), Inst::NumberSentinel); |
| 156 | std::vector<InstNumberT> LREnd(Vars.size(), Inst::NumberSentinel); |
| 157 | for (CfgNode *Node : Func->getNodes()) { |
| 158 | for (auto Inst = Node->getInsts().begin(), E = Node->getInsts().end(); |
| 159 | Inst != E; ++Inst) { |
| 160 | if (Inst->isDeleted()) |
| 161 | continue; |
| 162 | if (const Variable *Var = Inst->getDest()) { |
| 163 | if (Var->hasReg() || Var->getWeight() == RegWeight::Inf) { |
| 164 | if (LRBegin[Var->getIndex()] == Inst::NumberSentinel) { |
| 165 | LRBegin[Var->getIndex()] = Inst->getNumber(); |
| 166 | ++NumVars; |
| 167 | } |
| 168 | } |
| 169 | } |
| 170 | for (SizeT I = 0; I < Inst->getSrcSize(); ++I) { |
| 171 | Operand *Src = Inst->getSrc(I); |
| 172 | SizeT NumVars = Src->getNumVars(); |
| 173 | for (SizeT J = 0; J < NumVars; ++J) { |
| 174 | const Variable *Var = Src->getVar(J); |
| 175 | if (Var->hasReg() || Var->getWeight() == RegWeight::Inf) |
| 176 | LREnd[Var->getIndex()] = Inst->getNumber(); |
| 177 | } |
| 178 | } |
| 179 | } |
| 180 | } |
| 181 | |
| 182 | Unhandled.reserve(NumVars); |
| 183 | for (SizeT i = 0; i < Vars.size(); ++i) { |
| 184 | Variable *Var = Vars[i]; |
| 185 | if (LRBegin[i] != Inst::NumberSentinel) { |
| 186 | assert(LREnd[i] != Inst::NumberSentinel); |
| 187 | Unhandled.push_back(Var); |
| 188 | Var->resetLiveRange(); |
| 189 | const uint32_t WeightDelta = 1; |
| 190 | Var->addLiveRange(LRBegin[i], LREnd[i], WeightDelta); |
| 191 | Var->untrimLiveRange(); |
| 192 | if (Var->hasReg()) { |
| 193 | Var->setRegNumTmp(Var->getRegNum()); |
| 194 | Var->setLiveRangeInfiniteWeight(); |
| 195 | UnhandledPrecolored.push_back(Var); |
| 196 | } |
| 197 | --NumVars; |
| 198 | } |
| 199 | } |
| 200 | // This isn't actually a fatal condition, but it would be nice to |
| 201 | // know if we somehow pre-calculated Unhandled's size wrong. |
| 202 | assert(NumVars == 0); |
| 203 | |
| 204 | // Don't build up the list of Kills because we know that no |
| 205 | // infinite-weight Variable has a live range spanning a call. |
| 206 | Kills.clear(); |
| 207 | } |
| 208 | |
| 209 | void LinearScan::init(RegAllocKind Kind) { |
| 210 | Unhandled.clear(); |
| 211 | UnhandledPrecolored.clear(); |
| 212 | Handled.clear(); |
| 213 | Inactive.clear(); |
| 214 | Active.clear(); |
| 215 | |
| 216 | switch (Kind) { |
| 217 | case RAK_Global: |
| 218 | initForGlobal(); |
| 219 | break; |
| 220 | case RAK_InfOnly: |
| 221 | initForInfOnly(); |
| 222 | break; |
| 223 | } |
| 224 | |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 225 | struct CompareRanges { |
| 226 | bool operator()(const Variable *L, const Variable *R) { |
| 227 | InstNumberT Lstart = L->getLiveRange().getStart(); |
| 228 | InstNumberT Rstart = R->getLiveRange().getStart(); |
| 229 | if (Lstart == Rstart) |
| 230 | return L->getIndex() < R->getIndex(); |
| 231 | return Lstart < Rstart; |
| 232 | } |
| 233 | }; |
| 234 | // Do a reverse sort so that erasing elements (from the end) is fast. |
| 235 | std::sort(Unhandled.rbegin(), Unhandled.rend(), CompareRanges()); |
| 236 | std::sort(UnhandledPrecolored.rbegin(), UnhandledPrecolored.rend(), |
| 237 | CompareRanges()); |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 238 | } |
| 239 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 240 | // Implements the linear-scan algorithm. Based on "Linear Scan |
| 241 | // Register Allocation in the Context of SSA Form and Register |
| 242 | // Constraints" by Hanspeter Mössenböck and Michael Pfeiffer, |
| 243 | // ftp://ftp.ssw.uni-linz.ac.at/pub/Papers/Moe02.PDF . This |
| 244 | // implementation is modified to take affinity into account and allow |
| 245 | // two interfering variables to share the same register in certain |
| 246 | // cases. |
| 247 | // |
Jim Stichnoth | 800dab2 | 2014-09-20 12:25:02 -0700 | [diff] [blame] | 248 | // Requires running Cfg::liveness(Liveness_Intervals) in |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 249 | // preparation. Results are assigned to Variable::RegNum for each |
| 250 | // Variable. |
| 251 | void LinearScan::scan(const llvm::SmallBitVector &RegMaskFull) { |
Jim Stichnoth | 8363a06 | 2014-10-07 10:02:38 -0700 | [diff] [blame] | 252 | TimerMarker T(TimerStack::TT_linearScan, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 253 | assert(RegMaskFull.any()); // Sanity check |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 254 | Ostream &Str = Func->getContext()->getStrDump(); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 255 | bool Verbose = Func->getContext()->isVerbose(IceV_LinearScan); |
Jim Stichnoth | 800dab2 | 2014-09-20 12:25:02 -0700 | [diff] [blame] | 256 | Func->resetCurrentNode(); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 257 | VariablesMetadata *VMetadata = Func->getVMetadata(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 258 | |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 259 | // Build a LiveRange representing the Kills list. |
| 260 | LiveRange KillsRange; |
| 261 | for (InstNumberT I : Kills) |
| 262 | KillsRange.addSegment(I, I); |
| 263 | KillsRange.untrim(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 264 | |
| 265 | // RegUses[I] is the number of live ranges (variables) that register |
| 266 | // I is currently assigned to. It can be greater than 1 as a result |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 267 | // of AllowOverlap inference below. |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 268 | std::vector<int> RegUses(RegMaskFull.size()); |
| 269 | // Unhandled is already set to all ranges in increasing order of |
| 270 | // start points. |
| 271 | assert(Active.empty()); |
| 272 | assert(Inactive.empty()); |
| 273 | assert(Handled.empty()); |
| 274 | UnorderedRanges::iterator Next; |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 275 | const TargetLowering::RegSetMask RegsInclude = |
| 276 | TargetLowering::RegSet_CallerSave; |
| 277 | const TargetLowering::RegSetMask RegsExclude = TargetLowering::RegSet_None; |
| 278 | const llvm::SmallBitVector KillsMask = |
| 279 | Func->getTarget()->getRegisterSet(RegsInclude, RegsExclude); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 280 | |
| 281 | while (!Unhandled.empty()) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 282 | Variable *Cur = Unhandled.back(); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 283 | Unhandled.pop_back(); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 284 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 285 | Str << "\nConsidering "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 286 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 287 | Str << "\n"; |
| 288 | } |
| 289 | const llvm::SmallBitVector RegMask = |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 290 | RegMaskFull & Func->getTarget()->getRegisterSetForType(Cur->getType()); |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 291 | KillsRange.trim(Cur->getLiveRange().getStart()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 292 | |
| 293 | // Check for precolored ranges. If Cur is precolored, it |
| 294 | // definitely gets that register. Previously processed live |
| 295 | // ranges would have avoided that register due to it being |
| 296 | // precolored. Future processed live ranges won't evict that |
| 297 | // register because the live range has infinite weight. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 298 | if (Cur->hasReg()) { |
| 299 | int32_t RegNum = Cur->getRegNum(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 300 | // RegNumTmp should have already been set above. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 301 | assert(Cur->getRegNumTmp() == RegNum); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 302 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 303 | Str << "Precoloring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 304 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 305 | Str << "\n"; |
| 306 | } |
| 307 | Active.push_back(Cur); |
| 308 | assert(RegUses[RegNum] >= 0); |
| 309 | ++RegUses[RegNum]; |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 310 | assert(!UnhandledPrecolored.empty()); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 311 | assert(UnhandledPrecolored.back() == Cur); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 312 | UnhandledPrecolored.pop_back(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 313 | continue; |
| 314 | } |
| 315 | |
| 316 | // Check for active ranges that have expired or become inactive. |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 317 | for (auto I = Active.begin(), E = Active.end(); I != E; I = Next) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 318 | Next = I; |
| 319 | ++Next; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 320 | Variable *Item = *I; |
| 321 | Item->trimLiveRange(Cur->getLiveRange().getStart()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 322 | bool Moved = false; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 323 | if (Item->rangeEndsBefore(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 324 | // Move Item from Active to Handled list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 325 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 326 | Str << "Expiring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 327 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 328 | Str << "\n"; |
| 329 | } |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 330 | Handled.splice(Handled.end(), Active, I); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 331 | Moved = true; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 332 | } else if (!Item->rangeOverlapsStart(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 333 | // Move Item from Active to Inactive list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 334 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 335 | Str << "Inactivating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 336 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 337 | Str << "\n"; |
| 338 | } |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 339 | Inactive.splice(Inactive.end(), Active, I); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 340 | Moved = true; |
| 341 | } |
| 342 | if (Moved) { |
| 343 | // Decrement Item from RegUses[]. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 344 | assert(Item->hasRegTmp()); |
| 345 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 346 | --RegUses[RegNum]; |
| 347 | assert(RegUses[RegNum] >= 0); |
| 348 | } |
| 349 | } |
| 350 | |
| 351 | // Check for inactive ranges that have expired or reactivated. |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 352 | for (auto I = Inactive.begin(), E = Inactive.end(); I != E; I = Next) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 353 | Next = I; |
| 354 | ++Next; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 355 | Variable *Item = *I; |
| 356 | Item->trimLiveRange(Cur->getLiveRange().getStart()); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 357 | if (Item->rangeEndsBefore(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 358 | // Move Item from Inactive to Handled list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 359 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 360 | Str << "Expiring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 361 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 362 | Str << "\n"; |
| 363 | } |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 364 | Handled.splice(Handled.end(), Inactive, I); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 365 | } else if (Item->rangeOverlapsStart(Cur)) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 366 | // Move Item from Inactive to Active list. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 367 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 368 | Str << "Reactivating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 369 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 370 | Str << "\n"; |
| 371 | } |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 372 | Active.splice(Active.end(), Inactive, I); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 373 | // Increment Item in RegUses[]. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 374 | assert(Item->hasRegTmp()); |
| 375 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 376 | assert(RegUses[RegNum] >= 0); |
| 377 | ++RegUses[RegNum]; |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | // Calculate available registers into Free[]. |
| 382 | llvm::SmallBitVector Free = RegMask; |
| 383 | for (SizeT i = 0; i < RegMask.size(); ++i) { |
| 384 | if (RegUses[i] > 0) |
| 385 | Free[i] = false; |
| 386 | } |
| 387 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 388 | // Infer register preference and allowable overlap. Only form a |
| 389 | // preference when the current Variable has an unambiguous "first" |
| 390 | // definition. The preference is some source Variable of the |
| 391 | // defining instruction that either is assigned a register that is |
| 392 | // currently free, or that is assigned a register that is not free |
| 393 | // but overlap is allowed. Overlap is allowed when the Variable |
| 394 | // under consideration is single-definition, and its definition is |
| 395 | // a simple assignment - i.e., the register gets copied/aliased |
| 396 | // but is never modified. Furthermore, overlap is only allowed |
| 397 | // when preferred Variable definition instructions do not appear |
| 398 | // within the current Variable's live range. |
| 399 | Variable *Prefer = NULL; |
| 400 | int32_t PreferReg = Variable::NoRegister; |
| 401 | bool AllowOverlap = false; |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame^] | 402 | if (FindPreference) { |
| 403 | if (const Inst *DefInst = VMetadata->getFirstDefinition(Cur)) { |
| 404 | assert(DefInst->getDest() == Cur); |
| 405 | bool IsAssign = DefInst->isSimpleAssign(); |
| 406 | bool IsSingleDef = !VMetadata->isMultiDef(Cur); |
| 407 | for (SizeT i = 0; i < DefInst->getSrcSize(); ++i) { |
| 408 | // TODO(stichnot): Iterate through the actual Variables of the |
| 409 | // instruction, not just the source operands. This could |
| 410 | // capture Load instructions, including address mode |
| 411 | // optimization, for Prefer (but not for AllowOverlap). |
| 412 | if (Variable *SrcVar = llvm::dyn_cast<Variable>(DefInst->getSrc(i))) { |
| 413 | int32_t SrcReg = SrcVar->getRegNumTmp(); |
| 414 | // Only consider source variables that have (so far) been |
| 415 | // assigned a register. That register must be one in the |
| 416 | // RegMask set, e.g. don't try to prefer the stack pointer |
| 417 | // as a result of the stacksave intrinsic. |
| 418 | if (SrcVar->hasRegTmp() && RegMask[SrcReg]) { |
| 419 | if (FindOverlap && !Free[SrcReg]) { |
| 420 | // Don't bother trying to enable AllowOverlap if the |
| 421 | // register is already free. |
| 422 | AllowOverlap = |
| 423 | IsSingleDef && IsAssign && !overlapsDefs(Func, Cur, SrcVar); |
| 424 | } |
| 425 | if (AllowOverlap || Free[SrcReg]) { |
| 426 | Prefer = SrcVar; |
| 427 | PreferReg = SrcReg; |
| 428 | } |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 429 | } |
| 430 | } |
| 431 | } |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame^] | 432 | if (Verbose && Prefer) { |
| 433 | Str << "Initial Prefer=" << *Prefer << " R=" << PreferReg |
| 434 | << " LIVE=" << Prefer->getLiveRange() |
| 435 | << " Overlap=" << AllowOverlap << "\n"; |
| 436 | } |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 437 | } |
| 438 | } |
| 439 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 440 | // Remove registers from the Free[] list where an Inactive range |
| 441 | // overlaps with the current range. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 442 | for (const Variable *Item : Inactive) { |
| 443 | if (Item->rangeOverlaps(Cur)) { |
| 444 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 445 | // Don't assert(Free[RegNum]) because in theory (though |
| 446 | // probably never in practice) there could be two inactive |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 447 | // variables that were marked with AllowOverlap. |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 448 | Free[RegNum] = false; |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 449 | // Disable AllowOverlap if an Inactive variable, which is not |
| 450 | // Prefer, shares Prefer's register, and has a definition |
| 451 | // within Cur's live range. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 452 | if (AllowOverlap && Item != Prefer && RegNum == PreferReg && |
| 453 | overlapsDefs(Func, Cur, Item)) { |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 454 | AllowOverlap = false; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 455 | dumpDisableOverlap(Func, Item, "Inactive"); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 456 | } |
| 457 | } |
| 458 | } |
| 459 | |
| 460 | // Disable AllowOverlap if an Active variable, which is not |
| 461 | // Prefer, shares Prefer's register, and has a definition within |
| 462 | // Cur's live range. |
Jim Stichnoth | 70d0a05 | 2014-11-14 15:53:46 -0800 | [diff] [blame^] | 463 | if (AllowOverlap) { |
| 464 | for (const Variable *Item : Active) { |
| 465 | int32_t RegNum = Item->getRegNumTmp(); |
| 466 | if (Item != Prefer && RegNum == PreferReg && |
| 467 | overlapsDefs(Func, Cur, Item)) { |
| 468 | AllowOverlap = false; |
| 469 | dumpDisableOverlap(Func, Item, "Active"); |
| 470 | } |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 471 | } |
| 472 | } |
| 473 | |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 474 | std::vector<RegWeight> Weights(RegMask.size()); |
| 475 | |
| 476 | // Remove registers from the Free[] list where an Unhandled |
| 477 | // precolored range overlaps with the current range, and set those |
| 478 | // registers to infinite weight so that they aren't candidates for |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 479 | // eviction. Cur->rangeEndsBefore(Item) is an early exit check |
| 480 | // that turns a guaranteed O(N^2) algorithm into expected linear |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 481 | // complexity. |
| 482 | llvm::SmallBitVector PrecoloredUnhandledMask(RegMask.size()); |
| 483 | // Note: PrecoloredUnhandledMask is only used for dumping. |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 484 | for (auto I = UnhandledPrecolored.rbegin(), E = UnhandledPrecolored.rend(); |
| 485 | I != E; ++I) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 486 | Variable *Item = *I; |
| 487 | assert(Item->hasReg()); |
| 488 | if (Cur->rangeEndsBefore(Item)) |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 489 | break; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 490 | if (Item->rangeOverlaps(Cur)) { |
| 491 | int32_t ItemReg = Item->getRegNum(); // Note: not getRegNumTmp() |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 492 | Weights[ItemReg].setWeight(RegWeight::Inf); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 493 | Free[ItemReg] = false; |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 494 | PrecoloredUnhandledMask[ItemReg] = true; |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 495 | // Disable AllowOverlap if the preferred register is one of |
| 496 | // these precolored unhandled overlapping ranges. |
| 497 | if (AllowOverlap && ItemReg == PreferReg) { |
| 498 | AllowOverlap = false; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 499 | dumpDisableOverlap(Func, Item, "PrecoloredUnhandled"); |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 500 | } |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 501 | } |
| 502 | } |
| 503 | |
Jim Stichnoth | 87ff3a1 | 2014-11-14 10:27:29 -0800 | [diff] [blame] | 504 | // Remove scratch registers from the Free[] list, and mark their |
| 505 | // Weights[] as infinite, if KillsRange overlaps Cur's live range. |
| 506 | const bool UseTrimmed = true; |
| 507 | if (Cur->getLiveRange().overlaps(KillsRange, UseTrimmed)) { |
| 508 | Free.reset(KillsMask); |
| 509 | for (int i = KillsMask.find_first(); i != -1; |
| 510 | i = KillsMask.find_next(i)) { |
| 511 | Weights[i].setWeight(RegWeight::Inf); |
| 512 | if (PreferReg == i) |
| 513 | AllowOverlap = false; |
| 514 | } |
| 515 | } |
| 516 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 517 | // Print info about physical register availability. |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 518 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 519 | for (SizeT i = 0; i < RegMask.size(); ++i) { |
| 520 | if (RegMask[i]) { |
| 521 | Str << Func->getTarget()->getRegName(i, IceType_i32) |
Jim Stichnoth | ca662e9 | 2014-07-10 15:32:36 -0700 | [diff] [blame] | 522 | << "(U=" << RegUses[i] << ",F=" << Free[i] |
Jim Stichnoth | 541ba66 | 2014-10-02 12:58:21 -0700 | [diff] [blame] | 523 | << ",P=" << PrecoloredUnhandledMask[i] << ") "; |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 524 | } |
| 525 | } |
| 526 | Str << "\n"; |
| 527 | } |
| 528 | |
Jim Stichnoth | ad40353 | 2014-09-25 12:44:17 -0700 | [diff] [blame] | 529 | if (Prefer && (AllowOverlap || Free[PreferReg])) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 530 | // First choice: a preferred register that is either free or is |
| 531 | // allowed to overlap with its linked variable. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 532 | Cur->setRegNumTmp(PreferReg); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 533 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 534 | Str << "Preferring "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 535 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 536 | Str << "\n"; |
| 537 | } |
| 538 | assert(RegUses[PreferReg] >= 0); |
| 539 | ++RegUses[PreferReg]; |
| 540 | Active.push_back(Cur); |
| 541 | } else if (Free.any()) { |
| 542 | // Second choice: any free register. TODO: After explicit |
| 543 | // affinity is considered, is there a strategy better than just |
| 544 | // picking the lowest-numbered available register? |
| 545 | int32_t RegNum = Free.find_first(); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 546 | Cur->setRegNumTmp(RegNum); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 547 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 548 | Str << "Allocating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 549 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 550 | Str << "\n"; |
| 551 | } |
| 552 | assert(RegUses[RegNum] >= 0); |
| 553 | ++RegUses[RegNum]; |
| 554 | Active.push_back(Cur); |
| 555 | } else { |
| 556 | // Fallback: there are no free registers, so we look for the |
| 557 | // lowest-weight register and see if Cur has higher weight. |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 558 | // Check Active ranges. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 559 | for (const Variable *Item : Active) { |
| 560 | assert(Item->rangeOverlaps(Cur)); |
| 561 | int32_t RegNum = Item->getRegNumTmp(); |
| 562 | assert(Item->hasRegTmp()); |
| 563 | Weights[RegNum].addWeight(Item->getLiveRange().getWeight()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 564 | } |
| 565 | // Same as above, but check Inactive ranges instead of Active. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 566 | for (const Variable *Item : Inactive) { |
| 567 | int32_t RegNum = Item->getRegNumTmp(); |
| 568 | assert(Item->hasRegTmp()); |
| 569 | if (Item->rangeOverlaps(Cur)) |
| 570 | Weights[RegNum].addWeight(Item->getLiveRange().getWeight()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 571 | } |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 572 | |
| 573 | // All the weights are now calculated. Find the register with |
| 574 | // smallest weight. |
| 575 | int32_t MinWeightIndex = RegMask.find_first(); |
| 576 | // MinWeightIndex must be valid because of the initial |
| 577 | // RegMask.any() test. |
| 578 | assert(MinWeightIndex >= 0); |
| 579 | for (SizeT i = MinWeightIndex + 1; i < Weights.size(); ++i) { |
| 580 | if (RegMask[i] && Weights[i] < Weights[MinWeightIndex]) |
| 581 | MinWeightIndex = i; |
| 582 | } |
| 583 | |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 584 | if (Cur->getLiveRange().getWeight() <= Weights[MinWeightIndex]) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 585 | // Cur doesn't have priority over any other live ranges, so |
| 586 | // don't allocate any register to it, and move it to the |
| 587 | // Handled state. |
| 588 | Handled.push_back(Cur); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 589 | if (Cur->getLiveRange().getWeight().isInf()) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 590 | Func->setError("Unable to find a physical register for an " |
| 591 | "infinite-weight live range"); |
| 592 | } |
| 593 | } else { |
| 594 | // Evict all live ranges in Active that register number |
| 595 | // MinWeightIndex is assigned to. |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 596 | for (auto I = Active.begin(), E = Active.end(); I != E; I = Next) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 597 | Next = I; |
| 598 | ++Next; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 599 | Variable *Item = *I; |
| 600 | if (Item->getRegNumTmp() == MinWeightIndex) { |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 601 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 602 | Str << "Evicting "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 603 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 604 | Str << "\n"; |
| 605 | } |
| 606 | --RegUses[MinWeightIndex]; |
| 607 | assert(RegUses[MinWeightIndex] >= 0); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 608 | Item->setRegNumTmp(Variable::NoRegister); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 609 | Handled.splice(Handled.end(), Active, I); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 610 | } |
| 611 | } |
| 612 | // Do the same for Inactive. |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 613 | for (auto I = Inactive.begin(), E = Inactive.end(); I != E; I = Next) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 614 | Next = I; |
| 615 | ++Next; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 616 | Variable *Item = *I; |
| 617 | // Note: The Item->rangeOverlaps(Cur) clause is not part of the |
Jim Stichnoth | 68e2819 | 2014-07-24 08:48:15 -0700 | [diff] [blame] | 618 | // description of AssignMemLoc() in the original paper. But |
| 619 | // there doesn't seem to be any need to evict an inactive |
| 620 | // live range that doesn't overlap with the live range |
| 621 | // currently being considered. It's especially bad if we |
| 622 | // would end up evicting an infinite-weight but |
| 623 | // currently-inactive live range. The most common situation |
| 624 | // for this would be a scratch register kill set for call |
| 625 | // instructions. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 626 | if (Item->getRegNumTmp() == MinWeightIndex && |
| 627 | Item->rangeOverlaps(Cur)) { |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 628 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 629 | Str << "Evicting "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 630 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 631 | Str << "\n"; |
| 632 | } |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 633 | Item->setRegNumTmp(Variable::NoRegister); |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 634 | Handled.splice(Handled.end(), Inactive, I); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 635 | } |
| 636 | } |
| 637 | // Assign the register to Cur. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 638 | Cur->setRegNumTmp(MinWeightIndex); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 639 | assert(RegUses[MinWeightIndex] >= 0); |
| 640 | ++RegUses[MinWeightIndex]; |
| 641 | Active.push_back(Cur); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 642 | if (Verbose) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 643 | Str << "Allocating "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 644 | dumpLiveRange(Cur, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 645 | Str << "\n"; |
| 646 | } |
| 647 | } |
| 648 | } |
| 649 | dump(Func); |
| 650 | } |
| 651 | // Move anything Active or Inactive to Handled for easier handling. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 652 | for (Variable *I : Active) |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 653 | Handled.push_back(I); |
| 654 | Active.clear(); |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 655 | for (Variable *I : Inactive) |
Jim Stichnoth | f44f371 | 2014-10-01 14:05:51 -0700 | [diff] [blame] | 656 | Handled.push_back(I); |
| 657 | Inactive.clear(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 658 | dump(Func); |
| 659 | |
| 660 | // Finish up by assigning RegNumTmp->RegNum for each Variable. |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 661 | for (Variable *Item : Handled) { |
| 662 | int32_t RegNum = Item->getRegNumTmp(); |
Jim Stichnoth | c4554d7 | 2014-09-30 16:49:38 -0700 | [diff] [blame] | 663 | if (Verbose) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 664 | if (!Item->hasRegTmp()) { |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 665 | Str << "Not assigning "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 666 | Item->dump(Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 667 | Str << "\n"; |
| 668 | } else { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 669 | Str << (RegNum == Item->getRegNum() ? "Reassigning " : "Assigning ") |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 670 | << Func->getTarget()->getRegName(RegNum, IceType_i32) << "(r" |
| 671 | << RegNum << ") to "; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 672 | Item->dump(Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 673 | Str << "\n"; |
| 674 | } |
| 675 | } |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 676 | Item->setRegNum(Item->getRegNumTmp()); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 677 | } |
| 678 | |
| 679 | // TODO: Consider running register allocation one more time, with |
| 680 | // infinite registers, for two reasons. First, evicted live ranges |
| 681 | // get a second chance for a register. Second, it allows coalescing |
| 682 | // of stack slots. If there is no time budget for the second |
| 683 | // register allocation run, each unallocated variable just gets its |
| 684 | // own slot. |
| 685 | // |
| 686 | // Another idea for coalescing stack slots is to initialize the |
| 687 | // Unhandled list with just the unallocated variables, saving time |
| 688 | // but not offering second-chance opportunities. |
| 689 | } |
| 690 | |
| 691 | // ======================== Dump routines ======================== // |
| 692 | |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 693 | void LinearScan::dump(Cfg *Func) const { |
| 694 | Ostream &Str = Func->getContext()->getStrDump(); |
| 695 | if (!Func->getContext()->isVerbose(IceV_LinearScan)) |
| 696 | return; |
Jim Stichnoth | 800dab2 | 2014-09-20 12:25:02 -0700 | [diff] [blame] | 697 | Func->resetCurrentNode(); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 698 | Str << "**** Current regalloc state:\n"; |
| 699 | Str << "++++++ Handled:\n"; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 700 | for (const Variable *Item : Handled) { |
| 701 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 702 | Str << "\n"; |
| 703 | } |
| 704 | Str << "++++++ Unhandled:\n"; |
Jim Stichnoth | e22f823 | 2014-10-13 16:20:59 -0700 | [diff] [blame] | 705 | for (auto I = Unhandled.rbegin(), E = Unhandled.rend(); I != E; ++I) { |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 706 | dumpLiveRange(*I, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 707 | Str << "\n"; |
| 708 | } |
| 709 | Str << "++++++ Active:\n"; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 710 | for (const Variable *Item : Active) { |
| 711 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 712 | Str << "\n"; |
| 713 | } |
| 714 | Str << "++++++ Inactive:\n"; |
Jim Stichnoth | 5ce0abb | 2014-10-15 10:16:54 -0700 | [diff] [blame] | 715 | for (const Variable *Item : Inactive) { |
| 716 | dumpLiveRange(Item, Func); |
Jim Stichnoth | d97c7df | 2014-06-04 11:57:08 -0700 | [diff] [blame] | 717 | Str << "\n"; |
| 718 | } |
| 719 | } |
| 720 | |
| 721 | } // end of namespace Ice |