blob: 60f68af5937548cca26cc7dd47b8b876ff3ff330 [file] [log] [blame]
Philip Tricca2d5c2192018-01-15 18:24:10 -08001LIBRARY tss2-mu
2EXPORTS
3 Tss2_MU_BYTE_Marshal
4 Tss2_MU_BYTE_Unmarshal
5 Tss2_MU_INT8_Marshal
6 Tss2_MU_INT8_Unmarshal
7 Tss2_MU_INT16_Marshal
8 Tss2_MU_INT16_Unmarshal
9 Tss2_MU_INT32_Marshal
10 Tss2_MU_INT32_Unmarshal
11 Tss2_MU_INT64_Marshal
12 Tss2_MU_INT64_Unmarshal
13 Tss2_MU_UINT8_Marshal
14 Tss2_MU_UINT8_Unmarshal
15 Tss2_MU_UINT16_Marshal
16 Tss2_MU_UINT16_Unmarshal
17 Tss2_MU_UINT32_Marshal
18 Tss2_MU_UINT32_Unmarshal
19 Tss2_MU_UINT64_Marshal
20 Tss2_MU_UINT64_Unmarshal
21 Tss2_MU_TPM2_CC_Marshal
22 Tss2_MU_TPM2_CC_Unmarshal
23 Tss2_MU_TPM2_ST_Marshal
24 Tss2_MU_TPM2_ST_Unmarshal
25 Tss2_MU_TPMA_ALGORITHM_Marshal
26 Tss2_MU_TPMA_ALGORITHM_Unmarshal
27 Tss2_MU_TPMA_CC_Marshal
28 Tss2_MU_TPMA_CC_Unmarshal
29 Tss2_MU_TPMA_LOCALITY_Marshal
30 Tss2_MU_TPMA_LOCALITY_Unmarshal
31 Tss2_MU_TPMA_NV_Marshal
32 Tss2_MU_TPMA_NV_Unmarshal
33 Tss2_MU_TPMA_OBJECT_Marshal
34 Tss2_MU_TPMA_OBJECT_Unmarshal
35 Tss2_MU_TPMA_PERMANENT_Marshal
36 Tss2_MU_TPMA_PERMANENT_Unmarshal
37 Tss2_MU_TPMA_SESSION_Marshal
38 Tss2_MU_TPMA_SESSION_Unmarshal
39 Tss2_MU_TPMA_STARTUP_CLEAR_Marshal
40 Tss2_MU_TPMA_STARTUP_CLEAR_Unmarshal
41 Tss2_MU_TPM2B_DIGEST_Marshal
42 Tss2_MU_TPM2B_DIGEST_Unmarshal
43 Tss2_MU_TPM2B_NAME_Marshal
44 Tss2_MU_TPM2B_NAME_Unmarshal
45 Tss2_MU_TPM2B_MAX_NV_BUFFER_Marshal
46 Tss2_MU_TPM2B_MAX_NV_BUFFER_Unmarshal
47 Tss2_MU_TPM2B_SENSITIVE_DATA_Marshal
48 Tss2_MU_TPM2B_SENSITIVE_DATA_Unmarshal
49 Tss2_MU_TPM2B_ECC_PARAMETER_Marshal
50 Tss2_MU_TPM2B_ECC_PARAMETER_Unmarshal
51 Tss2_MU_TPM2B_PUBLIC_KEY_RSA_Marshal
52 Tss2_MU_TPM2B_PUBLIC_KEY_RSA_Unmarshal
53 Tss2_MU_TPM2B_PRIVATE_KEY_RSA_Marshal
54 Tss2_MU_TPM2B_PRIVATE_KEY_RSA_Unmarshal
55 Tss2_MU_TPM2B_PRIVATE_Marshal
56 Tss2_MU_TPM2B_PRIVATE_Unmarshal
57 Tss2_MU_TPM2B_CONTEXT_SENSITIVE_Marshal
58 Tss2_MU_TPM2B_CONTEXT_SENSITIVE_Unmarshal
59 Tss2_MU_TPM2B_CONTEXT_DATA_Marshal
60 Tss2_MU_TPM2B_CONTEXT_DATA_Unmarshal
61 Tss2_MU_TPM2B_DATA_Marshal
62 Tss2_MU_TPM2B_DATA_Unmarshal
63 Tss2_MU_TPM2B_SYM_KEY_Marshal
64 Tss2_MU_TPM2B_SYM_KEY_Unmarshal
65 Tss2_MU_TPM2B_ECC_POINT_Marshal
66 Tss2_MU_TPM2B_ECC_POINT_Unmarshal
67 Tss2_MU_TPM2B_NV_PUBLIC_Marshal
68 Tss2_MU_TPM2B_NV_PUBLIC_Unmarshal
69 Tss2_MU_TPM2B_SENSITIVE_Marshal
70 Tss2_MU_TPM2B_SENSITIVE_Unmarshal
71 Tss2_MU_TPM2B_SENSITIVE_CREATE_Marshal
72 Tss2_MU_TPM2B_SENSITIVE_CREATE_Unmarshal
73 Tss2_MU_TPM2B_CREATION_DATA_Marshal
74 Tss2_MU_TPM2B_CREATION_DATA_Unmarshal
75 Tss2_MU_TPM2B_PUBLIC_Marshal
76 Tss2_MU_TPM2B_PUBLIC_Unmarshal
77 Tss2_MU_TPM2B_ID_OBJECT_Marshal
78 Tss2_MU_TPM2B_ID_OBJECT_Unmarshal
79 Tss2_MU_TPM2B_ENCRYPTED_SECRET_Marshal
80 Tss2_MU_TPM2B_ENCRYPTED_SECRET_Unmarshal
81 Tss2_MU_TPM2B_ATTEST_Marshal
82 Tss2_MU_TPM2B_ATTEST_Unmarshal
83 Tss2_MU_TPM2B_MAX_BUFFER_Marshal
84 Tss2_MU_TPM2B_MAX_BUFFER_Unmarshal
85 Tss2_MU_TPM2B_IV_Marshal
86 Tss2_MU_TPM2B_IV_Unmarshal
87 Tss2_MU_TPM2B_AUTH_Marshal
88 Tss2_MU_TPM2B_AUTH_Unmarshal
89 Tss2_MU_TPM2B_EVENT_Marshal
90 Tss2_MU_TPM2B_EVENT_Unmarshal
91 Tss2_MU_TPM2B_NONCE_Marshal
92 Tss2_MU_TPM2B_NONCE_Unmarshal
93 Tss2_MU_TPM2B_OPERAND_Marshal
94 Tss2_MU_TPM2B_OPERAND_Unmarshal
95 Tss2_MU_TPM2B_TIMEOUT_Marshal
96 Tss2_MU_TPM2B_TIMEOUT_Unmarshal
97 Tss2_MU_TPMS_CONTEXT_Marshal
98 Tss2_MU_TPMS_CONTEXT_Unmarshal
99 Tss2_MU_TPMS_TIME_INFO_Marshal
100 Tss2_MU_TPMS_TIME_INFO_Unmarshal
101 Tss2_MU_TPMS_ECC_POINT_Marshal
102 Tss2_MU_TPMS_ECC_POINT_Unmarshal
103 Tss2_MU_TPMS_NV_PUBLIC_Marshal
104 Tss2_MU_TPMS_NV_PUBLIC_Unmarshal
105 Tss2_MU_TPMS_ALG_PROPERTY_Marshal
106 Tss2_MU_TPMS_ALG_PROPERTY_Unmarshal
107 Tss2_MU_TPMS_ALGORITHM_DESCRIPTION_Marshal
108 Tss2_MU_TPMS_ALGORITHM_DESCRIPTION_Unmarshal
109 Tss2_MU_TPMS_TAGGED_PROPERTY_Marshal
110 Tss2_MU_TPMS_TAGGED_PROPERTY_Unmarshal
111 Tss2_MU_TPMS_CLOCK_INFO_Marshal
112 Tss2_MU_TPMS_CLOCK_INFO_Unmarshal
113 Tss2_MU_TPMS_TIME_ATTEST_INFO_Marshal
114 Tss2_MU_TPMS_TIME_ATTEST_INFO_Unmarshal
115 Tss2_MU_TPMS_CERTIFY_INFO_Marshal
116 Tss2_MU_TPMS_CERTIFY_INFO_Unmarshal
117 Tss2_MU_TPMS_COMMAND_AUDIT_INFO_Marshal
118 Tss2_MU_TPMS_COMMAND_AUDIT_INFO_Unmarshal
119 Tss2_MU_TPMS_SESSION_AUDIT_INFO_Marshal
120 Tss2_MU_TPMS_SESSION_AUDIT_INFO_Unmarshal
121 Tss2_MU_TPMS_CREATION_INFO_Marshal
122 Tss2_MU_TPMS_CREATION_INFO_Unmarshal
123 Tss2_MU_TPMS_NV_CERTIFY_INFO_Marshal
124 Tss2_MU_TPMS_NV_CERTIFY_INFO_Unmarshal
125 Tss2_MU_TPMS_AUTH_COMMAND_Marshal
126 Tss2_MU_TPMS_AUTH_COMMAND_Unmarshal
127 Tss2_MU_TPMS_AUTH_RESPONSE_Marshal
128 Tss2_MU_TPMS_AUTH_RESPONSE_Unmarshal
129 Tss2_MU_TPMS_SENSITIVE_CREATE_Marshal
130 Tss2_MU_TPMS_SENSITIVE_CREATE_Unmarshal
131 Tss2_MU_TPMS_SCHEME_HASH_Marshal
132 Tss2_MU_TPMS_SCHEME_HASH_Unmarshal
133 Tss2_MU_TPMS_SCHEME_ECDAA_Marshal
134 Tss2_MU_TPMS_SCHEME_ECDAA_Unmarshal
135 Tss2_MU_TPMS_SCHEME_XOR_Marshal
136 Tss2_MU_TPMS_SCHEME_XOR_Unmarshal
137 Tss2_MU_TPMS_SIGNATURE_RSA_Marshal
138 Tss2_MU_TPMS_SIGNATURE_RSA_Unmarshal
139 Tss2_MU_TPMS_SIGNATURE_ECC_Marshal
140 Tss2_MU_TPMS_SIGNATURE_ECC_Unmarshal
141 Tss2_MU_TPMS_NV_PIN_COUNTER_PARAMETERS_Marshal
142 Tss2_MU_TPMS_NV_PIN_COUNTER_PARAMETERS_Unmarshal
143 Tss2_MU_TPMS_CONTEXT_DATA_Marshal
144 Tss2_MU_TPMS_CONTEXT_DATA_Unmarshal
145 Tss2_MU_TPMS_PCR_SELECT_Marshal
146 Tss2_MU_TPMS_PCR_SELECT_Unmarshal
147 Tss2_MU_TPMS_PCR_SELECTION_Marshal
148 Tss2_MU_TPMS_PCR_SELECTION_Unmarshal
149 Tss2_MU_TPMS_TAGGED_PCR_SELECT_Marshal
150 Tss2_MU_TPMS_TAGGED_PCR_SELECT_Unmarshal
151 Tss2_MU_TPMS_QUOTE_INFO_Marshal
152 Tss2_MU_TPMS_QUOTE_INFO_Unmarshal
153 Tss2_MU_TPMS_CREATION_DATA_Marshal
154 Tss2_MU_TPMS_CREATION_DATA_Unmarshal
155 Tss2_MU_TPMS_ECC_PARMS_Marshal
156 Tss2_MU_TPMS_ECC_PARMS_Unmarshal
157 Tss2_MU_TPMS_ATTEST_Marshal
158 Tss2_MU_TPMS_ATTEST_Unmarshal
159 Tss2_MU_TPMS_ALGORITHM_DETAIL_ECC_Marshal
160 Tss2_MU_TPMS_ALGORITHM_DETAIL_ECC_Unmarshal
161 Tss2_MU_TPMS_CAPABILITY_DATA_Marshal
162 Tss2_MU_TPMS_CAPABILITY_DATA_Unmarshal
163 Tss2_MU_TPMS_KEYEDHASH_PARMS_Marshal
164 Tss2_MU_TPMS_KEYEDHASH_PARMS_Unmarshal
165 Tss2_MU_TPMS_RSA_PARMS_Marshal
166 Tss2_MU_TPMS_RSA_PARMS_Unmarshal
167 Tss2_MU_TPMS_SYMCIPHER_PARMS_Marshal
168 Tss2_MU_TPMS_SYMCIPHER_PARMS_Unmarshal
169 Tss2_MU_TPMS_AC_OUTPUT_Marshal
170 Tss2_MU_TPMS_AC_OUTPUT_Unmarshal
171 Tss2_MU_TPML_CC_Marshal
172 Tss2_MU_TPML_CC_Unmarshal
173 Tss2_MU_TPML_CCA_Marshal
174 Tss2_MU_TPML_CCA_Unmarshal
175 Tss2_MU_TPML_ALG_Marshal
176 Tss2_MU_TPML_ALG_Unmarshal
177 Tss2_MU_TPML_ALG_PROPERTY_Marshal
178 Tss2_MU_TPML_ALG_PROPERTY_Unmarshal
179 Tss2_MU_TPML_HANDLE_Marshal
180 Tss2_MU_TPML_HANDLE_Unmarshal
181 Tss2_MU_TPML_DIGEST_Marshal
182 Tss2_MU_TPML_DIGEST_Unmarshal
183 Tss2_MU_TPML_ECC_CURVE_Marshal
184 Tss2_MU_TPML_ECC_CURVE_Unmarshal
185 Tss2_MU_TPML_TAGGED_TPM_PROPERTY_Marshal
186 Tss2_MU_TPML_TAGGED_TPM_PROPERTY_Unmarshal
187 Tss2_MU_TPML_TAGGED_PCR_PROPERTY_Marshal
188 Tss2_MU_TPML_TAGGED_PCR_PROPERTY_Unmarshal
189 Tss2_MU_TPML_PCR_SELECTION_Marshal
190 Tss2_MU_TPML_PCR_SELECTION_Unmarshal
191 Tss2_MU_TPML_DIGEST_VALUES_Marshal
192 Tss2_MU_TPML_DIGEST_VALUES_Unmarshal
193 Tss2_MU_TPML_INTEL_PTT_PROPERTY_Marshal
194 Tss2_MU_TPML_INTEL_PTT_PROPERTY_Unmarshal
195 Tss2_MU_TPML_AC_CAPABILITIES_Marshal
196 Tss2_MU_TPML_AC_CAPABILITIES_Unmarshal
197 Tss2_MU_TPMU_HA_Marshal
198 Tss2_MU_TPMU_HA_Unmarshal
199 Tss2_MU_TPMU_ATTEST_Marshal
200 Tss2_MU_TPMU_ATTEST_Unmarshal
201 Tss2_MU_TPMU_SYM_KEY_BITS_Marshal
202 Tss2_MU_TPMU_SYM_KEY_BITS_Unmarshal
203 Tss2_MU_TPMU_SYM_MODE_Marshal
204 Tss2_MU_TPMU_SYM_MODE_Unmarshal
205 Tss2_MU_TPMU_SIG_SCHEME_Marshal
206 Tss2_MU_TPMU_SIG_SCHEME_Unmarshal
207 Tss2_MU_TPMU_KDF_SCHEME_Marshal
208 Tss2_MU_TPMU_KDF_SCHEME_Unmarshal
209 Tss2_MU_TPMU_ASYM_SCHEME_Marshal
210 Tss2_MU_TPMU_ASYM_SCHEME_Unmarshal
211 Tss2_MU_TPMU_SCHEME_KEYEDHASH_Marshal
212 Tss2_MU_TPMU_SCHEME_KEYEDHASH_Unmarshal
213 Tss2_MU_TPMU_SIGNATURE_Marshal
214 Tss2_MU_TPMU_SIGNATURE_Unmarshal
215 Tss2_MU_TPMU_SENSITIVE_COMPOSITE_Marshal
216 Tss2_MU_TPMU_SENSITIVE_COMPOSITE_Unmarshal
217 Tss2_MU_TPMU_CAPABILITIES_Marshal
218 Tss2_MU_TPMU_CAPABILITIES_Unmarshal
219 Tss2_MU_TPMU_PUBLIC_PARMS_Marshal
220 Tss2_MU_TPMU_PUBLIC_PARMS_Unmarshal
221 Tss2_MU_TPMU_PUBLIC_ID_Marshal
222 Tss2_MU_TPMU_PUBLIC_ID_Unmarshal
223 Tss2_MU_TPMT_HA_Marshal
224 Tss2_MU_TPMT_HA_Unmarshal
225 Tss2_MU_TPMT_SYM_DEF_Marshal
226 Tss2_MU_TPMT_SYM_DEF_Unmarshal
227 Tss2_MU_TPMT_SYM_DEF_OBJECT_Marshal
228 Tss2_MU_TPMT_SYM_DEF_OBJECT_Unmarshal
229 Tss2_MU_TPMT_KEYEDHASH_SCHEME_Marshal
230 Tss2_MU_TPMT_KEYEDHASH_SCHEME_Unmarshal
231 Tss2_MU_TPMT_SIG_SCHEME_Marshal
232 Tss2_MU_TPMT_SIG_SCHEME_Unmarshal
233 Tss2_MU_TPMT_KDF_SCHEME_Marshal
234 Tss2_MU_TPMT_KDF_SCHEME_Unmarshal
235 Tss2_MU_TPMT_ASYM_SCHEME_Marshal
236 Tss2_MU_TPMT_ASYM_SCHEME_Unmarshal
237 Tss2_MU_TPMT_RSA_SCHEME_Marshal
238 Tss2_MU_TPMT_RSA_SCHEME_Unmarshal
239 Tss2_MU_TPMT_RSA_DECRYPT_Marshal
240 Tss2_MU_TPMT_RSA_DECRYPT_Unmarshal
241 Tss2_MU_TPMT_ECC_SCHEME_Marshal
242 Tss2_MU_TPMT_ECC_SCHEME_Unmarshal
243 Tss2_MU_TPMT_SIGNATURE_Marshal
244 Tss2_MU_TPMT_SIGNATURE_Unmarshal
245 Tss2_MU_TPMT_SENSITIVE_Marshal
246 Tss2_MU_TPMT_SENSITIVE_Unmarshal
247 Tss2_MU_TPMT_PUBLIC_Marshal
248 Tss2_MU_TPMT_PUBLIC_Unmarshal
249 Tss2_MU_TPMT_PUBLIC_PARMS_Marshal
250 Tss2_MU_TPMT_PUBLIC_PARMS_Unmarshal
251 Tss2_MU_TPMT_TK_CREATION_Marshal
252 Tss2_MU_TPMT_TK_CREATION_Unmarshal
253 Tss2_MU_TPMT_TK_VERIFIED_Marshal
254 Tss2_MU_TPMT_TK_VERIFIED_Unmarshal
255 Tss2_MU_TPMT_TK_AUTH_Marshal
256 Tss2_MU_TPMT_TK_AUTH_Unmarshal
257 Tss2_MU_TPMT_TK_HASHCHECK_Marshal
258 Tss2_MU_TPMT_TK_HASHCHECK_Unmarshal
259 Tss2_MU_TPMS_EMPTY_Marshal
260 Tss2_MU_TPMS_EMPTY_Unmarshal
261 Tss2_MU_TPM2_HANDLE_Marshal
262 Tss2_MU_TPM2_HANDLE_Unmarshal
263 Tss2_MU_TPM2_SE_Marshal
264 Tss2_MU_TPM2_SE_Unmarshal
265 Tss2_MU_TPMI_ALG_HASH_Marshal
266 Tss2_MU_TPMI_ALG_HASH_Unmarshal