Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 Czech Technical University. |
| 3 | * |
| 4 | * Michal SIMEK <monstr@seznam.cz> |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #ifndef __CONFIG_H |
| 26 | #define __CONFIG_H |
| 27 | |
| 28 | #include "../board/xilinx/ml401/xparameters.h" |
| 29 | |
| 30 | #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ |
| 31 | #define CONFIG_ML401 1 /* ML401 Board */ |
| 32 | |
| 33 | /* uart */ |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 34 | #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR |
| 35 | #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 36 | #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } |
| 37 | |
| 38 | /* setting reset address */ |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 39 | //#define CFG_RESET_ADDRESS TEXT_BASE |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 40 | |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 41 | /* ethernet */ |
| 42 | #define CONFIG_EMACLITE 1 |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 43 | #define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 44 | |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 45 | /* gpio */ |
| 46 | #define CFG_GPIO_0 1 |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 47 | #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 48 | |
| 49 | /* interrupt controller */ |
| 50 | #define CFG_INTC_0 1 |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 51 | #define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR |
| 52 | #define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 53 | |
| 54 | /* timer */ |
| 55 | #define CFG_TIMER_0 1 |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 56 | #define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR |
| 57 | #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ |
| 58 | #define FREQUENCE XILINX_CLOCK_FREQ |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 59 | #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) |
| 60 | |
| 61 | /* |
| 62 | * memory layout - Example |
| 63 | * TEXT_BASE = 0x1200_0000; |
| 64 | * CFG_SRAM_BASE = 0x1000_0000; |
| 65 | * CFG_SRAM_SIZE = 0x0400_0000; |
| 66 | * |
| 67 | * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 |
| 68 | * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 69 | * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 70 | * |
| 71 | * 0x1000_0000 CFG_SDRAM_BASE |
| 72 | * FREE |
| 73 | * 0x1200_0000 TEXT_BASE |
| 74 | * U-BOOT code |
| 75 | * 0x1202_0000 |
| 76 | * FREE |
| 77 | * |
| 78 | * STACK |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 79 | * 0x13F7_F000 CFG_MALLOC_BASE |
| 80 | * MALLOC_AREA 256kB Alloc |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 81 | * 0x11FB_F000 CFG_MONITOR_BASE |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 82 | * MONITOR_CODE 256kB Env |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 83 | * 0x13FF_F000 CFG_GBL_DATA_OFFSET |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 84 | * GLOBAL_DATA 4kB bd, gd |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 85 | * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE |
| 86 | */ |
| 87 | |
| 88 | /* ddr sdram - main memory */ |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 89 | #define CFG_SDRAM_BASE XILINX_RAM_START |
| 90 | #define CFG_SDRAM_SIZE XILINX_RAM_SIZE |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 91 | #define CFG_MEMTEST_START CFG_SDRAM_BASE |
| 92 | #define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000) |
| 93 | |
| 94 | /* global pointer */ |
| 95 | #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 96 | /* start of global data */ |
| 97 | #define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 98 | |
| 99 | /* monitor code */ |
| 100 | #define SIZE 0x40000 |
| 101 | #define CFG_MONITOR_LEN SIZE |
| 102 | #define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN) |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 103 | #define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN) |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 104 | #define CFG_MALLOC_LEN SIZE |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 105 | #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 106 | |
| 107 | /* stack */ |
| 108 | #define CFG_INIT_SP_OFFSET CFG_MONITOR_BASE |
| 109 | |
| 110 | /*#define RAMENV */ |
| 111 | #define FLASH |
| 112 | |
| 113 | #ifdef FLASH |
Michal Simek | 1798049 | 2007-03-26 01:39:07 +0200 | [diff] [blame] | 114 | #define CFG_FLASH_BASE XILINX_FLASH_START |
| 115 | #define CFG_FLASH_SIZE XILINX_FLASH_SIZE |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 116 | #define CFG_FLASH_CFI 1 |
| 117 | #define CFG_FLASH_CFI_DRIVER 1 |
| 118 | #define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */ |
| 119 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 120 | #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 121 | #define CFG_FLASH_PROTECTION /* hardware flash protection */ |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 122 | |
| 123 | #ifdef RAMENV |
| 124 | #define CFG_ENV_IS_NOWHERE 1 |
| 125 | #define CFG_ENV_SIZE 0x1000 |
| 126 | #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) |
| 127 | |
| 128 | #else /* !RAMENV */ |
| 129 | #define CFG_ENV_IS_IN_FLASH 1 |
| 130 | #define CFG_ENV_ADDR 0x40000 |
| 131 | #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */ |
| 132 | #define CFG_ENV_SIZE 0x2000 |
| 133 | #endif /* !RAMBOOT */ |
| 134 | #else /* !FLASH */ |
| 135 | /* ENV in RAM */ |
| 136 | #define CFG_NO_FLASH 1 |
| 137 | #define CFG_ENV_IS_NOWHERE 1 |
| 138 | #define CFG_ENV_SIZE 0x1000 |
| 139 | #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 140 | #define CFG_FLASH_PROTECTION /* hardware flash protection */ |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 141 | #endif /* !FLASH */ |
| 142 | |
| 143 | #ifdef FLASH |
| 144 | #ifdef RAMENV |
| 145 | #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ |
| 146 | CFG_CMD_MEMORY |\ |
| 147 | CFG_CMD_MISC |\ |
| 148 | CFG_CMD_AUTOSCRIPT |\ |
| 149 | CFG_CMD_IRQ |\ |
| 150 | CFG_CMD_ASKENV |\ |
| 151 | CFG_CMD_BDI |\ |
| 152 | CFG_CMD_RUN |\ |
| 153 | CFG_CMD_LOADS |\ |
| 154 | CFG_CMD_LOADB |\ |
| 155 | CFG_CMD_IMI |\ |
| 156 | CFG_CMD_NET |\ |
| 157 | CFG_CMD_CACHE |\ |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 158 | CFG_CMD_FAT |\ |
| 159 | CFG_CMD_EXT2 |\ |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 160 | CFG_CMD_JFFS2 |\ |
| 161 | CFG_CMD_ECHO |\ |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 162 | CFG_CMD_IMLS |\ |
| 163 | CFG_CMD_FLASH |\ |
| 164 | CFG_CMD_PING \ |
| 165 | ) |
| 166 | #else /* !RAMENV */ |
| 167 | #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ |
| 168 | CFG_CMD_MEMORY |\ |
| 169 | CFG_CMD_MISC |\ |
| 170 | CFG_CMD_AUTOSCRIPT |\ |
| 171 | CFG_CMD_IRQ |\ |
| 172 | CFG_CMD_ASKENV |\ |
| 173 | CFG_CMD_BDI |\ |
| 174 | CFG_CMD_RUN |\ |
| 175 | CFG_CMD_LOADS |\ |
| 176 | CFG_CMD_LOADB |\ |
| 177 | CFG_CMD_IMI |\ |
| 178 | CFG_CMD_NET |\ |
| 179 | CFG_CMD_CACHE |\ |
| 180 | CFG_CMD_IMLS |\ |
| 181 | CFG_CMD_FLASH |\ |
| 182 | CFG_CMD_PING |\ |
| 183 | CFG_CMD_ENV |\ |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 184 | CFG_CMD_FAT |\ |
| 185 | CFG_CMD_EXT2 |\ |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 186 | CFG_CMD_JFFS2 |\ |
| 187 | CFG_CMD_ECHO |\ |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 188 | CFG_CMD_SAVES \ |
| 189 | ) |
| 190 | |
| 191 | #endif |
| 192 | |
| 193 | #else /* !FLASH */ |
| 194 | #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ |
| 195 | CFG_CMD_MEMORY |\ |
| 196 | CFG_CMD_MISC |\ |
| 197 | CFG_CMD_AUTOSCRIPT |\ |
| 198 | CFG_CMD_IRQ |\ |
| 199 | CFG_CMD_ASKENV |\ |
| 200 | CFG_CMD_BDI |\ |
| 201 | CFG_CMD_RUN |\ |
| 202 | CFG_CMD_LOADS |\ |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 203 | CFG_CMD_FAT |\ |
| 204 | CFG_CMD_EXT2 |\ |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 205 | CFG_CMD_LOADB |\ |
| 206 | CFG_CMD_IMI |\ |
| 207 | CFG_CMD_NET |\ |
| 208 | CFG_CMD_CACHE |\ |
| 209 | CFG_CMD_PING \ |
| 210 | ) |
| 211 | #endif /* !FLASH */ |
| 212 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 213 | #include <cmd_confdefs.h> |
| 214 | |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 215 | #if (CONFIG_COMMANDS & CFG_CMD_JFFS2) |
| 216 | /* JFFS2 partitions */ |
| 217 | #define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */ |
| 218 | #define MTDIDS_DEFAULT "nor0=ml401-0" |
| 219 | |
| 220 | /* default mtd partition table */ |
| 221 | #define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ |
| 222 | "256k(env),3m(kernel),1m(romfs),"\ |
| 223 | "1m(cramfs),-(jffs2)" |
| 224 | #endif |
| 225 | |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 226 | /* Miscellaneous configurable options */ |
| 227 | #define CFG_PROMPT "U-Boot-mONStR> " |
| 228 | #define CFG_CBSIZE 512 /* size of console buffer */ |
| 229 | #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */ |
| 230 | #define CFG_MAXARGS 15 /* max number of command args */ |
| 231 | #define CFG_LONGHELP |
| 232 | #define CFG_LOAD_ADDR 0x12000000 /* default load address */ |
| 233 | |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 234 | #define CONFIG_BOOTDELAY 30 |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 235 | #define CONFIG_BOOTARGS "root=romfs" |
| 236 | #define CONFIG_HOSTNAME "ml401" |
| 237 | #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" |
| 238 | #define CONFIG_IPADDR 192.168.0.3 |
| 239 | #define CONFIG_SERVERIP 192.168.0.5 |
| 240 | #define CONFIG_GATEWAYIP 192.168.0.1 |
| 241 | #define CONFIG_ETHADDR 00:E0:0C:00:00:FD |
| 242 | |
| 243 | /* architecture dependent code */ |
| 244 | #define CFG_USR_EXCEP /* user exception */ |
| 245 | #define CFG_HZ 1000 |
| 246 | |
| 247 | /* system ace */ |
Michal Simek | 3255644 | 2007-04-21 21:07:22 +0200 | [diff] [blame] | 248 | #define CONFIG_SYSTEMACE |
| 249 | /* #define DEBUG_SYSTEMACE */ |
| 250 | #define SYSTEMACE_CONFIG_FPGA |
| 251 | #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR |
| 252 | #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH |
| 253 | #define CONFIG_DOS_PARTITION |
| 254 | |
Michal Simek | 144876a | 2007-04-24 23:01:02 +0200 | [diff] [blame^] | 255 | #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" |
| 256 | |
| 257 | #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ |
| 258 | "nor0=ml401-0\0"\ |
| 259 | "mtdparts=mtdparts=ml401-0:"\ |
| 260 | "256k(u-boot),256k(env),3m(kernel),"\ |
| 261 | "1m(romfs),1m(cramfs),-(jffs2)\0" |
| 262 | |
Michal Simek | 76316a3 | 2007-03-11 13:42:58 +0100 | [diff] [blame] | 263 | #endif /* __CONFIG_H */ |