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wdenkfe8c2802002-11-03 00:38:21 +00001/*
2 * ML2.h: ML2 specific config options
3 *
4 * Copyright 2002 Mind NV
5 *
6 * http://www.mind.be/
7 *
8 * Author : Peter De Schrijver (p2@mind.be)
9 *
10 * Derived from : other configuration header files in this tree
11 *
12 * This software may be used and distributed according to the terms of
13 * the GNU General Public License (GPL) version 2, incorporated herein by
14 * reference. Drivers based on or derived from this code fall under the GPL
15 * and must retain the authorship, copyright and this license notice. This
16 * file is not a complete program and may only be used when the entire
17 * program is licensed under the GPL.
18 *
19 */
20
21#ifndef __CONFIG_H
22#define __CONFIG_H
23
24/*
25 * High Level Configuration Options
26 * (easy to change)
27 */
28
29#define CONFIG_405 1 /* This is a PPC405 CPU */
30#define CONFIG_4xx 1 /* ...member of PPC4xx family */
31#define CONFIG_ML2 1 /* ...on a ML2 board */
32
33
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020034#define CONFIG_ENV_IS_IN_FLASH 1
wdenkfe8c2802002-11-03 00:38:21 +000035
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +020036#ifdef CONFIG_ENV_IS_IN_NVRAM
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020037#undef CONFIG_ENV_IS_IN_FLASH
wdenkfe8c2802002-11-03 00:38:21 +000038#else
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020039#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +020040#undef CONFIG_ENV_IS_IN_NVRAM
wdenkfe8c2802002-11-03 00:38:21 +000041#endif
42#endif
43
44#define CONFIG_BAUDRATE 9600
45#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
46
47#if 1
48#define CONFIG_BOOTCOMMAND "bootm" /* autoboot command */
49#else
50#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
51#endif
52
53#define CONFIG_PREBOOT "fsload 0x00100000 /boot/image"
54
wdenkfe8c2802002-11-03 00:38:21 +000055#if 0
56#define CONFIG_BOOTARGS "root=/dev/nfs " \
57 "ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \
58 "nfsroot=192.168.2.190:/home/stefan/cpci405/target_ftest4"
59#else
60#define CONFIG_BOOTARGS "root=/dev/mtdblock2 " \
61 "console=ttyS0 console=tty"
62
63#endif
64
65#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkfe8c2802002-11-03 00:38:21 +000067
68
Jon Loeliger8353e132007-07-08 14:14:17 -050069/*
Jon Loeliger659e2f62007-07-10 09:10:49 -050070 * BOOTP options
71 */
72#define CONFIG_BOOTP_BOOTFILESIZE
73#define CONFIG_BOOTP_BOOTPATH
74#define CONFIG_BOOTP_GATEWAY
75#define CONFIG_BOOTP_HOSTNAME
76
77
78/*
Jon Loeliger8353e132007-07-08 14:14:17 -050079 * Command line configuration.
80 */
81#include <config_cmd_default.h>
wdenkfe8c2802002-11-03 00:38:21 +000082
Jon Loeliger8353e132007-07-08 14:14:17 -050083#define CONFIG_CMD_IRQ
84#define CONFIG_CMD_KGDB
85#define CONFIG_CMD_BEDBUG
86#define CONFIG_CMD_ELF
87#define CONFIG_CMD_JFFS2
88
89#undef CONFIG_CMD_NET
90#undef CONFIG_CMD_RTC
91#undef CONFIG_CMD_PCI
92#undef CONFIG_CMD_I2C
93
wdenkfe8c2802002-11-03 00:38:21 +000094
95#undef CONFIG_WATCHDOG /* watchdog disabled */
96
97#define CONFIG_SYS_CLK_FREQ 50000000
98
99#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
100
101/*
102 * Miscellaneous configurable options
103 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104#define CONFIG_SYS_LONGHELP /* undef to save memory */
105#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeliger8353e132007-07-08 14:14:17 -0500106#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200107#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkfe8c2802002-11-03 00:38:21 +0000108#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkfe8c2802002-11-03 00:38:21 +0000110#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
112#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
113#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkfe8c2802002-11-03 00:38:21 +0000114
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
116#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
wdenkfe8c2802002-11-03 00:38:21 +0000117
118/*
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
120 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
121 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
wdenkfe8c2802002-11-03 00:38:21 +0000122 * The Linux BASE_BAUD define should match this configuration.
123 * baseBaud = cpuClock/(uartDivisor*16)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
wdenkfe8c2802002-11-03 00:38:21 +0000125 * set Linux BASE_BAUD to 403200.
126 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
128#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
wdenkfe8c2802002-11-03 00:38:21 +0000129
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130#define CONFIG_SYS_BASE_BAUD (3125000*16)
131#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD
132#define CONFIG_SYS_DUART_CHAN 0
133#define CONFIG_SYS_NS16550_COM1 0xa0001003
134#define CONFIG_SYS_NS16550_COM2 0xa0011003
135#define CONFIG_SYS_NS16550_REG_SIZE -4
136#define CONFIG_SYS_NS16550 1
137#define CONFIG_SYS_INIT_CHAN1 1
138#define CONFIG_SYS_INIT_CHAN2 1
wdenkfe8c2802002-11-03 00:38:21 +0000139
140/* The following table includes the supported baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_BAUDRATE_TABLE \
wdenkfe8c2802002-11-03 00:38:21 +0000142 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
143
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
145#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
wdenkfe8c2802002-11-03 00:38:21 +0000146
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
wdenkfe8c2802002-11-03 00:38:21 +0000148
149
wdenkfe8c2802002-11-03 00:38:21 +0000150/*-----------------------------------------------------------------------
151 * Start addresses for the final memory configuration
152 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkfe8c2802002-11-03 00:38:21 +0000154 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_SDRAM_BASE 0x00000000
156#define CONFIG_SYS_FLASH_BASE 0x18000000
157#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
158#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
159#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
wdenkfe8c2802002-11-03 00:38:21 +0000160
161/*
162 * For booting Linux, the board info and command line data
163 * have to be in the first 8 MB of memory, since this is
164 * the maximum mapped by the Linux kernel during initialization.
165 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkfe8c2802002-11-03 00:38:21 +0000167/*-----------------------------------------------------------------------
168 * FLASH organization
169 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
171#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
wdenkfe8c2802002-11-03 00:38:21 +0000172
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
174#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkfe8c2802002-11-03 00:38:21 +0000175
176/* BEG ENVIRONNEMENT FLASH */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200177#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200178#define CONFIG_ENV_OFFSET 0x00050000 /* Offset of Environment Sector */
179#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
180#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
wdenkfe8c2802002-11-03 00:38:21 +0000181#endif
182/* END ENVIRONNEMENT FLASH */
183/*-----------------------------------------------------------------------
184 * NVRAM organization
185 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
187#define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
wdenkfe8c2802002-11-03 00:38:21 +0000188
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +0200189#ifdef CONFIG_ENV_IS_IN_NVRAM
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200190#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
191#define CONFIG_ENV_ADDR \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
wdenkfe8c2802002-11-03 00:38:21 +0000193#endif
wdenkfe8c2802002-11-03 00:38:21 +0000194
195/*
196 * Init Memory Controller:
197 *
198 * BR0/1 and OR0/1 (FLASH)
199 */
200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200201#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
wdenkfe8c2802002-11-03 00:38:21 +0000202#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
203
204
205/* Configuration Port location */
206#define CONFIG_PORT_ADDR 0xF0000500
207
208/*-----------------------------------------------------------------------
209 * Definitions for initial stack pointer and data area (in DPRAM)
210 */
211
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
213#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
214#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
215#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
216#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkfe8c2802002-11-03 00:38:21 +0000217
218/*-----------------------------------------------------------------------
219 * Definitions for Serial Presence Detect EEPROM address
220 * (to get SDRAM settings)
221 */
222#define SPD_EEPROM_ADDRESS 0x50
223
224/*
225 * Internal Definitions
226 *
227 * Boot Flags
228 */
229#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
230#define BOOTFLAG_WARM 0x02 /* Software reboot */
231
Jon Loeliger8353e132007-07-08 14:14:17 -0500232#if defined(CONFIG_CMD_KGDB)
wdenkfe8c2802002-11-03 00:38:21 +0000233#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
234#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
235#endif
236
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200237/*
238 * JFFS2 partitions
239 *
240 */
241/* No command line, one static partition, whole device */
Stefan Roese68d7d652009-03-19 13:30:36 +0100242#undef CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200243#define CONFIG_JFFS2_DEV "nor0"
244#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
245#define CONFIG_JFFS2_PART_OFFSET 0x00080000
wdenkfe8c2802002-11-03 00:38:21 +0000246
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200247/* mtdparts command line support */
248/* Note: fake mtd_id used, no linux mtd map file */
249/*
Stefan Roese68d7d652009-03-19 13:30:36 +0100250#define CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200251#define MTDIDS_DEFAULT "nor0=ml2-0"
252#define MTDPARTS_DEFAULT "mtdparts=ml2-0:-@512k(jffs2)"
253*/
254
wdenkfe8c2802002-11-03 00:38:21 +0000255#endif /* __CONFIG_H */