blob: 66d85be7223be65e56a79f47983a43d22cec31bb [file] [log] [blame]
Hao Zhang2221cd12014-07-09 23:44:48 +03001/*
2 * Common configuration header file for all Keystone II EVM platforms
3 *
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_KS2_EVM_H
11#define __CONFIG_KS2_EVM_H
12
13#define CONFIG_SOC_KEYSTONE
14
15/* U-Boot Build Configuration */
16#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
Hao Zhang2221cd12014-07-09 23:44:48 +030017#define CONFIG_BOARD_EARLY_INIT_F
Hao Zhang2221cd12014-07-09 23:44:48 +030018
19/* SoC Configuration */
Hao Zhang2221cd12014-07-09 23:44:48 +030020#define CONFIG_ARCH_CPU_INIT
21#define CONFIG_SYS_ARCH_TIMER
Vitaly Andrianov27ce6962016-03-28 15:15:59 -040022#ifndef CONFIG_SYS_TEXT_BASE
Lokesh Vutla401f2d92015-08-17 19:54:48 +053023#define CONFIG_SYS_TEXT_BASE 0x0c000000
Vitaly Andrianov27ce6962016-03-28 15:15:59 -040024#endif
Hao Zhang2221cd12014-07-09 23:44:48 +030025#define CONFIG_SPL_TARGET "u-boot-spi.gph"
26#define CONFIG_SYS_DCACHE_OFF
27
28/* Memory Configuration */
29#define CONFIG_NR_DRAM_BANKS 2
Hao Zhang2221cd12014-07-09 23:44:48 +030030#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
31#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
32#define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
Lokesh Vutla401f2d92015-08-17 19:54:48 +053033#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \
Hao Zhang2221cd12014-07-09 23:44:48 +030034 GENERATED_GBL_DATA_SIZE)
35
Lokesh Vutlaaaf461f2015-09-19 15:00:17 +053036#ifdef CONFIG_SYS_MALLOC_F_LEN
37#define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN
38#else
39#define SPL_MALLOC_F_SIZE 0
40#endif
41
Hao Zhang2221cd12014-07-09 23:44:48 +030042/* SPL SPI Loader Configuration */
43#define CONFIG_SPL_PAD_TO 65536
44#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
45#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
46 CONFIG_SPL_MAX_SIZE)
47#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
48#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
49 CONFIG_SPL_BSS_MAX_SIZE)
50#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
51#define CONFIG_SPL_STACK_SIZE (8 * 1024)
52#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
53 CONFIG_SYS_SPL_MALLOC_SIZE + \
Lokesh Vutlaaaf461f2015-09-19 15:00:17 +053054 SPL_MALLOC_F_SIZE + \
Hao Zhang2221cd12014-07-09 23:44:48 +030055 CONFIG_SPL_STACK_SIZE - 4)
Hao Zhang2221cd12014-07-09 23:44:48 +030056#define CONFIG_SPL_SPI_LOAD
Hao Zhang2221cd12014-07-09 23:44:48 +030057#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
Hao Zhang2221cd12014-07-09 23:44:48 +030058
59/* UART Configuration */
Hao Zhang2221cd12014-07-09 23:44:48 +030060#define CONFIG_SYS_NS16550_MEM32
Lokesh Vutla391839f2015-09-19 15:00:20 +053061#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
62#define CONFIG_SYS_NS16550_SERIAL
Hao Zhang2221cd12014-07-09 23:44:48 +030063#define CONFIG_SYS_NS16550_REG_SIZE -4
Lokesh Vutla391839f2015-09-19 15:00:20 +053064#endif
Hao Zhang2221cd12014-07-09 23:44:48 +030065#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
66#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
Hao Zhang2221cd12014-07-09 23:44:48 +030067#define CONFIG_CONS_INDEX 1
Hao Zhang2221cd12014-07-09 23:44:48 +030068
Vitaly Andrianove6d71e12015-09-19 16:26:41 +053069#ifndef CONFIG_SOC_K2G
Masahiro Yamada43ebbfc2016-09-26 20:45:26 +090070#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6)
Vitaly Andrianove6d71e12015-09-19 16:26:41 +053071#else
Masahiro Yamada43ebbfc2016-09-26 20:45:26 +090072#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2
Vitaly Andrianove6d71e12015-09-19 16:26:41 +053073#endif
74
Hao Zhang2221cd12014-07-09 23:44:48 +030075/* SPI Configuration */
Hao Zhang2221cd12014-07-09 23:44:48 +030076#define CONFIG_DAVINCI_SPI
Masahiro Yamada43ebbfc2016-09-26 20:45:26 +090077#define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6)
Hao Zhang2221cd12014-07-09 23:44:48 +030078#define CONFIG_SF_DEFAULT_SPEED 30000000
79#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
80#define CONFIG_SYS_SPI0
81#define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE
82#define CONFIG_SYS_SPI0_NUM_CS 4
83#define CONFIG_SYS_SPI1
84#define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
85#define CONFIG_SYS_SPI1_NUM_CS 4
86#define CONFIG_SYS_SPI2
87#define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
88#define CONFIG_SYS_SPI2_NUM_CS 4
Vignesh R39832242016-07-06 09:58:57 +053089#ifdef CONFIG_SPL_BUILD
90#undef CONFIG_DM_SPI
91#undef CONFIG_DM_SPI_FLASH
92#endif
Hao Zhang2221cd12014-07-09 23:44:48 +030093
94/* Network Configuration */
Khoronzhuk, Ivan3fe93622014-10-17 20:44:35 +030095#define CONFIG_PHYLIB
96#define CONFIG_PHY_MARVELL
Hao Zhang2221cd12014-07-09 23:44:48 +030097#define CONFIG_MII
98#define CONFIG_BOOTP_DEFAULT
99#define CONFIG_BOOTP_DNS
100#define CONFIG_BOOTP_DNS2
101#define CONFIG_BOOTP_SEND_HOSTNAME
102#define CONFIG_NET_RETRY_COUNT 32
Hao Zhang2221cd12014-07-09 23:44:48 +0300103#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
104#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
105#define CONFIG_SYS_SGMII_RATESCALE 2
106
Khoronzhuk, Ivanef454712014-09-05 19:02:47 +0300107/* Keyston Navigator Configuration */
Hao Zhang796bcee2014-10-29 13:09:34 +0200108#define CONFIG_TI_KSNAV
Khoronzhuk, Ivanef454712014-09-05 19:02:47 +0300109#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
110#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
111#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
112#define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
113#define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
114#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
115#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
116#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
117#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
118#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
119#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
120#define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
121#define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
122#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
123
124/* NETCP pktdma */
Hao Zhang796bcee2014-10-29 13:09:34 +0200125#define CONFIG_KSNAV_PKTDMA_NETCP
Khoronzhuk, Ivanef454712014-09-05 19:02:47 +0300126#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
127#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
128#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
129#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
130#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
131#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
132#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
133#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
134#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
135#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
136#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
137
Khoronzhuk, Ivan0935cac2014-09-29 22:17:22 +0300138/* Keystone net */
Hao Zhang796bcee2014-10-29 13:09:34 +0200139#define CONFIG_DRIVER_TI_KEYSTONE_NET
Hao Zhang92a16c82014-10-22 17:18:23 +0300140#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
141#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
142#define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE
Khoronzhuk, Ivan3c615022014-10-17 21:01:13 +0300143#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
Hao Zhang92a16c82014-10-22 17:18:23 +0300144#define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
Khoronzhuk, Ivan0935cac2014-09-29 22:17:22 +0300145
Khoronzhuk, Ivan87ac27b2014-10-29 13:09:32 +0200146/* SerDes */
147#define CONFIG_TI_KEYSTONE_SERDES
148
Hao Zhang2221cd12014-07-09 23:44:48 +0300149#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
150
151/* I2C Configuration */
Hao Zhang2221cd12014-07-09 23:44:48 +0300152#define CONFIG_SYS_I2C_DAVINCI
153#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
154#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
155#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
156#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
157#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
158#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
159#define I2C_BUS_MAX 3
160
161/* EEPROM definitions */
Hao Zhang2221cd12014-07-09 23:44:48 +0300162#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
163#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
164#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
165#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
166#define CONFIG_ENV_EEPROM_IS_ON_I2C
167
168/* NAND Configuration */
169#define CONFIG_NAND_DAVINCI
170#define CONFIG_KEYSTONE_RBL_NAND
171#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
172#define CONFIG_SYS_NAND_MASK_CLE 0x4000
173#define CONFIG_SYS_NAND_MASK_ALE 0x2000
174#define CONFIG_SYS_NAND_CS 2
175#define CONFIG_SYS_NAND_USE_FLASH_BBT
176#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
177
178#define CONFIG_SYS_NAND_LARGEPAGE
179#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
180#define CONFIG_SYS_MAX_NAND_DEVICE 1
181#define CONFIG_SYS_NAND_MAX_CHIPS 1
182#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
183#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
184#define CONFIG_ENV_IS_IN_NAND
185#define CONFIG_ENV_OFFSET 0x100000
186#define CONFIG_MTD_PARTITIONS
Hao Zhang2221cd12014-07-09 23:44:48 +0300187#define CONFIG_RBTREE
188#define CONFIG_LZO
189#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
190#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
191 "1024k(bootloader)ro,512k(params)ro," \
192 "-(ubifs)"
193
WingMan Kwokbc0e8d72014-09-05 22:26:23 +0300194/* USB Configuration */
WingMan Kwokbc0e8d72014-09-05 22:26:23 +0300195#define CONFIG_USB_XHCI_KEYSTONE
196#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
WingMan Kwokbc0e8d72014-09-05 22:26:23 +0300197#define CONFIG_EFI_PARTITION
198#define CONFIG_FS_FAT
WingMan Kwokbc0e8d72014-09-05 22:26:23 +0300199#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
200#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
201#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
202#define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
203
Hao Zhang2221cd12014-07-09 23:44:48 +0300204/* U-Boot command configuration */
Hao Zhang2221cd12014-07-09 23:44:48 +0300205#define CONFIG_CMD_SAVES
Hao Zhang2221cd12014-07-09 23:44:48 +0300206#define CONFIG_CMD_UBIFS
Hao Zhang2221cd12014-07-09 23:44:48 +0300207#define CONFIG_CMD_EEPROM
208
209/* U-Boot general configuration */
Khoronzhuk, Ivan83472102014-09-26 15:42:30 +0300210#define CONFIG_MISC_INIT_R
Hao Zhang2221cd12014-07-09 23:44:48 +0300211#define CONFIG_CRC32_VERIFY
212#define CONFIG_MX_CYCLIC
Hao Zhang2221cd12014-07-09 23:44:48 +0300213#define CONFIG_TIMESTAMP
214
215/* EDMA3 */
216#define CONFIG_TI_EDMA3
217
Murali Karicheriabca9472016-03-09 15:39:38 +0530218#define DEFAULT_FW_INITRAMFS_BOOT_ENV \
219 "name_fw_rd=k2-fw-initrd.cpio.gz\0" \
220 "set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0" \
221 "init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; " \
222 "run set_rd_spec\0" \
223 "init_fw_rd_ramfs=setenv rd_spec -\0" \
224 "init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; " \
225 "run set_rd_spec\0" \
226
Nishanth Menon6f6e9432016-02-25 12:53:47 -0600227#define DEFAULT_PMMC_BOOT_ENV \
228 "set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
229 "dev_pmmc=0\0" \
230 "get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0" \
231 "get_pmmc_ramfs=run get_pmmc_net\0" \
232 "get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} " \
233 "${bootdir}/${name_pmmc}\0" \
234 "get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0" \
235 "run_pmmc=rproc init; rproc list; " \
236 "rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; " \
237 "rproc start ${dev_pmmc}\0" \
238
Hao Zhang2221cd12014-07-09 23:44:48 +0300239#define CONFIG_EXTRA_ENV_SETTINGS \
Nishanth Menonfd72d312015-07-22 18:05:46 -0500240 DEFAULT_LINUX_BOOT_ENV \
Murali Karicheri349c26d2014-11-04 16:52:34 +0200241 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
Carlos Hernandez48dc1652016-03-09 15:39:31 +0530242 "bootdir=/boot\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300243 "tftp_root=/\0" \
244 "nfs_root=/export\0" \
245 "mem_lpae=1\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300246 "addr_ubi=0x82000000\0" \
247 "addr_secdb_key=0xc000000\0" \
Nishanth Menonbad773f2015-07-22 18:05:47 -0500248 "name_kern=zImage\0" \
Lokesh Vutlaceee15c2016-09-16 10:17:53 +0530249 "addr_mon=0x87000000\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300250 "run_mon=mon_install ${addr_mon}\0" \
Murali Karicheriabca9472016-03-09 15:39:38 +0530251 "run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300252 "init_net=run args_all args_net\0" \
Andrew F. Davisc29a3ce2016-03-11 15:04:03 -0600253 "init_nfs=setenv autoload no; dhcp; run args_all args_net\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300254 "init_ubi=run args_all args_ubi; " \
Carlos Hernandez8462cb52016-03-09 15:39:32 +0530255 "ubi part ubifs; ubifsmount ubi:rootfs;\0" \
Nishanth Menonfd72d312015-07-22 18:05:46 -0500256 "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
Andrew F. Davisc29a3ce2016-03-11 15:04:03 -0600257 "get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0" \
Carlos Hernandez48dc1652016-03-09 15:39:31 +0530258 "get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \
Nishanth Menonfd72d312015-07-22 18:05:46 -0500259 "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
Andrew F. Davisc29a3ce2016-03-11 15:04:03 -0600260 "get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0" \
Carlos Hernandez48dc1652016-03-09 15:39:31 +0530261 "get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300262 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
Andrew F. Davisc29a3ce2016-03-11 15:04:03 -0600263 "get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0" \
Carlos Hernandez48dc1652016-03-09 15:39:31 +0530264 "get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0" \
Vitaly Andrianov8889e982015-08-03 15:54:32 -0400265 "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \
Andrew F. Davisc29a3ce2016-03-11 15:04:03 -0600266 "get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
Cooper Jr., Franklin7ec23282015-11-19 07:45:22 -0600267 "burn_uboot_spi=sf probe; sf erase 0 0x80000; " \
Vitaly Andrianov8889e982015-08-03 15:54:32 -0400268 "sf write ${loadaddr} 0 ${filesize}\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300269 "burn_uboot_nand=nand erase 0 0x100000; " \
Vitaly Andrianov8889e982015-08-03 15:54:32 -0400270 "nand write ${loadaddr} 0 ${filesize}\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300271 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300272 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
273 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
274 "${nfs_options} ip=dhcp\0" \
275 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
Nishanth Menonfd72d312015-07-22 18:05:46 -0500276 "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
277 "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300278 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
Nishanth Menonfd72d312015-07-22 18:05:46 -0500279 "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300280 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
Andrew F. Davisc29a3ce2016-03-11 15:04:03 -0600281 "get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300282 "burn_ubi=nand erase.part ubifs; " \
283 "nand write ${addr_ubi} ubifs ${filesize}\0" \
284 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
285 "args_ramfs=setenv bootargs ${bootargs} " \
286 "rdinit=/sbin/init rw root=/dev/ram0 " \
Vitaly Andrianovf06b4542015-08-04 11:16:16 -0400287 "initrd=0x808080000,80M\0" \
Hao Zhang2221cd12014-07-09 23:44:48 +0300288 "no_post=1\0" \
289 "mtdparts=mtdparts=davinci_nand.0:" \
290 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
291
Nishanth Menon6f6e9432016-02-25 12:53:47 -0600292#ifndef CONFIG_BOOTCOMMAND
Hao Zhang2221cd12014-07-09 23:44:48 +0300293#define CONFIG_BOOTCOMMAND \
Lokesh Vutlaceee15c2016-09-16 10:17:53 +0530294 "run init_${boot} get_mon_${boot} run_mon init_fw_rd_${boot} " \
295 "get_fdt_${boot} get_kern_${boot} run_kern"
Nishanth Menon6f6e9432016-02-25 12:53:47 -0600296#endif
Hao Zhang2221cd12014-07-09 23:44:48 +0300297
298#define CONFIG_BOOTARGS \
299
Nishanth Menone07cff12015-07-22 18:05:45 -0500300/* Now for the remaining common defines */
301#include <configs/ti_armv7_common.h>
302
303/* We wont be loading up OS from SPL for now.. */
304#undef CONFIG_SPL_OS_BOOT
305
306/* We do not have MMC support.. yet.. */
Nishanth Menone07cff12015-07-22 18:05:45 -0500307#undef CONFIG_MMC
308#undef CONFIG_GENERIC_MMC
Nishanth Menone07cff12015-07-22 18:05:45 -0500309
310/* And no support for GPIO, yet.. */
Hao Zhang2221cd12014-07-09 23:44:48 +0300311
312/* we may include files below only after all above definitions */
313#include <asm/arch/hardware.h>
314#include <asm/arch/clock.h>
Vitaly Andrianove6d71e12015-09-19 16:26:41 +0530315#ifndef CONFIG_SOC_K2G
Masahiro Yamada43ebbfc2016-09-26 20:45:26 +0900316#define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6)
Vitaly Andrianove6d71e12015-09-19 16:26:41 +0530317#else
318#define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk]
319#endif
Hao Zhang2221cd12014-07-09 23:44:48 +0300320
Hao Zhang2221cd12014-07-09 23:44:48 +0300321#endif /* __CONFIG_KS2_EVM_H */