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Ilya Yanok4ab779c2012-02-07 23:30:22 +00001/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on omap3_evm_config.h
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Ilya Yanok4ab779c2012-02-07 23:30:22 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * High Level Configuration Options
14 */
15#define CONFIG_OMAP /* in a TI OMAP core */
Ilya Yanok4ab779c2012-02-07 23:30:22 +000016#define CONFIG_OMAP3_MCX /* working with mcx */
Marek Vasut308252a2012-07-21 05:02:23 +000017#define CONFIG_OMAP_GPIO
Lokesh Vutla806d2792013-07-30 11:36:30 +053018#define CONFIG_OMAP_COMMON
Ilya Yanok4ab779c2012-02-07 23:30:22 +000019
20#define MACH_TYPE_MCX 3656
21#define CONFIG_MACH_TYPE MACH_TYPE_MCX
Stefano Babic3ae6abb2012-06-13 22:34:44 +000022#define CONFIG_BOARD_LATE_INIT
Ilya Yanok4ab779c2012-02-07 23:30:22 +000023
24#define CONFIG_SYS_CACHELINE_SIZE 64
25
26#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
27
28#include <asm/arch/cpu.h> /* get chip and board defs */
29#include <asm/arch/omap3.h>
30
31#define CONFIG_OF_LIBFDT
32#define CONFIG_FIT
33
34/*
35 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
36 * and older u-boot.bin with the new U-Boot SPL.
37 */
38#define CONFIG_SYS_TEXT_BASE 0x80008000
39
40/*
41 * Display CPU and Board information
42 */
43#define CONFIG_DISPLAY_CPUINFO
44#define CONFIG_DISPLAY_BOARDINFO
45
46/* Clock Defines */
47#define V_OSCK 26000000 /* Clock output from T2 */
48#define V_SCLK (V_OSCK >> 1)
49
50#define CONFIG_MISC_INIT_R
51
52#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
53#define CONFIG_SETUP_MEMORY_TAGS
54#define CONFIG_INITRD_TAG
55#define CONFIG_REVISION_TAG
56
57/*
58 * Size of malloc() pool
59 */
60#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
61#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
62/*
63 * DDR related
64 */
65#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
66
67/*
68 * Hardware drivers
69 */
70
71/*
72 * NS16550 Configuration
73 */
74#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
75
76#define CONFIG_SYS_NS16550
77#define CONFIG_SYS_NS16550_SERIAL
78#define CONFIG_SYS_NS16550_REG_SIZE (-4)
79#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
80
81/*
82 * select serial console configuration
83 */
84#define CONFIG_CONS_INDEX 3
85#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
86#define CONFIG_SERIAL3 3 /* UART3 */
87
88/* allow to overwrite serial and ethaddr */
89#define CONFIG_ENV_OVERWRITE
90#define CONFIG_BAUDRATE 115200
91#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
92 115200}
93#define CONFIG_MMC
94#define CONFIG_OMAP_HSMMC
95#define CONFIG_GENERIC_MMC
96#define CONFIG_DOS_PARTITION
97
98/* EHCI */
99#define CONFIG_USB_STORAGE
Stefano Babic92671102014-02-14 12:51:25 +0100100#define CONFIG_OMAP3_GPIO_2
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000101#define CONFIG_OMAP3_GPIO_5
102#define CONFIG_USB_EHCI
103#define CONFIG_USB_EHCI_OMAP
104#define CONFIG_USB_ULPI
105#define CONFIG_USB_ULPI_VIEWPORT_OMAP
Stefano Babic8c735b92012-10-16 04:07:04 +0000106#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000107#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
108
109/* commands to include */
110#include <config_cmd_default.h>
111
112#define CONFIG_CMD_EXT2 /* EXT2 Support */
113#define CONFIG_CMD_FAT /* FAT support */
114#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
115
116#define CONFIG_CMD_DATE
117#define CONFIG_CMD_I2C /* I2C serial bus support */
118#define CONFIG_CMD_MMC /* MMC support */
119#define CONFIG_CMD_FAT /* FAT support */
120#define CONFIG_CMD_USB
121#define CONFIG_CMD_NAND /* NAND support */
122#define CONFIG_CMD_DHCP
123#define CONFIG_CMD_PING
124#define CONFIG_CMD_CACHE
125#define CONFIG_CMD_UBI
126#define CONFIG_CMD_UBIFS
127#define CONFIG_RBTREE
128#define CONFIG_LZO
129#define CONFIG_MTD_PARTITIONS
130#define CONFIG_MTD_DEVICE
131#define CONFIG_CMD_MTDPARTS
Stefano Babic3ae6abb2012-06-13 22:34:44 +0000132#define CONFIG_CMD_GPIO
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000133
134#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
135#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
136#undef CONFIG_CMD_IMI /* iminfo */
137#undef CONFIG_CMD_IMLS /* List all found images */
138
139#define CONFIG_SYS_NO_FLASH
Heiko Schocher6789e842013-10-22 11:03:18 +0200140#define CONFIG_SYS_I2C
141#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
142#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
143#define CONFIG_SYS_I2C_OMAP34XX
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000144
145/* RTC */
146#define CONFIG_RTC_DS1337
147#define CONFIG_SYS_I2C_RTC_ADDR 0x68
148
149#define CONFIG_CMD_NET
150#define CONFIG_CMD_MII
151#define CONFIG_CMD_NFS
152/*
153 * Board NAND Info.
154 */
155#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
156 /* to access nand */
157#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
158 /* to access */
159 /* nand at CS0 */
160
161#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
162 /* NAND devices */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000163#define CONFIG_JFFS2_NAND
164/* nand device jffs2 lives on */
165#define CONFIG_JFFS2_DEV "nand0"
166/* start of jffs2 partition */
167#define CONFIG_JFFS2_PART_OFFSET 0x680000
168#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
169
170/* Environment information */
Stefano Babic8f1fae22012-10-20 23:56:07 +0000171#define CONFIG_BOOTDELAY 3
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000172
173#define CONFIG_BOOTFILE "uImage"
174
Stefano Babicf89a8b62012-06-13 22:34:43 +0000175/* Setup MTD for NAND on the SOM */
176#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
177#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
178 "1m(u-boot),256k(env1)," \
179 "256k(env2),6m(kernel),6m(k_recovery)," \
180 "8m(fs_recovery),-(common_data)"
181
182#define CONFIG_HOSTNAME mcx
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000183#define CONFIG_EXTRA_ENV_SETTINGS \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000184 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
185 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
186 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
187 "addfb=setenv bootargs ${bootargs} vram=6M " \
188 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
189 "addip_sta=setenv bootargs ${bootargs} " \
190 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
191 "${netmask}:${hostname}:eth0:off\0" \
192 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
193 "addip=if test -n ${ipdyn};then run addip_dyn;" \
194 "else run addip_sta;fi\0" \
195 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
196 "addtty=setenv bootargs ${bootargs} " \
197 "console=${consoledev},${baudrate}\0" \
198 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
199 "baudrate=115200\0" \
200 "consoledev=ttyO2\0" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200201 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000202 "loadaddr=0x82000000\0" \
203 "load=tftp ${loadaddr} ${u-boot}\0" \
204 "load_k=tftp ${loadaddr} ${bootfile}\0" \
205 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
206 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200207 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000208 "mmcargs=root=/dev/mmcblk0p2 rw " \
209 "rootfstype=ext3 rootwait\0" \
210 "mmcboot=echo Booting from mmc ...; " \
211 "run mmcargs; " \
212 "run addip addtty addmtd addfb addeth addmisc;" \
213 "run loaduimage; " \
214 "bootm ${loadaddr}\0" \
215 "net_nfs=run load_k; " \
216 "run nfsargs; " \
217 "run addip addtty addmtd addfb addeth addmisc;" \
218 "bootm ${loadaddr}\0" \
219 "nfsargs=setenv bootargs root=/dev/nfs rw " \
220 "nfsroot=${serverip}:${rootpath}\0" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200221 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000222 "uboot_addr=0x80000\0" \
223 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
224 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
225 "updatemlo=nandecc hw;nand erase 0 20000;" \
226 "nand write ${loadaddr} 0 20000\0" \
227 "upd=if run load;then echo Updating u-boot;if run update;" \
228 "then echo U-Boot updated;" \
229 "else echo Error updating u-boot !;" \
230 "echo Board without bootloader !!;" \
231 "fi;" \
232 "else echo U-Boot not downloaded..exiting;fi\0" \
233 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
234 "bootscript=echo Running bootscript from mmc ...; " \
235 "source ${loadaddr}\0" \
236 "nandargs=setenv bootargs ubi.mtd=7 " \
237 "root=ubi0:rootfs rootfstype=ubifs\0" \
238 "nandboot=echo Booting from nand ...; " \
239 "run nandargs; " \
240 "ubi part nand0,4;" \
241 "ubi readvol ${loadaddr} kernel;" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000242 "run addtty addmtd addfb addeth addmisc;" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000243 "bootm ${loadaddr}\0" \
Stefano Babic8f1fae22012-10-20 23:56:07 +0000244 "preboot=ubi part nand0,7;" \
245 "ubi readvol ${loadaddr} splash;" \
246 "bmp display ${loadaddr};" \
247 "gpio set 55\0" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000248 "swupdate_args=setenv bootargs root=/dev/ram " \
249 "quiet loglevel=1 " \
250 "consoleblank=0 ${swupdate_misc}\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000251 "swupdate=echo Running Sw-Update...;" \
252 "if printenv mtdparts;then echo Starting SwUpdate...; " \
253 "else mtdparts default;fi; " \
254 "ubi part nand0,5;" \
255 "ubi readvol 0x82000000 kernel_recovery;" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000256 "ubi part nand0,6;" \
257 "ubi readvol 0x84000000 fs_recovery;" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000258 "run swupdate_args; " \
259 "setenv bootargs ${bootargs} " \
260 "${mtdparts} " \
261 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \
262 "omapdss.def_disp=lcd;" \
Stefano Babica5d64db2014-02-14 12:51:27 +0100263 "bootm 0x82000000 0x84000000\0" \
264 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
265 "then source 82000000;else run nandboot;fi\0"
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000266
267#define CONFIG_AUTO_COMPLETE
Detlev Zundel48a4ee52012-02-08 04:49:02 +0000268#define CONFIG_CMDLINE_EDITING
269
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000270/*
271 * Miscellaneous configurable options
272 */
273#define V_PROMPT "mcx # "
274
275#define CONFIG_SYS_LONGHELP /* undef to save memory */
276#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000277#define CONFIG_SYS_PROMPT V_PROMPT
Stefano Babic992a27d2012-06-13 22:34:41 +0000278#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000279/* Print Buffer Size */
280#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
281 sizeof(CONFIG_SYS_PROMPT) + 16)
282#define CONFIG_SYS_MAXARGS 16 /* max number of command */
283 /* args */
284/* Boot Argument Buffer Size */
285#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
286/* memtest works on */
287#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
288#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
289 0x01F00000) /* 31MB */
290
291#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
292 /* address */
Stefano Babic8f1fae22012-10-20 23:56:07 +0000293#define CONFIG_PREBOOT
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000294
295/*
296 * AM3517 has 12 GP timers, they can be driven by the system clock
297 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
298 * This rate is divided by a local divisor.
299 */
300#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
301#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000302
303/*
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000304 * Physical Memory Map
305 */
306#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
307#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000308#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
309
310/*
311 * FLASH and environment organization
312 */
313
314/* **** PISMO SUPPORT *** */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000315#define CONFIG_NAND_OMAP_GPMC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000316#define CONFIG_ENV_IS_IN_NAND
Stefano Babicf89a8b62012-06-13 22:34:43 +0000317#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000318
Stefano Babicf89a8b62012-06-13 22:34:43 +0000319/* Redundant Environment */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000320#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
321#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
322#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
Stefano Babicf89a8b62012-06-13 22:34:43 +0000323#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
324 2 * CONFIG_SYS_ENV_SECT_SIZE)
325#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000326
327/* Flash banks JFFS2 should use */
328#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
329 CONFIG_SYS_MAX_NAND_DEVICE)
330#define CONFIG_SYS_JFFS2_MEM_NAND
331/* use flash_info[2] */
332#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
333#define CONFIG_SYS_JFFS2_NUM_BANKS 1
334
335#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
336#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
337#define CONFIG_SYS_INIT_RAM_SIZE 0x800
338#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
339 CONFIG_SYS_INIT_RAM_SIZE - \
340 GENERATED_GBL_DATA_SIZE)
341
342/* Defines for SPL */
Tom Rini47f7bca2012-08-13 12:03:19 -0700343#define CONFIG_SPL_FRAMEWORK
Tom Rinid7cb93b2012-08-14 12:26:08 -0700344#define CONFIG_SPL_BOARD_INIT
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000345#define CONFIG_SPL_NAND_SIMPLE
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000346
347#define CONFIG_SPL_LIBCOMMON_SUPPORT
348#define CONFIG_SPL_LIBDISK_SUPPORT
349#define CONFIG_SPL_I2C_SUPPORT
350#define CONFIG_SPL_MMC_SUPPORT
351#define CONFIG_SPL_FAT_SUPPORT
352#define CONFIG_SPL_LIBGENERIC_SUPPORT
353#define CONFIG_SPL_SERIAL_SUPPORT
354#define CONFIG_SPL_POWER_SUPPORT
355#define CONFIG_SPL_NAND_SUPPORT
Scott Wood6f2f01b2012-09-20 19:09:07 -0500356#define CONFIG_SPL_NAND_BASE
357#define CONFIG_SPL_NAND_DRIVERS
358#define CONFIG_SPL_NAND_ECC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000359#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
360
361#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinie0820cc2012-05-08 07:29:31 +0000362#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000363#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
364
365/* move malloc and bss high to prevent clashing with the main image */
366#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
367#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
368#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
369#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
370
371#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
Guillaume GARDET205b4f32014-10-15 17:53:11 +0200372#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
373#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000374
375/* NAND boot config */
376#define CONFIG_SYS_NAND_PAGE_COUNT 64
377#define CONFIG_SYS_NAND_PAGE_SIZE 2048
378#define CONFIG_SYS_NAND_OOBSIZE 64
379#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
380#define CONFIG_SYS_NAND_5_ADDR_CYCLE
381#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
382#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
383 48, 49, 50, 51, 52, 53, 54, 55,\
384 56, 57, 58, 59, 60, 61, 62, 63}
385#define CONFIG_SYS_NAND_ECCSIZE 256
386#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3f719062013-11-18 19:03:01 +0530387#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
Stefano Babic92671102014-02-14 12:51:25 +0100388#define CONFIG_SPL_NAND_SOFTECC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000389
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000390#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
391
392#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
393
394/*
395 * ethernet support
396 *
397 */
398#if defined(CONFIG_CMD_NET)
399#define CONFIG_DRIVER_TI_EMAC
400#define CONFIG_DRIVER_TI_EMAC_USE_RMII
401#define CONFIG_MII
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000402#define CONFIG_BOOTP_DNS
403#define CONFIG_BOOTP_DNS2
404#define CONFIG_BOOTP_SEND_HOSTNAME
405#define CONFIG_NET_RETRY_COUNT 10
406#endif
407
Stefano Babic8f1fae22012-10-20 23:56:07 +0000408#define CONFIG_VIDEO
409#define CONFIG_CFB_CONSOLE
410#define CONFIG_VGA_AS_SINGLE_DEVICE
411#define CONFIG_SPLASH_SCREEN
412#define CONFIG_VIDEO_BMP_RLE8
413#define CONFIG_CMD_BMP
414#define CONFIG_VIDEO_OMAP3
415#define CONFIG_SYS_CONSOLE_IS_IN_ENV
416
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000417#endif /* __CONFIG_H */