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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * board/config.h - configuration options, board specific
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/***********************************************************
32 * High Level Configuration Options
33 * (easy to change)
34 ***********************************************************/
35#define CONFIG_405GP 1 /* This is a PPC405 CPU */
36#define CONFIG_4xx 1 /* ...member of PPC4xx family */
37#define CONFIG_PIP405 1 /* ...on a PIP405 board */
Wolfgang Denk2ae18242010-10-06 09:05:45 +020038
39#define CONFIG_SYS_TEXT_BASE 0xFFF80000
40
wdenkc6097192002-11-03 00:24:07 +000041/***********************************************************
42 * Clock
43 ***********************************************************/
44#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
45
Jon Loeligeracf02692007-07-08 14:49:44 -050046
47/*
Jon Loeligera1aa0bb2007-07-10 09:22:23 -050048 * BOOTP options
49 */
50#define CONFIG_BOOTP_BOOTFILESIZE
51#define CONFIG_BOOTP_BOOTPATH
52#define CONFIG_BOOTP_GATEWAY
53#define CONFIG_BOOTP_HOSTNAME
54
55
56/*
Jon Loeligeracf02692007-07-08 14:49:44 -050057 * Command line configuration.
58 */
59#include <config_cmd_default.h>
60
61#define CONFIG_CMD_IDE
62#define CONFIG_CMD_DHCP
63#define CONFIG_CMD_PCI
64#define CONFIG_CMD_CACHE
65#define CONFIG_CMD_IRQ
66#define CONFIG_CMD_EEPROM
67#define CONFIG_CMD_I2C
68#define CONFIG_CMD_REGINFO
69#define CONFIG_CMD_FDC
70#define CONFIG_CMD_SCSI
71#define CONFIG_CMD_FAT
72#define CONFIG_CMD_DATE
73#define CONFIG_CMD_ELF
74#define CONFIG_CMD_USB
75#define CONFIG_CMD_MII
76#define CONFIG_CMD_SDRAM
Jon Loeligeracf02692007-07-08 14:49:44 -050077#define CONFIG_CMD_PING
78#define CONFIG_CMD_SAVES
79#define CONFIG_CMD_BSP
80
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#define CONFIG_SYS_HUSH_PARSER
wdenkc6097192002-11-03 00:24:07 +000082/**************************************************************
83 * I2C Stuff:
84 * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address
85 * 0x53.
86 * Caution: on the same bus is the SPD (Serial Presens Detect
87 * EEPROM of the SDRAM
88 * The Atmel EEPROM uses 16Bit addressing.
89 ***************************************************************/
90#define CONFIG_HARD_I2C /* I2c with hardware support */
Stefan Roesed0b0dca2010-04-01 14:37:24 +020091#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020092#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */
93#define CONFIG_SYS_I2C_SLAVE 0x7F
wdenkc6097192002-11-03 00:24:07 +000094
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020095#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
96#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +020097#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020098#define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
99#define CONFIG_ENV_SIZE 0x800 /* 2 kBytes may be used for env vars */
wdenkc6097192002-11-03 00:24:07 +0000100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200101#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
102#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */
wdenkc6097192002-11-03 00:24:07 +0000103 /* 64 byte page write mode using*/
104 /* last 6 bits of the address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
wdenkc6097192002-11-03 00:24:07 +0000106
107
108/***************************************************************
109 * Definitions for Serial Presence Detect EEPROM address
110 * (to get SDRAM settings)
111 ***************************************************************/
112#define SPD_EEPROM_ADDRESS 0x50
113
wdenkc837dcb2004-01-20 23:12:12 +0000114#define CONFIG_BOARD_EARLY_INIT_F
David Müller21be3092011-12-22 13:38:20 +0100115#define CONFIG_BOARD_EARLY_INIT_R
116
wdenkc6097192002-11-03 00:24:07 +0000117/**************************************************************
118 * Environment definitions
119 **************************************************************/
120#define CONFIG_BAUDRATE 9600 /* STD Baudrate */
121
122
123#define CONFIG_BOOTDELAY 5
124/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
Wolfgang Denk2afbe4e2005-08-13 02:04:37 +0200125/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200126#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
wdenkc6097192002-11-03 00:24:07 +0000127
128
wdenk3e386912003-04-05 00:53:31 +0000129#define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */
wdenkc6097192002-11-03 00:24:07 +0000130#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
131
132#define CONFIG_IPADDR 10.0.0.100
133#define CONFIG_SERVERIP 10.0.0.1
134#define CONFIG_PREBOOT
135/***************************************************************
136 * defines if the console is stored in the environment
137 ***************************************************************/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* stdin, stdout and stderr are in evironment */
wdenkc6097192002-11-03 00:24:07 +0000139/***************************************************************
140 * defines if an overwrite_console function exists
141 *************************************************************/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
143#define CONFIG_SYS_CONSOLE_INFO_QUIET
wdenkc6097192002-11-03 00:24:07 +0000144/***************************************************************
145 * defines if the overwrite_console should be stored in the
146 * environment
147 **************************************************************/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
wdenkc6097192002-11-03 00:24:07 +0000149
150/**************************************************************
151 * loads config
152 *************************************************************/
153#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkc6097192002-11-03 00:24:07 +0000155
wdenk7205e402003-09-10 22:30:53 +0000156#define CONFIG_MISC_INIT_R
wdenkc6097192002-11-03 00:24:07 +0000157/***********************************************************
158 * Miscellaneous configurable options
159 **********************************************************/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_LONGHELP /* undef to save memory */
161#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeligeracf02692007-07-08 14:49:44 -0500162#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkc6097192002-11-03 00:24:07 +0000164#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkc6097192002-11-03 00:24:07 +0000166#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
168#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
169#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkc6097192002-11-03 00:24:07 +0000170
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
172#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
wdenkc6097192002-11-03 00:24:07 +0000173
Stefan Roese550650d2010-09-20 16:05:31 +0200174#define CONFIG_CONS_INDEX 1 /* Use UART0 */
175#define CONFIG_SYS_NS16550
176#define CONFIG_SYS_NS16550_SERIAL
177#define CONFIG_SYS_NS16550_REG_SIZE 1
178#define CONFIG_SYS_NS16550_CLK get_serial_clock()
179
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
181#define CONFIG_SYS_BASE_BAUD 691200
wdenkc6097192002-11-03 00:24:07 +0000182
183/* The following table includes the supported baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_BAUDRATE_TABLE \
wdenkc6097192002-11-03 00:24:07 +0000185 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
186 57600, 115200, 230400, 460800, 921600 }
187
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
189#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
wdenkc6097192002-11-03 00:24:07 +0000190
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
wdenkc6097192002-11-03 00:24:07 +0000192
193/*-----------------------------------------------------------------------
194 * PCI stuff
195 *-----------------------------------------------------------------------
196 */
197#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
198#define PCI_HOST_FORCE 1 /* configure as pci host */
199#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
200
201#define CONFIG_PCI /* include pci support */
Gabor Juhos842033e2013-05-30 07:06:12 +0000202#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
wdenkc6097192002-11-03 00:24:07 +0000203#define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */
204#define CONFIG_PCI_PNP /* pci plug-and-play */
205 /* resource configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */
207#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */
208#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
209#define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
210#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
211#define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */
212#define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */
213#define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */
wdenkc6097192002-11-03 00:24:07 +0000214
215/*-----------------------------------------------------------------------
216 * Start addresses for the final memory configuration
217 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkc6097192002-11-03 00:24:07 +0000219 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220#define CONFIG_SYS_SDRAM_BASE 0x00000000
221#define CONFIG_SYS_FLASH_BASE 0xFFF80000
222#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
223#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
224#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */
wdenkc6097192002-11-03 00:24:07 +0000225
226/*
227 * For booting Linux, the board info and command line data
228 * have to be in the first 8 MB of memory, since this is
229 * the maximum mapped by the Linux kernel during initialization.
230 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200231#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkc6097192002-11-03 00:24:07 +0000232/*-----------------------------------------------------------------------
233 * FLASH organization
234 */
David Müller21be3092011-12-22 13:38:20 +0100235#define CONFIG_SYS_UPDATE_FLASH_SIZE
236#define CONFIG_SYS_FLASH_PROTECTION
237#define CONFIG_SYS_FLASH_EMPTY_INFO
wdenkc6097192002-11-03 00:24:07 +0000238
David Müller21be3092011-12-22 13:38:20 +0100239#define CONFIG_SYS_FLASH_CFI
240#define CONFIG_FLASH_CFI_DRIVER
241
242#define CONFIG_FLASH_SHOW_PROGRESS 45
243
244#define CONFIG_SYS_MAX_FLASH_BANKS 1
245#define CONFIG_SYS_MAX_FLASH_SECT 256
wdenkc6097192002-11-03 00:24:07 +0000246
wdenkc6097192002-11-03 00:24:07 +0000247/*
248 * Init Memory Controller:
249 */
wdenk7205e402003-09-10 22:30:53 +0000250#define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */
251#define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */
252/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
253#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
wdenkc6097192002-11-03 00:24:07 +0000254
wdenkc837dcb2004-01-20 23:12:12 +0000255#define CONFIG_BOARD_EARLY_INIT_F
wdenkc6097192002-11-03 00:24:07 +0000256
257/* Configuration Port location */
258#define CONFIG_PORT_ADDR 0xF4000000
259#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
260
261
wdenkc6097192002-11-03 00:24:07 +0000262/*-----------------------------------------------------------------------
263 * Definitions for initial stack pointer and data area (in On Chip SRAM)
264 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200265#define CONFIG_SYS_TEMP_STACK_OCM 1
266#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
267#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
268#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200269#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200270#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200271#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkc6097192002-11-03 00:24:07 +0000272
wdenkc6097192002-11-03 00:24:07 +0000273/***********************************************************************
274 * External peripheral base address
275 ***********************************************************************/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200276#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000
wdenkc6097192002-11-03 00:24:07 +0000277
278/***********************************************************************
279 * Last Stage Init
280 ***********************************************************************/
281#define CONFIG_LAST_STAGE_INIT
282/************************************************************
283 * Ethernet Stuff
284 ***********************************************************/
Ben Warren96e21f82008-10-27 23:50:15 -0700285#define CONFIG_PPC4xx_EMAC
wdenkc6097192002-11-03 00:24:07 +0000286#define CONFIG_MII 1 /* MII PHY management */
287#define CONFIG_PHY_ADDR 1 /* PHY address */
wdenkc6097192002-11-03 00:24:07 +0000288/************************************************************
289 * RTC
290 ***********************************************************/
291#define CONFIG_RTC_MC146818
292#undef CONFIG_WATCHDOG /* watchdog disabled */
293
294/************************************************************
295 * IDE/ATA stuff
296 ************************************************************/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200297#define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */
298#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
wdenkc6097192002-11-03 00:24:07 +0000299
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200300#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */
301#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */
302#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */
303#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */
304#define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */
305#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */
wdenkc6097192002-11-03 00:24:07 +0000306
307#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
308#undef CONFIG_IDE_LED /* no led for ide supported */
309#define CONFIG_IDE_RESET /* reset for ide supported... */
310#define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */
wdenk7205e402003-09-10 22:30:53 +0000311#define CONFIG_SUPPORT_VFAT
wdenkc6097192002-11-03 00:24:07 +0000312
313/************************************************************
314 * ATAPI support (experimental)
315 ************************************************************/
316#define CONFIG_ATAPI /* enable ATAPI Support */
317
318/************************************************************
319 * SCSI support (experimental) only SYM53C8xx supported
320 ************************************************************/
321#define CONFIG_SCSI_SYM53C8XX
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200322#define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */
323#define CONFIG_SYS_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */
324#define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
325#define CONFIG_SYS_SCSI_SPIN_UP_TIME 2
wdenkc6097192002-11-03 00:24:07 +0000326
327/************************************************************
328 * Disk-On-Chip configuration
329 ************************************************************/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200330#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
331#define CONFIG_SYS_DOC_SHORT_TIMEOUT
332#define CONFIG_SYS_DOC_SUPPORT_2000
333#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
wdenkc6097192002-11-03 00:24:07 +0000334
335/************************************************************
336 * DISK Partition support
337 ************************************************************/
338#define CONFIG_DOS_PARTITION
339#define CONFIG_MAC_PARTITION
340#define CONFIG_ISO_PARTITION /* Experimental */
341
342/************************************************************
343 * Keyboard support
344 ************************************************************/
345#define CONFIG_ISA_KEYBOARD
346
347/************************************************************
348 * Video support
349 ************************************************************/
350#define CONFIG_VIDEO /*To enable video controller support */
351#define CONFIG_VIDEO_CT69000
352#define CONFIG_CFB_CONSOLE
353#define CONFIG_VIDEO_LOGO
354#define CONFIG_CONSOLE_EXTRA_INFO
355#define CONFIG_VGA_AS_SINGLE_DEVICE
356#define CONFIG_VIDEO_SW_CURSOR
357#define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */
358
359/************************************************************
360 * USB support
361 ************************************************************/
362#define CONFIG_USB_UHCI
363#define CONFIG_USB_KEYBOARD
364#define CONFIG_USB_STORAGE
365
366/* Enable needed helper functions */
Jean-Christophe PLAGNIOL-VILLARD52cb4d42009-05-16 12:14:54 +0200367#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
wdenkc6097192002-11-03 00:24:07 +0000368
369/************************************************************
370 * Debug support
371 ************************************************************/
Jon Loeligeracf02692007-07-08 14:49:44 -0500372#if defined(CONFIG_CMD_KGDB)
wdenkc6097192002-11-03 00:24:07 +0000373#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
374#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
375#endif
376
377/************************************************************
wdenka2663ea2003-12-07 18:32:37 +0000378 * support BZIP2 compression
379 ************************************************************/
380#define CONFIG_BZIP2 1
381
382/************************************************************
wdenkc6097192002-11-03 00:24:07 +0000383 * Ident
384 ************************************************************/
385#define VERSION_TAG "released"
wdenkf3e0de62003-06-04 15:05:30 +0000386#define CONFIG_ISO_STRING "MEV-10066-001"
387#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG
wdenkc6097192002-11-03 00:24:07 +0000388
389
390#endif /* __CONFIG_H */