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Heiko Schocherc0dcece2013-08-19 16:39:01 +02001/*
2 * siemens rut
3 * (C) Copyright 2013 Siemens Schweiz AG
4 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * U-Boot file:/include/configs/am335x_evm.h
8 *
9 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14#ifndef __CONFIG_RUT_H
15#define __CONFIG_RUT_H
16
17#define CONFIG_SIEMENS_RUT
18#define MACH_TYPE_RUT 4316
19#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT
20
21#include "siemens-am33x-common.h"
22
23#define CONFIG_SYS_MPUCLK 600
24#define RUT_IOCTRL_VAL 0x18b
25#define DDR_PLL_FREQ 303
26
27 /* Physical Memory Map */
28#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */
29
30/* I2C Configuration */
31#define CONFIG_SYS_I2C_SPEED 100000
32
33#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
34#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
35#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */
36#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */
37
Heiko Schocherc0dcece2013-08-19 16:39:01 +020038#define CONFIG_PHY_NATSEMI
39
40#define CONFIG_FACTORYSET
41
Heiko Schocherc0dcece2013-08-19 16:39:01 +020042/* Watchdog */
43#define WATCHDOG_TRIGGER_GPIO 14
44
45#ifndef CONFIG_SPL_BUILD
46
Heiko Schocher61159b72015-06-16 14:59:34 +020047/* Use common default */
48#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V1
49
Heiko Schocherc0dcece2013-08-19 16:39:01 +020050/* Default env settings */
51#define CONFIG_EXTRA_ENV_SETTINGS \
52 "hostname=rut\0" \
Heiko Schocher6b3943f2016-06-07 08:55:45 +020053 "ubi_off=2048\0"\
Samuel Egli56eb3da2013-11-04 14:05:03 +010054 "nand_img_size=0x500000\0" \
55 "splashpos=m,m\0" \
Heiko Schocherc0dcece2013-08-19 16:39:01 +020056 "optargs=fixrtc --no-log consoleblank=0 \0" \
Heiko Schocher61159b72015-06-16 14:59:34 +020057 CONFIG_ENV_SETTINGS_V1 \
58 CONFIG_ENV_SETTINGS_NAND_V1 \
Heiko Schocherc0dcece2013-08-19 16:39:01 +020059 "mmc_dev=0\0" \
60 "mmc_root=/dev/mmcblk0p2 rw\0" \
61 "mmc_root_fs_type=ext4 rootwait\0" \
62 "mmc_load_uimage=" \
63 "mmc rescan; " \
64 "setenv bootfile uImage;" \
65 "fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \
66 "loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
67 "importbootenv=echo Importing environment from mmc ...; " \
68 "env import -t $loadaddr $filesize\0" \
69 "mmc_args=run bootargs_defaults;" \
70 "mtdparts default;" \
71 "setenv bootargs ${bootargs} " \
72 "root=${mmc_root} ${mtdparts}" \
73 "rootfstype=${mmc_root_fs_type} ip=${ip_method} " \
74 "eth=${ethaddr} " \
75 "\0" \
76 "mmc_boot=run mmc_args; " \
77 "run mmc_load_uimage; " \
78 "bootm ${kloadaddr}\0" \
79 ""
80
81#ifndef CONFIG_RESTORE_FLASH
82/* set to negative value for no autoboot */
Heiko Schocherc0dcece2013-08-19 16:39:01 +020083
84#define CONFIG_BOOTCOMMAND \
85 "if mmc rescan; then " \
86 "echo SD/MMC found on device ${mmc_dev};" \
87 "if run loadbootenv; then " \
88 "echo Loaded environment from ${bootenv};" \
89 "run importbootenv;" \
90 "fi;" \
91 "if test -n $uenvcmd; then " \
92 "echo Running uenvcmd ...;" \
93 "run uenvcmd;" \
94 "fi;" \
95 "if run mmc_load_uimage; then " \
96 "run mmc_args;" \
97 "bootm ${kloadaddr};" \
98 "fi;" \
99 "fi;" \
100 "run nand_boot;" \
Samuel Egli56eb3da2013-11-04 14:05:03 +0100101 "reset;"
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200102
103#else
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200104
105#define CONFIG_BOOTCOMMAND \
106 "setenv autoload no; " \
107 "dhcp; " \
108 "if tftp 80000000 debrick.scr; then " \
109 "source 80000000; " \
110 "fi"
111#endif
112
113#endif /* CONFIG_SPL_BUILD */
114
115#ifdef CONFIG_SPL_BUILD
116#undef CONFIG_HW_WATCHDOG
117#endif
118
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200119#if defined(CONFIG_VIDEO)
120#define CONFIG_VIDEO_DA8XX
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200121#define CONFIG_SPLASH_SCREEN
122#define CONFIG_SPLASH_SCREEN_ALIGN
123#define CONFIG_VIDEO_LOGO
124#define CONFIG_VIDEO_BMP_RLE8
125#define CONFIG_VIDEO_BMP_LOGO
126#define CONFIG_CMD_BMP
127#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
128
129#define CONFIG_SPI
130#define CONFIG_OMAP3_SPI
131
132#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200133#define CONFIG_FORMIKE
Samuel Egli56eb3da2013-11-04 14:05:03 +0100134#define DISPL_PLL_SPREAD_SPECTRUM
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200135#endif
136
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200137#endif /* ! __CONFIG_RUT_H */