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Eddy Petrișor9702ec02016-06-05 03:43:00 +03001/*
2 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 *
6 * Configuration settings for the Freescale S32V234 EVB board.
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#ifndef CONFIG_SPL_BUILD
13#include <config_distro_defaults.h>
14#endif
15
16#include <asm/arch/imx-regs.h>
17
18#define CONFIG_S32V234
19#define CONFIG_DM
20
Eddy Petrișor9702ec02016-06-05 03:43:00 +030021/* Config GIC */
22#define CONFIG_GICV2
23#define GICD_BASE 0x7D001000
24#define GICC_BASE 0x7D002000
25
26#define CONFIG_REMAKE_ELF
27#undef CONFIG_RUN_FROM_IRAM_ONLY
28
29#define CONFIG_RUN_FROM_DDR1
30#undef CONFIG_RUN_FROM_DDR0
31
32/* Run by default from DDR1 */
33#ifdef CONFIG_RUN_FROM_DDR0
34#define DDR_BASE_ADDR 0x80000000
35#else
36#define DDR_BASE_ADDR 0xC0000000
37#endif
38
39#define CONFIG_MACH_TYPE 4146
40
41#define CONFIG_SKIP_LOWLEVEL_INIT
42
43/* Config CACHE */
44#define CONFIG_CMD_CACHE
45
46#define CONFIG_SYS_FULL_VA
47
48/* Enable passing of ATAGs */
49#define CONFIG_CMDLINE_TAG
50
51/* SMP Spin Table Definitions */
52#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
53
54/* Generic Timer Definitions */
55#define COUNTER_FREQUENCY (1000000000) /* 1000MHz */
56#define CONFIG_SYS_FSL_ERRATUM_A008585
57
58/* Size of malloc() pool */
59#ifdef CONFIG_RUN_FROM_IRAM_ONLY
60#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
61#else
62#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
63#endif
Eddy Petrișor9702ec02016-06-05 03:43:00 +030064
65#define CONFIG_DM_SERIAL
66#define CONFIG_FSL_LINFLEXUART
67#define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR
68
69#define CONFIG_DEBUG_UART_LINFLEXUART
70#define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE
71
72/* Allow to overwrite serial and ethaddr */
73#define CONFIG_ENV_OVERWRITE
74#define CONFIG_SYS_UART_PORT (1)
75#define CONFIG_BAUDRATE 115200
76
77#undef CONFIG_CMD_IMLS
78
Eddy Petrișor9702ec02016-06-05 03:43:00 +030079#define CONFIG_FSL_ESDHC
80#define CONFIG_FSL_USDHC
81#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR
82#define CONFIG_SYS_FSL_ESDHC_NUM 1
83
Eddy Petrișor9702ec02016-06-05 03:43:00 +030084#define CONFIG_CMD_MMC
85#define CONFIG_GENERIC_MMC
86/* #define CONFIG_CMD_EXT2 EXT2 Support */
Eddy Petrișor9702ec02016-06-05 03:43:00 +030087
88#if 0
89
90/* Ethernet config */
91#define CONFIG_CMD_PING
Eddy Petrișor9702ec02016-06-05 03:43:00 +030092#define CONFIG_CMD_MII
93#define CONFIG_FEC_MXC
94#define CONFIG_MII
95#define IMX_FEC_BASE ENET_BASE_ADDR
96#define CONFIG_FEC_XCV_TYPE RMII
97#define CONFIG_FEC_MXC_PHYADDR 0
98#define CONFIG_PHYLIB
99#define CONFIG_PHY_MICREL
100#endif
101
102#if 0 /* Disable until the I2C driver will be updated */
103
104/* I2C Configs */
105#define CONFIG_CMD_I2C
106#define CONFIG_HARD_I2C
107#define CONFIG_I2C_MXC
108#define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR
109#define CONFIG_SYS_I2C_SPEED 100000
110#endif
111
112#if 0 /* Disable until the FLASH will be implemented */
113#define CONFIG_SYS_USE_NAND
114#endif
115
116#ifdef CONFIG_SYS_USE_NAND
117/* Nand Flash Configs */
118#define CONFIG_CMD_NAND
119#define CONFIG_JFFS2_NAND
120#define MTD_NAND_FSL_NFC_SWECC 1
121#define CONFIG_NAND_FSL_NFC
122#define CONFIG_SYS_NAND_BASE 0x400E0000
123#define CONFIG_SYS_MAX_NAND_DEVICE 1
124#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
125#define CONFIG_SYS_NAND_SELECT_DEVICE
126#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
127#endif
128
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300129#define CONFIG_LOADADDR 0xC307FFC0
130#define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw"
131
132#define CONFIG_CMD_ENV
133#define CONFIG_EXTRA_ENV_SETTINGS \
134 "boot_scripts=boot.scr.uimg boot.scr\0" \
135 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
136 "console=ttyLF0,115200\0" \
137 "fdt_file=s32v234-evb.dtb\0" \
138 "fdt_high=0xffffffff\0" \
139 "initrd_high=0xffffffff\0" \
140 "fdt_addr_r=0xC2000000\0" \
141 "kernel_addr_r=0xC307FFC0\0" \
142 "ramdisk_addr_r=0xC4000000\0" \
143 "ramdisk=rootfs.uimg\0"\
144 "ip_dyn=yes\0" \
145 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
146 "update_sd_firmware_filename=u-boot.imx\0" \
147 "update_sd_firmware=" \
148 "if test ${ip_dyn} = yes; then " \
149 "setenv get_cmd dhcp; " \
150 "else " \
151 "setenv get_cmd tftp; " \
152 "fi; " \
153 "if mmc dev ${mmcdev}; then " \
154 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
155 "setexpr fw_sz ${filesize} / 0x200; " \
156 "setexpr fw_sz ${fw_sz} + 1; " \
157 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
158 "fi; " \
159 "fi\0" \
160 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
161 "jtagboot=echo Booting using jtag...; " \
162 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
163 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
164 "run loaduimage; run loadramdisk; run loadfdt;"\
165 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
166 "boot_net_usb_start=true\0" \
167 BOOTENV
168
169#define BOOT_TARGET_DEVICES(func) \
170 func(MMC, mmc, 1) \
171 func(MMC, mmc, 0) \
172 func(DHCP, dhcp, na)
173
174#define CONFIG_BOOTCOMMAND \
175 "run distro_bootcmd"
176
177#include <config_distro_bootcmd.h>
178
179/* Miscellaneous configurable options */
180#define CONFIG_SYS_LONGHELP /* undef to save memory */
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300181#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
182#define CONFIG_SYS_PROMPT "=> "
183#undef CONFIG_AUTO_COMPLETE
184#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
185#define CONFIG_SYS_PBSIZE \
186 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
187#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
188#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
189#define CONFIG_CMDLINE_EDITING
190
191#define CONFIG_CMD_MEMTEST
192#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR)
193#define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000)
194
195#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
196#define CONFIG_SYS_HZ 1000
197
198#define CONFIG_SYS_TEXT_BASE 0x3E800000 /* SDRAM */
199
200#ifdef CONFIG_RUN_FROM_IRAM_ONLY
201#define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR)
202#endif
203
204/*
205 * Stack sizes
206 * The stack sizes are set up in start.S using the settings below
207 */
208#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
209
210#if 0
211/* Configure PXE */
Eddy Petrișor9702ec02016-06-05 03:43:00 +0300212#define CONFIG_BOOTP_PXE
213#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
214#endif
215
216/* Physical memory map */
217/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
218#define CONFIG_NR_DRAM_BANKS 1
219#define PHYS_SDRAM (DDR_BASE_ADDR)
220#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
221
222#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
223#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
224#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
225
226#define CONFIG_SYS_INIT_SP_OFFSET \
227 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
228#define CONFIG_SYS_INIT_SP_ADDR \
229 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
230
231/* FLASH and environment organization */
232#define CONFIG_SYS_NO_FLASH
233
234#define CONFIG_ENV_SIZE (8 * 1024)
235#define CONFIG_ENV_IS_IN_MMC
236
237#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
238#define CONFIG_SYS_MMC_ENV_DEV 0
239
240
241#define CONFIG_BOOTP_BOOTFILESIZE
242#define CONFIG_BOOTP_BOOTPATH
243#define CONFIG_BOOTP_GATEWAY
244#define CONFIG_BOOTP_HOSTNAME
245
246#endif