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Stefano Babicf9c6fac2011-11-30 23:56:52 +00001/*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * Copyright (C) 2009 TechNexion Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc.
20 */
21
22#ifndef __TAM3517_H
23#define __TAM3517_H
24
25/*
26 * High Level Configuration Options
27 */
28#define CONFIG_OMAP /* in a TI OMAP core */
29#define CONFIG_OMAP34XX /* which is a 34XX */
Marek Vasut308252a2012-07-21 05:02:23 +000030#define CONFIG_OMAP_GPIO
Stefano Babicf9c6fac2011-11-30 23:56:52 +000031
32#define CONFIG_SYS_TEXT_BASE 0x80008000
33
34#define CONFIG_SYS_CACHELINE_SIZE 64
35
36#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
37
38#include <asm/arch/cpu.h> /* get chip and board defs */
39#include <asm/arch/omap3.h>
40
41/*
42 * Display CPU and Board information
43 */
44#define CONFIG_DISPLAY_CPUINFO
45#define CONFIG_DISPLAY_BOARDINFO
46
47/* Clock Defines */
48#define V_OSCK 26000000 /* Clock output from T2 */
49#define V_SCLK (V_OSCK >> 1)
50
Stefano Babicf9c6fac2011-11-30 23:56:52 +000051#define CONFIG_MISC_INIT_R
52
53#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
54#define CONFIG_SETUP_MEMORY_TAGS
55#define CONFIG_INITRD_TAG
56#define CONFIG_REVISION_TAG
57
58/*
59 * Size of malloc() pool
60 */
61#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
62#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
63 2 * 1024 * 1024)
64/*
65 * DDR related
66 */
67#define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
68#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
69
70/*
71 * Hardware drivers
72 */
73
74/*
75 * NS16550 Configuration
76 */
77#define CONFIG_SYS_NS16550
78#define CONFIG_SYS_NS16550_SERIAL
79#define CONFIG_SYS_NS16550_REG_SIZE (-4)
80#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
81
82/*
83 * select serial console configuration
84 */
85#define CONFIG_CONS_INDEX 1
86#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
87#define CONFIG_SERIAL1 /* UART1 */
88
89/* allow to overwrite serial and ethaddr */
90#define CONFIG_ENV_OVERWRITE
91#define CONFIG_BAUDRATE 115200
92#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
93 115200}
94#define CONFIG_MMC
95#define CONFIG_OMAP_HSMMC
96#define CONFIG_GENERIC_MMC
97#define CONFIG_DOS_PARTITION
98
99/* EHCI */
100#define CONFIG_OMAP3_GPIO_5
101#define CONFIG_USB_EHCI
102#define CONFIG_USB_EHCI_OMAP
Stefano Babic8c589d62012-02-07 23:28:58 +0000103#define CONFIG_USB_ULPI
104#define CONFIG_USB_ULPI_VIEWPORT_OMAP
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000105#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
106#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
107#define CONFIG_USB_STORAGE
108
109/* #define CONFIG_EHCI_DCACHE */
110
111/* commands to include */
112#include <config_cmd_default.h>
113
114#define CONFIG_CMD_CACHE
115#define CONFIG_CMD_DHCP
116#define CONFIG_CMD_EXT2 /* EXT2 Support */
117#define CONFIG_CMD_FAT /* FAT support */
118#define CONFIG_CMD_GPIO
119#define CONFIG_CMD_I2C /* I2C serial bus support */
120#define CONFIG_CMD_MII
121#define CONFIG_CMD_MMC /* MMC support */
122#define CONFIG_CMD_NET
123#define CONFIG_CMD_NFS
124#define CONFIG_CMD_NAND /* NAND support */
125#define CONFIG_CMD_PING
126#define CONFIG_CMD_USB
Stefano Babic8103c6f2012-08-29 01:21:59 +0000127#define CONFIG_CMD_EEPROM
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000128
129#undef CONFIG_CMD_FLASH /* only NAND on the SOM */
130#undef CONFIG_CMD_IMLS
131
132#define CONFIG_SYS_NO_FLASH
133#define CONFIG_HARD_I2C
134#define CONFIG_SYS_I2C_SPEED 400000
135#define CONFIG_SYS_I2C_SLAVE 1
136#define CONFIG_SYS_I2C_BUS 0
137#define CONFIG_SYS_I2C_BUS_SELECT 1
Stefano Babic8103c6f2012-08-29 01:21:59 +0000138#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
139#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
140#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000141#define CONFIG_DRIVER_OMAP34XX_I2C
142
143
144/*
145 * Board NAND Info.
146 */
147#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
148 /* to access */
149 /* nand at CS0 */
150
151#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
152 /* NAND devices */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000153
154#define CONFIG_AUTO_COMPLETE
155
156/*
157 * Miscellaneous configurable options
158 */
159#define CONFIG_SYS_LONGHELP /* undef to save memory */
160#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000161#define CONFIG_CMDLINE_EDITING
162#define CONFIG_AUTO_COMPLETE
163#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
164
165/* Print Buffer Size */
166#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
167 sizeof(CONFIG_SYS_PROMPT) + 16)
168#define CONFIG_SYS_MAXARGS 32 /* max number of command */
169 /* args */
170/* Boot Argument Buffer Size */
171#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
172/* memtest works on */
173#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
174#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
175 0x01F00000) /* 31MB */
176
177#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
178 /* address */
179
180/*
181 * AM3517 has 12 GP timers, they can be driven by the system clock
182 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
183 * This rate is divided by a local divisor.
184 */
185#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
186#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
187#define CONFIG_SYS_HZ 1000
188
189/*
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000190 * Physical Memory Map
191 */
192#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
193#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
194#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
195#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
196
197/*
198 * FLASH and environment organization
199 */
200
201/* **** PISMO SUPPORT *** */
202
203/* Configure the PISMO */
204#define PISMO1_NAND_SIZE GPMC_SIZE_128M
205
206#define CONFIG_NAND_OMAP_GPMC
207#define GPMC_NAND_ECC_LP_x16_LAYOUT
208#define CONFIG_ENV_IS_IN_NAND
209#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
210
211/* Redundant Environment */
212#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
213#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
214#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
215#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
216 2 * CONFIG_SYS_ENV_SECT_SIZE)
217#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
218
219#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
220#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
221#define CONFIG_SYS_INIT_RAM_SIZE 0x800
222#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
223 CONFIG_SYS_INIT_RAM_SIZE - \
224 GENERATED_GBL_DATA_SIZE)
225
226/*
227 * ethernet support, EMAC
228 *
229 */
230#define CONFIG_DRIVER_TI_EMAC
231#define CONFIG_DRIVER_TI_EMAC_USE_RMII
232#define CONFIG_MII
233#define CONFIG_EMAC_MDIO_PHY_NUM 0
234#define CONFIG_BOOTP_DEFAULT
235#define CONFIG_BOOTP_DNS
236#define CONFIG_BOOTP_DNS2
237#define CONFIG_BOOTP_SEND_HOSTNAME
238#define CONFIG_NET_RETRY_COUNT 10
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000239
240/* Defines for SPL */
241#define CONFIG_SPL
Tom Rini47f7bca2012-08-13 12:03:19 -0700242#define CONFIG_SPL_FRAMEWORK
Tom Rinid7cb93b2012-08-14 12:26:08 -0700243#define CONFIG_SPL_BOARD_INIT
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000244#define CONFIG_SPL_CONSOLE
245#define CONFIG_SPL_NAND_SIMPLE
246#define CONFIG_SPL_NAND_SOFTECC
247#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
248
249#define CONFIG_SPL_LIBCOMMON_SUPPORT
250#define CONFIG_SPL_LIBDISK_SUPPORT
251#define CONFIG_SPL_I2C_SUPPORT
252#define CONFIG_SPL_LIBGENERIC_SUPPORT
253#define CONFIG_SPL_SERIAL_SUPPORT
Marek Vasut16e41c82012-07-21 05:02:27 +0000254#define CONFIG_SPL_GPIO_SUPPORT
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000255#define CONFIG_SPL_POWER_SUPPORT
256#define CONFIG_SPL_NAND_SUPPORT
257#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
258
259#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinie0820cc2012-05-08 07:29:31 +0000260#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000261#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
262
263#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
264#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
265#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
266#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
267
268/* NAND boot config */
269#define CONFIG_SYS_NAND_PAGE_COUNT 64
270#define CONFIG_SYS_NAND_PAGE_SIZE 2048
271#define CONFIG_SYS_NAND_OOBSIZE 64
272#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
273#define CONFIG_SYS_NAND_5_ADDR_CYCLE
274#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
275#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
276 48, 49, 50, 51, 52, 53, 54, 55,\
277 56, 57, 58, 59, 60, 61, 62, 63}
278#define CONFIG_SYS_NAND_ECCSIZE 256
279#define CONFIG_SYS_NAND_ECCBYTES 3
280
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000281#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
282
283#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
284#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
285
286#define CONFIG_OF_LIBFDT
287#define CONFIG_FIT
288#define CONFIG_CMD_UBI
289#define CONFIG_CMD_UBIFS
290#define CONFIG_RBTREE
291#define CONFIG_LZO
292#define CONFIG_MTD_PARTITIONS
293#define CONFIG_MTD_DEVICE
294#define CONFIG_CMD_MTDPARTS
295
296/* Setup MTD for NAND on the SOM */
297#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
298#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
Stefano Babic1fdabed2012-02-07 23:29:34 +0000299 "1m(u-boot),256k(env1)," \
300 "256k(env2),6m(kernel),-(rootfs)"
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000301
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000302#define CONFIG_TAM3517_SETTINGS \
303 "netdev=eth0\0" \
304 "nandargs=setenv bootargs root=${nandroot} " \
305 "rootfstype=${nandrootfstype}\0" \
306 "nfsargs=setenv bootargs root=/dev/nfs rw " \
307 "nfsroot=${serverip}:${rootpath}\0" \
308 "ramargs=setenv bootargs root=/dev/ram rw\0" \
309 "addip_sta=setenv bootargs ${bootargs} " \
310 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
311 ":${hostname}:${netdev}:off panic=1\0" \
312 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
313 "addip=if test -n ${ipdyn};then run addip_dyn;" \
314 "else run addip_sta;fi\0" \
315 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
316 "addtty=setenv bootargs ${bootargs}" \
317 " console=ttyO0,${baudrate}\0" \
318 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
319 "loadaddr=82000000\0" \
320 "kernel_addr_r=82000000\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200321 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
322 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000323 "flash_self=run ramargs addip addtty addmtd addmisc;" \
324 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
325 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
326 "bootm ${kernel_addr}\0" \
327 "nandboot=run nandargs addip addtty addmtd addmisc;" \
328 "nand read ${kernel_addr_r} kernel\0" \
329 "bootm ${kernel_addr_r}\0" \
330 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
331 "run nfsargs addip addtty addmtd addmisc;" \
332 "bootm ${kernel_addr_r}\0" \
333 "net_self=if run net_self_load;then " \
334 "run ramargs addip addtty addmtd addmisc;" \
335 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
336 "else echo Images not loades;fi\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200337 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000338 "load=tftp ${loadaddr} ${u-boot}\0" \
339 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200340 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000341 "uboot_addr=0x80000\0" \
342 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
343 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
344 "updatemlo=nandecc hw;nand erase 0 20000;" \
345 "nand write ${loadaddr} 0 20000\0" \
346 "upd=if run load;then echo Updating u-boot;if run update;" \
347 "then echo U-Boot updated;" \
348 "else echo Error updating u-boot !;" \
349 "echo Board without bootloader !!;" \
350 "fi;" \
351 "else echo U-Boot not downloaded..exiting;fi\0" \
352
Stefano Babic8103c6f2012-08-29 01:21:59 +0000353
354/*
355 * this is common code for all TAM3517 boards.
356 * MAC address is stored from manufacturer in
357 * I2C EEPROM
358 */
359#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
360
361/*
362 * The I2C EEPROM on the TAM3517 contains
363 * mac address and production data
364 */
365struct tam3517_module_info {
366 char customer[48];
367 char product[48];
368
369 /*
370 * bit 0~47 : sequence number
371 * bit 48~55 : week of year, from 0.
372 * bit 56~63 : year
373 */
374 unsigned long long sequence_number;
375
376 /*
377 * bit 0~7 : revision fixed
378 * bit 8~15 : revision major
379 * bit 16~31 : TNxxx
380 */
381 unsigned int revision;
382 unsigned char eth_addr[4][8];
383 unsigned char _rev[100];
384};
385
386#define TAM3517_READ_MAC_FROM_EEPROM \
387do { \
388 struct tam3517_module_info info;\
389 char buf[80], ethname[20]; \
390 int i; \
391 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
392 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
393 (void *)&info, sizeof(info))) \
394 break; \
395 memset(buf, 0, sizeof(buf)); \
396 for (i = 0 ; i < ARRAY_SIZE(info.eth_addr); i++) { \
397 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
398 info.eth_addr[i][5], \
399 info.eth_addr[i][4], \
400 info.eth_addr[i][3], \
401 info.eth_addr[i][2], \
402 info.eth_addr[i][1], \
403 info.eth_addr[i][0]); \
404 \
405 if (i) \
406 sprintf(ethname, "eth%daddr", i); \
407 else \
408 sprintf(ethname, "ethaddr"); \
409 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
410 setenv(ethname, buf); \
411 } \
412} while (0)
413#endif
414
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000415#endif /* __TAM3517_H */