blob: d736742f6225749515d13cbe1fb5d507dba7f778 [file] [log] [blame]
wdenk42d1f032003-10-15 23:53:47 +00001/*
wdenk97d80fc2004-06-09 00:34:46 +00002 * Copyright 2004 Freescale Semiconductor.
wdenk42d1f032003-10-15 23:53:47 +00003 * (C) Copyright 2003 Motorola Inc.
4 * Xianghua Xiao, (X.Xiao@motorola.com)
5 *
6 * (C) Copyright 2000
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <ppc_asm.tmpl>
30#include <asm/processor.h>
31
32/* --------------------------------------------------------------- */
33
wdenk42d1f032003-10-15 23:53:47 +000034void get_sys_info (sys_info_t * sysInfo)
35{
wdenk42d1f032003-10-15 23:53:47 +000036 volatile immap_t *immap = (immap_t *)CFG_IMMR;
37 volatile ccsr_gur_t *gur = &immap->im_gur;
38 uint plat_ratio,e500_ratio;
39
40 plat_ratio = (gur->porpllsr) & 0x0000003e;
41 plat_ratio >>= 1;
42 switch(plat_ratio) {
43 case 0x02:
44 case 0x03:
45 case 0x04:
46 case 0x05:
47 case 0x06:
48 case 0x08:
49 case 0x09:
50 case 0x0a:
51 case 0x0c:
52 case 0x10:
53 sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
54 break;
55 default:
56 sysInfo->freqSystemBus = 0;
57 break;
58 }
59
60 e500_ratio = (gur->porpllsr) & 0x003f0000;
61 e500_ratio >>= 16;
62 switch(e500_ratio) {
63 case 0x04:
64 sysInfo->freqProcessor = 2*sysInfo->freqSystemBus;
65 break;
66 case 0x05:
67 sysInfo->freqProcessor = 5*sysInfo->freqSystemBus/2;
68 break;
69 case 0x06:
70 sysInfo->freqProcessor = 3*sysInfo->freqSystemBus;
71 break;
72 case 0x07:
73 sysInfo->freqProcessor = 7*sysInfo->freqSystemBus/2;
74 break;
75 default:
76 sysInfo->freqProcessor = 0;
77 break;
78 }
79}
80
81int get_clocks (void)
82{
83 DECLARE_GLOBAL_DATA_PTR;
84 sys_info_t sys_info;
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -050085#if defined(CONFIG_CPM2)
wdenk42d1f032003-10-15 23:53:47 +000086 volatile immap_t *immap = (immap_t *) CFG_IMMR;
87 uint sccr, dfbrg;
88
89 /* set VCO = 4 * BRG */
90 immap->im_cpm.im_cpm_intctl.sccr &= 0xfffffffc;
91 sccr = immap->im_cpm.im_cpm_intctl.sccr;
92 dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
93#endif
94 get_sys_info (&sys_info);
95 gd->cpu_clk = sys_info.freqProcessor;
96 gd->bus_clk = sys_info.freqSystemBus;
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -050097#if defined(CONFIG_CPM2)
wdenk42d1f032003-10-15 23:53:47 +000098 gd->vco_out = 2*sys_info.freqSystemBus;
99 gd->cpm_clk = gd->vco_out / 2;
100 gd->scc_clk = gd->vco_out / 4;
101 gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
102#endif
103
104 if(gd->cpu_clk != 0) return (0);
105 else return (1);
106}
107
108
109/********************************************
110 * get_bus_freq
111 * return system bus freq in Hz
112 *********************************************/
113ulong get_bus_freq (ulong dummy)
114{
115 ulong val;
116
117 sys_info_t sys_info;
118
119 get_sys_info (&sys_info);
120 val = sys_info.freqSystemBus;
121
122 return val;
123}