| wdenk | c15f312 | 2004-10-10 22:44:24 +0000 | [diff] [blame^] | 1 | The port was tested on Wind River System Sbc8560 board <www.windriver.com>. U-Boot was |
| 2 | installed on the flash memory of the CPU card (no the SODIMM). |
| 3 | |
| 4 | NOTE: Please configure uboot compile to the proper PCI frequency and setup the |
| 5 | appropriate DIP switch settings. |
| 6 | |
| 7 | SBC8560 board: |
| 8 | |
| 9 | Make sure boards switches are set to their appropriate conditions. Refer |
| 10 | to the Engineering Reference Guide ERG-00300-002. Of particular |
| 11 | importance are: 1)Tthe settings for JP4 (JP4 1-3 and 2-4), which select |
| 12 | the on-board FLASH device (Intel 28F128Jx); 2) The settings for the Clock SW9 (33 MHz |
| 13 | or 66 MHz). |
| 14 | |
| 15 | Note: SW9 Settings: 66 MHz |
| 16 | 4:1 ratio CCB clocks:SYSCLK |
| 17 | 3:1 ration e500 Core:CCB |
| 18 | pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on |
| 19 | Note: SW9 Settings: 33 MHz |
| 20 | 8:1 ratio CCB clocks:SYSCLK |
| 21 | 3:1 ration e500 Core:CCB |
| 22 | pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on |
| 23 | |
| 24 | |
| 25 | Flashing the FLASH device with the "Wind River ICE": |
| 26 | |
| 27 | 1) Properly connect and configure the Wind River ICE to the |
| 28 | target JTAG port. This includes running the SBC8560 register script. |
| 29 | Make sure target memory can be read and written. |
| 30 | |
| 31 | 2) Build the u-boot image: |
| 32 | make distclean |
| 33 | make SBC8560_66_config or SBC8560_33_config |
| 34 | make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all |
| 35 | |
| 36 | Note: reference is made to the ELDK3.0 compiler. Further, it seems the ppc_8xx compiler is |
| 37 | required for the 85xx (no 85xx designated compiler in ELDK3.0) |
| 38 | |
| 39 | 3) Convert the uboot (.elf) file to a uboot.bin file (using visionClick converter). |
| 40 | The bin file should be converted from fffc0000 to ffffffff |
| 41 | |
| 42 | 4) Setup the Flash Utility (tools menu) for: |
| 43 | |
| 44 | Do a "dc clr" [visionClick] to load the default register settings |
| 45 | Determine the clock speed of the PCI bus and set SW9 accordingly |
| 46 | Note: the speed of the PCI bus defaults to the slowest PCI card |
| 47 | PlayBack the "default" register file for the SBC8560 |
| 48 | Select the uboot.bin file with zero bias |
| 49 | Select the initialize Target prior to programming |
| 50 | Select the V28F640Jx (8192 x 8) 1 device FLASH Algorithm |
| 51 | Select the erase base address from FFFC0000 to FFFFFFFF |
| 52 | Select the start address from 0 with size of 4000 |
| 53 | |
| 54 | 5) Erase and Program |
| 55 | |