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Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +02001/*
2 * am335x_sl50.h
3 *
4 * Copyright (C) 2015 Toby Churchill Ltd - http://www.toby-churchill.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_AM335X_EVM_H
10#define __CONFIG_AM335X_EVM_H
11
12#include <configs/ti_am335x_common.h>
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020013
14#ifndef CONFIG_SPL_BUILD
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020015# define CONFIG_TIMESTAMP
16# define CONFIG_LZO
17#endif
18
19#define CONFIG_SYS_BOOTM_LEN (16 << 20)
20
21/*#define CONFIG_MACH_TYPE 3589 Until the next sync */
22#define CONFIG_BOARD_LATE_INIT
23
24/* Clock Defines */
25#define V_OSCK 24000000 /* Clock output from T2 */
26#define V_SCLK (V_OSCK)
27
28/* Always 128 KiB env size */
29#define CONFIG_ENV_SIZE (128 << 10)
30
31/* Enhance our eMMC support / experience. */
32#define CONFIG_CMD_GPT
33#define CONFIG_EFI_PARTITION
34
35#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
36
37#ifndef CONFIG_SPL_BUILD
38
39#include <config_distro_defaults.h>
40
41#define MEM_LAYOUT_ENV_SETTINGS \
42 "scriptaddr=0x80000000\0" \
43 "pxefile_addr_r=0x80100000\0" \
44 "kernel_addr_r=0x82000000\0" \
45 "fdt_addr_r=0x88000000\0" \
46 "ramdisk_addr_r=0x88080000\0" \
47
48#define BOOT_TARGET_DEVICES(func) \
49 func(MMC, mmc, 0) \
50 func(MMC, mmc, 1)
51
52#define AM335XX_BOARD_FDTFILE \
53 "fdtfile=am335x-sl50.dtb\0" \
54
55#include <config_distro_bootcmd.h>
56
57#define CONFIG_EXTRA_ENV_SETTINGS \
58 AM335XX_BOARD_FDTFILE \
59 MEM_LAYOUT_ENV_SETTINGS \
60 BOOTENV
61
62#endif
63
64/* NS16550 Configuration */
65#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
66#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
67#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
68#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
69#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
70#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
71#define CONFIG_BAUDRATE 115200
72
73#define CONFIG_CMD_EEPROM
74#define CONFIG_ENV_EEPROM_IS_ON_I2C
75#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
76#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020077
78/* PMIC support */
79#define CONFIG_POWER_TPS65217
80#define CONFIG_POWER_TPS65910
81
82/* SPL */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020083
84/* Bootcount using the RTC block */
85#define CONFIG_BOOTCOUNT_LIMIT
86#define CONFIG_BOOTCOUNT_AM33XX
87#define CONFIG_SYS_BOOTCOUNT_BE
88
89#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
90
91#ifndef CONFIG_SPL_USBETH_SUPPORT
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020092#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
93#endif
94
95#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
96/* Remove other SPL modes. */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020097#define CONFIG_ENV_IS_NOWHERE
98#undef CONFIG_ENV_IS_IN_NAND
99/* disable host part of MUSB in SPL */
100#undef CONFIG_MUSB_HOST
101/* disable EFI partitions and partition UUID support */
102#undef CONFIG_PARTITION_UUIDS
103#undef CONFIG_EFI_PARTITION
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +0200104#endif
105
106#if defined(CONFIG_EMMC_BOOT)
107#undef CONFIG_ENV_IS_NOWHERE
108#define CONFIG_ENV_IS_IN_MMC
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +0200109#define CONFIG_SYS_MMC_ENV_DEV 1
110#define CONFIG_SYS_MMC_ENV_PART 2
111#define CONFIG_ENV_OFFSET 0x0
112#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
113#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
114#endif
115
116/* Network. */
117#define CONFIG_PHY_GIGE
118#define CONFIG_PHYLIB
119#define CONFIG_PHY_SMSC
120
121#endif /* ! __CONFIG_AM335X_SL50_H */