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Daniel Hellstrom6ed8a432008-03-26 23:38:48 +01001/* Configuration header file for Gaisler GR-CPCI-AX2000
2 * AX board. Note that since the AX is removable the configuration
3 * for this board must be edited below.
4 *
5 * (C) Copyright 2003-2005
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2008
9 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
10 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020011 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010012 */
13
14#ifndef __CONFIG_H__
15#define __CONFIG_H__
16
17/*
18 * High Level Configuration Options
19 * (easy to change)
20 */
21
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010022#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
23
24#define CONFIG_LEON_RAM_SRAM 1
25#define CONFIG_LEON_RAM_SDRAM 2
26#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
27
28/* Select Memory to run from
29 *
30 * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
31 * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
32 * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
33 *
34 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
35 * it doesn't fit into the 4Mb SRAM.
36 *
37 * SRAM is default since it will work for all systems, however will not
38 * be able to boot linux.
39 */
40#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
41
42/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020043#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010044
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010045/*
46 * Serial console configuration
47 */
48#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010050
51/* Partitions */
52#define CONFIG_DOS_PARTITION
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010053#define CONFIG_ISO_PARTITION
54
55/*
56 * Supported commands
57 */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010058#define CONFIG_CMD_REGINFO
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010059#define CONFIG_CMD_DIAG
60#define CONFIG_CMD_IRQ
61
62/*
63 * Autobooting
64 */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010065
66#define CONFIG_PREBOOT "echo;" \
67 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
68 "echo"
69
70#undef CONFIG_BOOTARGS
71
72#define CONFIG_EXTRA_ENV_SETTINGS_BASE \
73 "netdev=eth0\0" \
74 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
75 "nfsroot=${serverip}:${rootpath}\0" \
76 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
77 "addip=setenv bootargs ${bootargs} " \
78 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
79 ":${hostname}:${netdev}:off panic=1\0" \
80 "flash_nfs=run nfsargs addip;" \
81 "bootm ${kernel_addr}\0" \
82 "flash_self=run ramargs addip;" \
83 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000084 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010085 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
86
87#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
88#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
89 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
90 "scratch=40200000\0" \
91 ""
92#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
93#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
94 "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
95 "scratch=60800000\0" \
96 ""
97#else
98/* More than 4Mb is assumed when running from SDRAM */
99#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
100 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
101 "scratch=40800000\0" \
102 ""
103#endif
104
105#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
106
107#define CONFIG_NETMASK 255.255.255.0
108#define CONFIG_GATEWAYIP 192.168.0.1
109#define CONFIG_SERVERIP 192.168.0.20
110#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000111#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100112#define CONFIG_HOSTNAME ax2000
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000113#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100114
115#define CONFIG_BOOTCOMMAND "run flash_self"
116
117/* Memory MAP
118 *
119 * Flash:
120 * |--------------------------------|
121 * | 0x00000000 Text & Data & BSS | *
122 * | for Monitor | *
123 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
124 * | UNUSED / Growth | * 256kb
125 * |--------------------------------|
126 * | 0x00050000 Base custom area | *
127 * | kernel / FS | *
128 * | | * Rest of Flash
129 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
130 * | END-0x00008000 Environment | * 32kb
131 * |--------------------------------|
132 *
133 *
134 *
135 * Main Memory (4Mb SRAM or XMb SDRAM):
136 * |--------------------------------|
137 * | UNUSED / scratch area |
138 * | |
139 * | |
140 * | |
141 * | |
142 * |--------------------------------|
143 * | Monitor .Text / .DATA / .BSS | * 256kb
144 * | Relocated! | *
145 * |--------------------------------|
146 * | Monitor Malloc | * 128kb (contains relocated environment)
147 * |--------------------------------|
148 * | Monitor/kernel STACK | * 64kb
149 * |--------------------------------|
150 * | Page Table for MMU systems | * 2k
151 * |--------------------------------|
152 * | PROM Code accessed from Linux | * 6kb-128b
153 * |--------------------------------|
154 * | Global data (avail from kernel)| * 128b
155 * |--------------------------------|
156 *
157 */
158
159/*
160 * Flash configuration (8,16 or 32 MB)
161 * TEXT base always at 0xFFF00000
162 * ENV_ADDR always at 0xFFF40000
163 * FLASH_BASE at 0xFC000000 for 64 MB
164 * 0xFE000000 for 32 MB
165 * 0xFF000000 for 16 MB
166 * 0xFF800000 for 8 MB
167 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168/*#define CONFIG_SYS_NO_FLASH 1*/
169#define CONFIG_SYS_FLASH_BASE 0x00000000
170#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100171
172#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
174#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100175
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
177#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
178#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
179#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
180#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100181
182/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200184#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100186/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100188/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100190
191/*
192 * Environment settings
193 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200194/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200195#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200196/* CONFIG_ENV_ADDR need to be at sector boundary */
197#define CONFIG_ENV_SIZE 0x8000
198#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100200#define CONFIG_ENV_OVERWRITE 1
201
202/*
203 * Memory map
204 *
205 * Always 4Mb SRAM available
206 * SDRAM module may be available on 0x60000000, SDRAM
207 * is configured as if a 128Mb SDRAM module is available.
208 */
209
210#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#define CONFIG_SYS_SDRAM_BASE 0x40000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100212#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200213#define CONFIG_SYS_SDRAM_BASE 0x60000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100214#endif
215
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_SDRAM_SIZE 0x08000000
217#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100218
219/* 4Mb SRAM available */
220#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221#define CONFIG_SYS_SRAM_BASE 0x40000000
222#define CONFIG_SYS_SRAM_SIZE 0x400000
223#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100224#endif
225
226/* Select RAM used to run U-BOOT from... */
227#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
229#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
230#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100231#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
233#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
234#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100235#endif
236
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200237#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100238
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200239#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200240#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100241
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
243#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100244
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200245#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200246#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
247# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100248#endif
249
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200250#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
251#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
252#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100253
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200254#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
255#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100256
257/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
259#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100260
261/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200262#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100263
264/*
265 * Ethernet configuration uses on board SMC91C111
266 */
Ben Warren7194ab82009-10-04 22:37:03 -0700267#define CONFIG_SMC91111 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100268#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
269#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
270#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
271/*#define CONFIG_SHOW_ACTIVITY*/
272#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
273
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100274#define CONFIG_PHY_ADDR 0x00
275
276/*
277 * Miscellaneous configurable options
278 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200279#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100280#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200281#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100282#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200283#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100284#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200285#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
286#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
287#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100288
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200289#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
290#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100291
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200292#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100293
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100294/*
295 * Various low-level settings
296 */
297
298/*-----------------------------------------------------------------------
299 * USB stuff
300 *-----------------------------------------------------------------------
301 */
302#define CONFIG_USB_CLOCK 0x0001BBBB
303#define CONFIG_USB_CONFIG 0x00005000
304
305/***** Gaisler GRLIB IP-Cores Config ********/
306
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200307#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100308
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100309/* No SDRAM Configuration */
310#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
311
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100312/* See, GRLIB Docs (grip.pdf) on how to set up
313 * These the memory controller registers.
314 */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100315#define CONFIG_SYS_GRLIB_ESA_MCTRL1
316#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100317#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100318#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100319#else
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100320#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100321#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100322#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100323
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100324/* GRLIB FT-MCTRL configuration */
325#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
326#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100327#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100328#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100329#else
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100330#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100331#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100332#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100333
334/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100335#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100336
337/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100338#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100339
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100340/* default kernel command line */
341#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
342
343#endif /* __CONFIG_H */