blob: 66644a9390f9fdb5b34fa1f3f4cc8e8dff058d5f [file] [log] [blame]
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +01001/* Configuration header file for Gaisler GR-XC3S-1500
2 * spartan board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
20
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010021#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
22
23/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020024#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010025
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010026/*
27 * Serial console configuration
28 */
29#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020030#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010031
32/* Partitions */
33#define CONFIG_DOS_PARTITION
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010034#define CONFIG_ISO_PARTITION
35
36/*
37 * Supported commands
38 */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010039#define CONFIG_CMD_REGINFO
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010040#define CONFIG_CMD_DIAG
41#define CONFIG_CMD_IRQ
42
43/*
44 * Autobooting
45 */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010046
47#define CONFIG_PREBOOT "echo;" \
48 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
49 "echo"
50
51#undef CONFIG_BOOTARGS
52
53#define CONFIG_EXTRA_ENV_SETTINGS \
54 "netdev=eth0\0" \
55 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
56 "nfsroot=${serverip}:${rootpath}\0" \
57 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
58 "addip=setenv bootargs ${bootargs} " \
59 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
60 ":${hostname}:${netdev}:off panic=1\0" \
61 "flash_nfs=run nfsargs addip;" \
62 "bootm ${kernel_addr}\0" \
63 "flash_self=run ramargs addip;" \
64 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
65 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
66 "scratch=40200000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000067 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010068 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
69 ""
70
71#define CONFIG_NETMASK 255.255.255.0
72#define CONFIG_GATEWAYIP 192.168.0.1
73#define CONFIG_SERVERIP 192.168.0.20
74#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger8b3637c2011-10-13 13:03:47 +000075#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010076#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000077#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +010078
79#define CONFIG_BOOTCOMMAND "run flash_self"
80
81/* Memory MAP
82 *
83 * Flash:
84 * |--------------------------------|
85 * | 0x00000000 Text & Data & BSS | *
86 * | for Monitor | *
87 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
88 * | UNUSED / Growth | * 256kb
89 * |--------------------------------|
90 * | 0x00050000 Base custom area | *
91 * | kernel / FS | *
92 * | | * Rest of Flash
93 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
94 * | END-0x00008000 Environment | * 32kb
95 * |--------------------------------|
96 *
97 *
98 *
99 * Main Memory:
100 * |--------------------------------|
101 * | UNUSED / scratch area |
102 * | |
103 * | |
104 * | |
105 * | |
106 * |--------------------------------|
107 * | Monitor .Text / .DATA / .BSS | * 256kb
108 * | Relocated! | *
109 * |--------------------------------|
110 * | Monitor Malloc | * 128kb (contains relocated environment)
111 * |--------------------------------|
112 * | Monitor/kernel STACK | * 64kb
113 * |--------------------------------|
114 * | Page Table for MMU systems | * 2k
115 * |--------------------------------|
116 * | PROM Code accessed from Linux | * 6kb-128b
117 * |--------------------------------|
118 * | Global data (avail from kernel)| * 128b
119 * |--------------------------------|
120 *
121 */
122
123/*
124 * Flash configuration (8,16 or 32 MB)
125 * TEXT base always at 0xFFF00000
126 * ENV_ADDR always at 0xFFF40000
127 * FLASH_BASE at 0xFC000000 for 64 MB
128 * 0xFE000000 for 32 MB
129 * 0xFF000000 for 16 MB
130 * 0xFF800000 for 8 MB
131 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132/*#define CONFIG_SYS_NO_FLASH 1*/
133#define CONFIG_SYS_FLASH_BASE 0x00000000
134#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100135
136#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
138#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100139
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
141#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
142#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
143#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
144#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100145
146/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200148#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100150/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100152/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100154
155/*
156 * Environment settings
157 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200158/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200159#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200160/* CONFIG_ENV_ADDR need to be at sector boundary */
161#define CONFIG_ENV_SIZE 0x8000
162#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100164#define CONFIG_ENV_OVERWRITE 1
165
166/*
167 * Memory map
168 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_SDRAM_BASE 0x40000000
170#define CONFIG_SYS_SDRAM_SIZE 0x4000000
171#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100172
173/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#undef CONFIG_SYS_SRAM_BASE
175#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100176
177/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
179#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
180#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100181
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200182#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100183
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200184#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
188#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100189
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200190#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
192# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100193#endif
194
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
196#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
197#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100198
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
200#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100201
202/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
204#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100205
206/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200207#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100208
209/*
210 * Ethernet configuration
211 */
212#define CONFIG_GRETH 1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100213
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100214#define CONFIG_PHY_ADDR 0x00
215
216/*
217 * Miscellaneous configurable options
218 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200219#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100220#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100222#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100224#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200225#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
226#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
227#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100228
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200229#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
230#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100231
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100233
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100234/*
235 * Various low-level settings
236 */
237
238/*-----------------------------------------------------------------------
239 * USB stuff
240 *-----------------------------------------------------------------------
241 */
242#define CONFIG_USB_CLOCK 0x0001BBBB
243#define CONFIG_USB_CONFIG 0x00005000
244
245/***** Gaisler GRLIB IP-Cores Config ********/
246
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100248
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100249/* No SDRAM Configuration */
250#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
251
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100252/* See, GRLIB Docs (grip.pdf) on how to set up
253 * These the memory controller registers.
254 */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100255#define CONFIG_SYS_GRLIB_ESA_MCTRL1
256#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
257#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
258#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100259
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100260/* GRLIB FT-MCTRL configuration */
261#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
262#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
263#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
264#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100265
266/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100267#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100268
269/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100270#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100271
Daniel Hellstrom71d7e4c2008-03-26 23:26:48 +0100272/* default kernel command line */
273#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
274
275#endif /* __CONFIG_H */