commit b095fba59bf2a23d574342f510d920127bda2c73
author sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Sun Feb 13 14:13:04 2005 +0000
committer sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Sun Feb 13 14:13:04 2005 +0000
tree 9fa3bf343e00da679588b460e3b6e0afea966434
parent 3e5a4dc8fdedeb022aca1d5de85bb3164f1a1d7c

Fill in enough cases to run switchback/test_bzip2.c on amd64.


git-svn-id: svn://svn.valgrind.org/vex/trunk@904 8f6e269a-dfd6-0310-a8e1-e2731360e62c

priv/host-amd64/isel.c

diff --git a/priv/host-amd64/isel.c b/priv/host-amd64/isel.c
index f2c0b48..4e235af 100644
--- a/priv/host-amd64/isel.c
+++ b/priv/host-amd64/isel.c
@@ -827,6 +827,8 @@
          switch (e->Iex.Binop.op) {
             case Iop_Shr64: case Iop_Shl64: case Iop_Sar64: 
                break;
+            case Iop_Shl32:
+               break;
 //..             case Iop_Shr8:
 //..                addInstr(env, X86Instr_Alu32R(
 //..                                 Xalu_AND, X86RMI_Imm(0xFF), dst));
@@ -835,6 +837,10 @@
 //..                addInstr(env, X86Instr_Alu32R(
 //..                                 Xalu_AND, X86RMI_Imm(0xFFFF), dst));
 //..                break;
+            case Iop_Shr32:
+               addInstr(env, AMD64Instr_Alu64R(
+                                Aalu_AND, AMD64RMI_Imm(0xFFFFFFFF), dst));
+               break;
 //..             case Iop_Sar8:
 //..                addInstr(env, X86Instr_Sh32(Xsh_SHL, 24, X86RM_Reg(dst)));
 //..                addInstr(env, X86Instr_Sh32(Xsh_SAR, 24, X86RM_Reg(dst)));