Initial support for POWER Processor decimal floating point
instruction support -- VEX side changes. See #295221.
This patch adds test cases. Also adds some minor Memcheck
instrumentation tweaks necessitated by the IR changes.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12476 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/configure.in b/configure.in
index d22871e..623bdc3 100644
--- a/configure.in
+++ b/configure.in
@@ -1070,6 +1070,37 @@
AM_CONDITIONAL(HAS_VSX, test x$ac_have_vsx = xyes)
+AC_MSG_CHECKING([that assembler knows DFP])
+
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
+]], [[
+ __asm__ __volatile__("dadd 1, 2, 3");
+]])], [
+ac_asm_have_dfp=yes
+AC_MSG_RESULT([yes])
+], [
+ac_asm_have_dfp=no
+AC_MSG_RESULT([no])
+])
+
+AC_MSG_CHECKING([that compiler knows -mhard-dfp switch])
+safe_CFLAGS=$CFLAGS
+CFLAGS="-mhard-dfp"
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
+]], [[
+ __asm__ __volatile__("dadd 1, 2, 3");
+]])], [
+ac_gcc_have_dfp=yes
+AC_MSG_RESULT([yes])
+], [
+ac_gcc_have_dfp=no
+AC_MSG_RESULT([no])
+])
+
+-----
+CFLAGS=$safe_CFLAGS
+
+AM_CONDITIONAL(HAS_DFP, test x$ac_asm_have_dfp = xyes -a x$ac_gcc_have_dfp = xyes)
# Check for pthread_create@GLIBC2.0
AC_MSG_CHECKING([for pthread_create@GLIBC2.0()])
diff --git a/memcheck/mc_machine.c b/memcheck/mc_machine.c
index ed99330..3be57a5 100644
--- a/memcheck/mc_machine.c
+++ b/memcheck/mc_machine.c
@@ -193,7 +193,8 @@
if (o == GOF(CIA) && sz == 8) return -1;
if (o == GOF(IP_AT_SYSCALL) && sz == 8) return -1; /* slot unused */
- if (o == GOF(FPROUND) && sz == 4) return -1;
+ if (o == GOF(FPROUND) && sz == 1) return -1;
+ if (o == GOF(DFPROUND) && sz == 1) return -1;
if (o == GOF(EMWARN) && sz == 4) return -1;
if (o == GOF(TISTART) && sz == 8) return -1;
if (o == GOF(TILEN) && sz == 8) return -1;
diff --git a/memcheck/mc_translate.c b/memcheck/mc_translate.c
index 345e46a..ece225e 100644
--- a/memcheck/mc_translate.c
+++ b/memcheck/mc_translate.c
@@ -370,8 +370,11 @@
case Ity_I64:
case Ity_I128: return ty;
case Ity_F32: return Ity_I32;
+ case Ity_D32: return Ity_I32;
case Ity_F64: return Ity_I64;
+ case Ity_D64: return Ity_I64;
case Ity_F128: return Ity_I128;
+ case Ity_D128: return Ity_I128;
case Ity_V128: return Ity_V128;
default: ppIRType(ty);
VG_(tool_panic)("memcheck:shadowTypeV");
@@ -439,6 +442,7 @@
TempKind k;
IRTemp t;
IRType tyE = typeOfIRExpr(mce->sb->tyenv, e);
+
tl_assert(tyE == ty); /* so 'ty' is redundant (!) */
switch (cat) {
case 'V': k = VSh; break;
@@ -2322,18 +2326,26 @@
tl_assert(sameKindedAtoms(atom3,vatom3));
switch (op) {
case Iop_AddF128:
+ case Iop_AddD128:
case Iop_SubF128:
+ case Iop_SubD128:
case Iop_MulF128:
+ case Iop_MulD128:
case Iop_DivF128:
+ case Iop_DivD128:
/* I32(rm) x F128 x F128 -> F128 */
return mkLazy3(mce, Ity_I128, vatom1, vatom2, vatom3);
case Iop_AddF64:
+ case Iop_AddD64:
case Iop_AddF64r32:
case Iop_SubF64:
+ case Iop_SubD64:
case Iop_SubF64r32:
case Iop_MulF64:
+ case Iop_MulD64:
case Iop_MulF64r32:
case Iop_DivF64:
+ case Iop_DivD64:
case Iop_DivF64r32:
case Iop_ScaleF64:
case Iop_Yl2xF64:
@@ -3060,6 +3072,7 @@
return mkLazy2(mce, Ity_I64, vatom1, vatom2);
case Iop_F64HLtoF128:
+ case Iop_D64HLtoD128:
return assignNew('V', mce, Ity_I128, binop(Iop_64HLto128, vatom1, vatom2));
case Iop_F64toI32U:
@@ -3349,8 +3362,10 @@
return assignNew('V', mce, Ity_V128, unop(op, vatom));
case Iop_F128HItoF64: /* F128 -> high half of F128 */
+ case Iop_D128HItoD64: /* D128 -> high half of D128 */
return assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, vatom));
case Iop_F128LOtoF64: /* F128 -> low half of F128 */
+ case Iop_D128LOtoD64: /* D128 -> low half of D128 */
return assignNew('V', mce, Ity_I64, unop(Iop_128to64, vatom));
case Iop_NegF128:
diff --git a/none/tests/ppc32/Makefile.am b/none/tests/ppc32/Makefile.am
index c04d9ee..6c8a52a 100644
--- a/none/tests/ppc32/Makefile.am
+++ b/none/tests/ppc32/Makefile.am
@@ -29,7 +29,8 @@
power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest \
test_isa_2_06_part2.stderr.exp test_isa_2_06_part2.stdout.exp test_isa_2_06_part2.vgtest \
- test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest
+ test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest \
+ test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest
check_PROGRAMS = \
allexec \
@@ -39,7 +40,9 @@
testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \
test_isa_2_06_part1 \
test_isa_2_06_part2 \
- test_isa_2_06_part3
+ test_isa_2_06_part3 \
+ test_dfp1
+
AM_CFLAGS += @FLAG_M32@
AM_CXXFLAGS += @FLAG_M32@
@@ -61,6 +64,14 @@
VSX_FLAG =
endif
+if HAS_DFP
+BUILD_FLAGS_DFP = -mhard-dfp -mcpu=power6
+DFP_FLAG = -DHAS_DFP
+else
+BUILD_FLAGS_DFP =
+DFP_FLAG =
+endif
+
jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \
@FLAG_M32@ $(ALTIVEC_FLAG)
@@ -76,3 +87,5 @@
test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(VSX_FLAG) \
@FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
+test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \
+ @FLAG_M32@ $(BUILD_FLAGS_DFP)
diff --git a/none/tests/ppc32/test_dfp1.c b/none/tests/ppc32/test_dfp1.c
new file mode 100644
index 0000000..40c3a10
--- /dev/null
+++ b/none/tests/ppc32/test_dfp1.c
@@ -0,0 +1,504 @@
+/* Copyright (C) 2012 IBM
+
+ Author: Maynard Johnson <maynardj@us.ibm.com>
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+#if defined(HAS_DFP)
+
+register double f14 __asm__ ("fr14");
+register double f15 __asm__ ("fr15");
+register double f16 __asm__ ("fr16");
+register double f17 __asm__ ("fr17");
+register double f18 __asm__ ("fr18");
+register double f19 __asm__ ("fr19");
+
+
+typedef unsigned char Bool;
+#define True 1
+#define False 0
+
+
+#define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7"
+
+#define SET_CR(_arg) \
+ __asm__ __volatile__ ("mtcr %0" : : "b"(_arg) : ALLCR );
+
+#define SET_XER(_arg) \
+ __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" );
+
+#define GET_CR(_lval) \
+ __asm__ __volatile__ ("mfcr %0" : "=b"(_lval) )
+
+#define GET_XER(_lval) \
+ __asm__ __volatile__ ("mfxer %0" : "=b"(_lval) )
+
+#define GET_CR_XER(_lval_cr,_lval_xer) \
+ do { GET_CR(_lval_cr); GET_XER(_lval_xer); } while (0)
+
+#define SET_CR_ZERO \
+ SET_CR(0)
+
+#define SET_XER_ZERO \
+ SET_XER(0)
+
+#define SET_CR_XER_ZERO \
+ do { SET_CR_ZERO; SET_XER_ZERO; } while (0)
+
+#define SET_FPSCR_ZERO \
+ do { double _d = 0.0; \
+ __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \
+ } while (0)
+
+#define GET_FPSCR(_arg) \
+ __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
+
+#define SET_FPSCR_DRN \
+ __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) )
+
+
+// The assembly-level instructions being tested
+static Bool do_dot;
+static void _test_dadd (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("dadd. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("dadd %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+static void _test_dsub (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("dsub. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("dsub %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+static void _test_dmul (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("dmul. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("dmul %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+static void _test_ddiv (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("ddiv. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("ddiv %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+// Quad DFP arith instructions
+static void _test_daddq (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("daddq. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("daddq %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+static void _test_dsubq (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("dsubq. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("dsubq %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+static void _test_dmulq (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("dmulq. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("dmulq %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+static void _test_ddivq (void)
+{
+ if (do_dot)
+ __asm__ __volatile__ ("ddivq. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+ else
+ __asm__ __volatile__ ("ddivq %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16));
+}
+
+static void _test_mffs (void)
+{
+ __asm__ __volatile__ ("mffs %0" : "=f"(f14));
+}
+
+static void _test_mtfsf (int upper)
+{
+ if (upper)
+ __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) );
+ else
+ __asm__ __volatile__ ("mtfsf 1, %0, 0, 0" : : "f"(f14) );
+}
+
+typedef void (*test_func_t)(void);
+typedef struct test_table
+{
+ test_func_t test_category;
+ char * name;
+} test_table_t;
+
+/*
+ * 345.0DD (0x2207c00000000000 0xe50)
+ * 1.2300e+5DD (0x2207c00000000000 0x14c000)
+ * -16.0DD (0xa207c00000000000 0xe0)
+ * 0.00189DD (0x2206c00000000000 0xcf)
+ * -4.1235DD (0xa205c00000000000 0x10a395bcf)
+ * 9.8399e+20DD (0x2209400000000000 0x253f1f534acdd4)
+ * 0DD (0x2208000000000000 0x0)
+ * 0DD (0x2208000000000000 0x0)
+ * infDD (0x7800000000000000 0x0)
+ * nanDD (0x7c00000000000000 0x0
+ */
+static unsigned long long dfp128_vals[] = {
+ // Some finite numbers
+ 0x2207c00000000000ULL, 0x0000000000000e50ULL,
+ 0x2207c00000000000ULL, 0x000000000014c000ULL,
+ 0xa207c00000000000ULL, 0x00000000000000e0ULL,
+ 0x2206c00000000000ULL, 0x00000000000000cfULL,
+ 0xa205c00000000000ULL, 0x000000010a395bcfULL,
+ 0x6209400000fd0000ULL, 0x00253f1f534acdd4ULL, // huge number
+ 0x000400000089b000ULL, 0x0a6000d000000049ULL, // very small number
+ // flavors of zero
+ 0x2208000000000000ULL, 0x0000000000000000ULL,
+ 0xa208000000000000ULL, 0x0000000000000000ULL, // negative
+ 0xa248000000000000ULL, 0x0000000000000000ULL,
+ // flavors of NAN
+ 0x7c00000000000000ULL, 0x0000000000000000ULL, // quiet
+ 0xfc00000000000000ULL, 0xc00100035b007700ULL,
+ 0x7e00000000000000ULL, 0xfe000000d0e0a0d0ULL, // signaling
+ // flavors of Infinity
+ 0x7800000000000000ULL, 0x0000000000000000ULL,
+ 0xf800000000000000ULL, 0x0000000000000000ULL, // negative
+ 0xf900000000000000ULL, 0x0000000000000000ULL
+};
+
+static unsigned long long dfp64_vals[] = {
+ // various finite numbers
+ 0x2234000000000e50ULL,
+ 0x223400000014c000ULL,
+ 0xa2340000000000e0ULL,// negative
+ 0x22240000000000cfULL,
+ 0xa21400010a395bcfULL,// negative
+ 0x6e4d3f1f534acdd4ULL,// huge number
+ 0x000400000089b000ULL,// very small number
+ // flavors of zero
+ 0x2238000000000000ULL,
+ 0xa238000000000000ULL,
+ 0x4248000000000000ULL,
+ // flavors of NAN
+ 0x7e34000000000111ULL,
+ 0xfe000000d0e0a0d0ULL,//signaling
+ 0xfc00000000000000ULL,//quiet
+ // flavors of Infinity
+ 0x7800000000000000ULL,
+ 0xf800000000000000ULL,//negative
+ 0x7a34000000000000ULL,
+};
+
+
+typedef struct dfp_test_args {
+ int fra_idx;
+ int frb_idx;
+} dfp_test_args_t;
+
+
+// Index pairs from dfp64_vals or dfp128_vals array to be used with dfp_two_arg_tests
+static dfp_test_args_t dfp_2args_x2[] = {
+ {0, 1},
+ {2, 1},
+ {3, 4},
+ {0, 6},
+ {2, 4},
+ {5, 1},
+ {5, 2},
+ {7, 8},
+ {7, 1},
+ {9, 15},
+ {8, 12},
+ {7, 11},
+ {13, 2},
+ {13, 14},
+ {15, 12},
+ {14, 11},
+ {12, 12},
+ {12, 11},
+ {11, 11}
+};
+
+// Index pairs from dfp64_vals array to be used with dfp_two_arg_tests
+static dfp_test_args_t dfp_2args_x1[] = {
+ {0, 1},
+ {2, 1},
+ {3, 4},
+ {0, 6},
+ {2, 4},
+ {5, 1},
+ {5, 2},
+ {7, 1},
+ {7, 2},
+ {8, 0},
+ {8, 1},
+ {8, 2},
+ {7, 8},
+ {12, 14},
+ {12, 1},
+ {12, 13},
+ {12, 12},
+ {12, 11},
+ {11, 14},
+ {11, 0},
+ {11, 13},
+ {11, 11},
+ {14, 14},
+ {14, 3},
+ {14, 15},
+};
+
+typedef enum {
+ LONG_TEST,
+ QUAD_TEST
+} precision_type_t;
+
+typedef struct dfp_test
+{
+ test_func_t test_func;
+ const char * name;
+ dfp_test_args_t * targs;
+ int num_tests;
+ precision_type_t precision;
+ const char * op;
+ Bool cr_supported;
+} dfp_test_t;
+
+
+static dfp_test_t
+dfp_two_arg_tests[] = {
+ { &_test_dadd, "dadd", dfp_2args_x1, 25, LONG_TEST, "+", False},
+ { &_test_dsub, "dsub", dfp_2args_x1, 25, LONG_TEST, "-", False},
+ { &_test_dmul, "dmul", dfp_2args_x2, 19, LONG_TEST, "*", False},
+ { &_test_ddiv, "ddiv", dfp_2args_x2, 19, LONG_TEST, "/", False},
+ { &_test_daddq, "daddq", dfp_2args_x1, 25, QUAD_TEST, "+", False},
+ { &_test_dsubq, "dsubq", dfp_2args_x1, 25, QUAD_TEST, "-", False},
+ { &_test_dmulq, "dmulq", dfp_2args_x2, 19, QUAD_TEST, "*", False},
+ { &_test_ddivq, "ddivq", dfp_2args_x2, 19, QUAD_TEST, "/", False},
+ { NULL, NULL, NULL, 0, 0, NULL}
+};
+
+static void test_dfp_two_arg_ops(void)
+{
+ test_func_t func;
+ unsigned long long u0, u0x, u1, u1x;
+ double res, d0, d1, *d0p, *d1p;
+ double d0x, d1x, *d0xp, *d1xp;
+ int k = 0;
+ u0x = u1x = 0;
+ d0p = &d0;
+ d0xp = &d0x;
+ d1p = &d1;
+ d1xp = &d1x;
+
+ while ((func = dfp_two_arg_tests[k].test_func)) {
+ int i, repeat = 1;
+ dfp_test_t test_group = dfp_two_arg_tests[k];
+ do_dot = False;
+
+again:
+ for (i = 0; i < test_group.num_tests; i++) {
+ unsigned int condreg;
+ unsigned int flags;
+
+ if (test_group.precision == LONG_TEST) {
+ u0 = dfp64_vals[test_group.targs[i].fra_idx];
+ u1 = dfp64_vals[test_group.targs[i].frb_idx];
+ } else {
+ u0 = dfp128_vals[test_group.targs[i].fra_idx * 2];
+ u0x = dfp128_vals[(test_group.targs[i].fra_idx * 2) + 1];
+ u1 = dfp128_vals[test_group.targs[i].frb_idx * 2];
+ u1x = dfp128_vals[(test_group.targs[i].frb_idx * 2) + 1];
+ }
+ *(unsigned long long *)d0p = u0;
+ *(unsigned long long *)d1p = u1;
+ f14 = d0;
+ f16 = d1;
+ if (test_group.precision == QUAD_TEST) {
+ *(unsigned long long *)d0xp = u0x;
+ *(unsigned long long *)d1xp = u1x;
+ f15 = d0x;
+ f17 = d1x;
+ }
+
+ SET_FPSCR_ZERO;
+ SET_CR_XER_ZERO;
+ (*func)();
+ GET_CR(flags);
+ res = f18;
+
+ condreg = (flags & 0x000000f0) >> 4;
+ printf("%s%s %016llx", test_group.name, do_dot? "." : "", u0);
+ if (test_group.precision == LONG_TEST) {
+ printf(" %s %016llx => %016llx",
+ test_group.op, u1, *((unsigned long long *)(&res)));
+ } else {
+ double resx = f19;
+ printf(" %016llx %s %016llx %016llx ==> %016llx %016llx",
+ u0x, test_group.op, u1, u1x,
+ *((unsigned long long *)(&res)), *((unsigned long long *)(&resx)));
+ }
+ if (test_group.cr_supported)
+ printf(" (cr = %08x)\n", condreg);
+ else
+ printf("\n");
+
+ }
+ printf("\n");
+ if (repeat) {
+ repeat = 0;
+ do_dot = True;
+ goto again;
+ }
+ k++;
+ printf( "\n" );
+ }
+}
+
+void test_move_toFrom_fpscr(void)
+{
+#define BFP_MAX_RM 3
+ int shift = 0;
+ unsigned long long i, max_rm, expected_val;
+ double fpscr_in, fpscr_out;
+ unsigned long long * hex_fpscr_in = (unsigned long long *)&fpscr_in;
+ unsigned long long * hex_fpscr_out = (unsigned long long *)&fpscr_out;
+
+
+ max_rm = 4;
+again:
+ /* NOTE: The first time through this loop is for setting the binary
+ * floating point rounding mode (bits 62:63 of FPSCR). The second time
+ * through is for setting the decimal floating point rounding mode
+ * (bits 29:31 of FPSCR). In the second time through this loop, the value
+ * returned should include the final binary FP rounding mode, along with
+ * the decimal FP rounding modes.
+ */
+ for (i = 0; i < max_rm; i++) {
+ *hex_fpscr_in = (i << shift);
+ f14 = fpscr_in;
+ _test_mtfsf(max_rm/8);
+ *hex_fpscr_in = 0ULL;
+ f14= fpscr_in;
+ _test_mffs();
+ fpscr_out = f14;
+ if (max_rm == 4) {
+ *hex_fpscr_out &= (max_rm - 1) << shift;
+ expected_val = i << shift;
+ } else {
+ *hex_fpscr_out &= BFP_MAX_RM | ((max_rm - 1) << shift);
+ expected_val = (i << shift) | BFP_MAX_RM;
+ }
+
+ printf("FPSCR %s floating point rounding mode %016llx == %016llx? %s\n",
+ (max_rm == 8) ? "decimal" : "binary",
+ *hex_fpscr_out, expected_val,
+ (expected_val == *hex_fpscr_out) ? "yes" : "no");
+ }
+ if (max_rm == 4) {
+ max_rm = 8;
+ shift = 32;
+ goto again;
+ }
+}
+
+void test_rounding_modes(void)
+{
+ int j;
+ unsigned long long u0, u1, rm_idx;
+ double res, d0, d1, *d0p, *d1p, fpscr;
+ unsigned long long * hex_fpscr = (unsigned long long *)&fpscr;
+ u0 = 0x26cc3f1f534acdd4ULL;
+ u1 = 0x27feff197a42ba06ULL;
+ d0p = &d0;
+ d1p = &d1;
+
+ for (j = 0; j < 12; j++) {
+ for (rm_idx = 0; rm_idx < 8; rm_idx++) {
+ *hex_fpscr = 0ULL;
+ __asm__ __volatile__ ("mffs %0" : "=f"(f14));
+ fpscr = f14;
+ *hex_fpscr &= 0xFFFFFFF0FFFFFFFFULL;
+ *hex_fpscr |= (rm_idx << 32);
+ f14 = fpscr;
+ SET_FPSCR_DRN;
+ *(unsigned long long *)d0p = u0;
+ *(unsigned long long *)d1p = u1;
+ f14 = d0;
+ f16 = d1;
+ _test_dmul();
+ res = f18;
+ printf("test #%d: dmul with rounding mode %d: %016llx * %016llx => %016llx\n",
+ j, (int)rm_idx, u0, u1, *((unsigned long long *)(&res)));
+ printf("\n");
+ }
+ // Changing the least significant bit of one of the dmul arguments give us more
+ // opportunities for different rounding modes to yield different results which
+ // can then be validated.
+ u0++;
+ }
+}
+
+static test_table_t
+ all_tests[] =
+{
+ { &test_dfp_two_arg_ops,
+ "Test DFP arithmetic instructions"},
+ { &test_rounding_modes,
+ "Test DFP rounding modes"},
+ { &test_move_toFrom_fpscr,
+ "Test move to/from FPSCR"},
+ { NULL, NULL }
+};
+#endif // HAS_DFP
+
+int main() {
+#if defined(HAS_DFP)
+
+ test_table_t aTest;
+ test_func_t func;
+ int i = 0;
+
+ while ((func = all_tests[i].test_category)) {
+ aTest = all_tests[i];
+ printf( "%s\n", aTest.name );
+ (*func)();
+ i++;
+ }
+
+#endif // HAS_DFP
+ return 0;
+}
diff --git a/none/tests/ppc32/test_dfp1.stderr.exp b/none/tests/ppc32/test_dfp1.stderr.exp
new file mode 100644
index 0000000..139597f
--- /dev/null
+++ b/none/tests/ppc32/test_dfp1.stderr.exp
@@ -0,0 +1,2 @@
+
+
diff --git a/none/tests/ppc32/test_dfp1.stdout.exp b/none/tests/ppc32/test_dfp1.stdout.exp
new file mode 100644
index 0000000..614895d
--- /dev/null
+++ b/none/tests/ppc32/test_dfp1.stdout.exp
@@ -0,0 +1,583 @@
+Test DFP arithmetic instructions
+dadd 2234000000000e50 + 223400000014c000 => 223400000014ce50
+dadd a2340000000000e0 + 223400000014c000 => 223400000014a44c
+dadd 22240000000000cf + a21400010a395bcf => a21400010a1b9bcf
+dadd 2234000000000e50 + 000400000089b000 => 2e06500000000000
+dadd a2340000000000e0 + a21400010a395bcf => a21400080a395bcf
+dadd 6e4d3f1f534acdd4 + 223400000014c000 => 6e4d3f1f534acdd5
+dadd 6e4d3f1f534acdd4 + a2340000000000e0 => 6e4d3f1f534acdd4
+dadd 2238000000000000 + 223400000014c000 => 223400000014c000
+dadd 2238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd a238000000000000 + 2234000000000e50 => 2234000000000e50
+dadd a238000000000000 + 223400000014c000 => 223400000014c000
+dadd a238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd 2238000000000000 + a238000000000000 => 2238000000000000
+dadd fc00000000000000 + f800000000000000 => fc00000000000000
+dadd fc00000000000000 + 223400000014c000 => fc00000000000000
+dadd fc00000000000000 + 7800000000000000 => fc00000000000000
+dadd fc00000000000000 + fc00000000000000 => fc00000000000000
+dadd fc00000000000000 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + f800000000000000 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + 2234000000000e50 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + 7800000000000000 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd f800000000000000 + f800000000000000 => f800000000000000
+dadd f800000000000000 + 22240000000000cf => f800000000000000
+dadd f800000000000000 + 7a34000000000000 => 7c00000000000000
+
+dadd. 2234000000000e50 + 223400000014c000 => 223400000014ce50
+dadd. a2340000000000e0 + 223400000014c000 => 223400000014a44c
+dadd. 22240000000000cf + a21400010a395bcf => a21400010a1b9bcf
+dadd. 2234000000000e50 + 000400000089b000 => 2e06500000000000
+dadd. a2340000000000e0 + a21400010a395bcf => a21400080a395bcf
+dadd. 6e4d3f1f534acdd4 + 223400000014c000 => 6e4d3f1f534acdd5
+dadd. 6e4d3f1f534acdd4 + a2340000000000e0 => 6e4d3f1f534acdd4
+dadd. 2238000000000000 + 223400000014c000 => 223400000014c000
+dadd. 2238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd. a238000000000000 + 2234000000000e50 => 2234000000000e50
+dadd. a238000000000000 + 223400000014c000 => 223400000014c000
+dadd. a238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd. 2238000000000000 + a238000000000000 => 2238000000000000
+dadd. fc00000000000000 + f800000000000000 => fc00000000000000
+dadd. fc00000000000000 + 223400000014c000 => fc00000000000000
+dadd. fc00000000000000 + 7800000000000000 => fc00000000000000
+dadd. fc00000000000000 + fc00000000000000 => fc00000000000000
+dadd. fc00000000000000 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + f800000000000000 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + 2234000000000e50 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + 7800000000000000 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd. f800000000000000 + f800000000000000 => f800000000000000
+dadd. f800000000000000 + 22240000000000cf => f800000000000000
+dadd. f800000000000000 + 7a34000000000000 => 7c00000000000000
+
+
+dsub 2234000000000e50 - 223400000014c000 => a234000000149ad0
+dsub a2340000000000e0 - 223400000014c000 => a23400000014c0e0
+dsub 22240000000000cf - a21400010a395bcf => 221400010a571bcf
+dsub 2234000000000e50 - 000400000089b000 => 2e06500000000000
+dsub a2340000000000e0 - a21400010a395bcf => a214000477cb0d11
+dsub 6e4d3f1f534acdd4 - 223400000014c000 => 6e4d3f1f534acdd3
+dsub 6e4d3f1f534acdd4 - a2340000000000e0 => 6e4d3f1f534acdd4
+dsub 2238000000000000 - 223400000014c000 => a23400000014c000
+dsub 2238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub a238000000000000 - 2234000000000e50 => a234000000000e50
+dsub a238000000000000 - 223400000014c000 => a23400000014c000
+dsub a238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub 2238000000000000 - a238000000000000 => 2238000000000000
+dsub fc00000000000000 - f800000000000000 => fc00000000000000
+dsub fc00000000000000 - 223400000014c000 => fc00000000000000
+dsub fc00000000000000 - 7800000000000000 => fc00000000000000
+dsub fc00000000000000 - fc00000000000000 => fc00000000000000
+dsub fc00000000000000 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - f800000000000000 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - 2234000000000e50 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - 7800000000000000 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub f800000000000000 - f800000000000000 => 7c00000000000000
+dsub f800000000000000 - 22240000000000cf => f800000000000000
+dsub f800000000000000 - 7a34000000000000 => f800000000000000
+
+dsub. 2234000000000e50 - 223400000014c000 => a234000000149ad0
+dsub. a2340000000000e0 - 223400000014c000 => a23400000014c0e0
+dsub. 22240000000000cf - a21400010a395bcf => 221400010a571bcf
+dsub. 2234000000000e50 - 000400000089b000 => 2e06500000000000
+dsub. a2340000000000e0 - a21400010a395bcf => a214000477cb0d11
+dsub. 6e4d3f1f534acdd4 - 223400000014c000 => 6e4d3f1f534acdd3
+dsub. 6e4d3f1f534acdd4 - a2340000000000e0 => 6e4d3f1f534acdd4
+dsub. 2238000000000000 - 223400000014c000 => a23400000014c000
+dsub. 2238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub. a238000000000000 - 2234000000000e50 => a234000000000e50
+dsub. a238000000000000 - 223400000014c000 => a23400000014c000
+dsub. a238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub. 2238000000000000 - a238000000000000 => 2238000000000000
+dsub. fc00000000000000 - f800000000000000 => fc00000000000000
+dsub. fc00000000000000 - 223400000014c000 => fc00000000000000
+dsub. fc00000000000000 - 7800000000000000 => fc00000000000000
+dsub. fc00000000000000 - fc00000000000000 => fc00000000000000
+dsub. fc00000000000000 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - f800000000000000 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - 2234000000000e50 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - 7800000000000000 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub. f800000000000000 - f800000000000000 => 7c00000000000000
+dsub. f800000000000000 - 22240000000000cf => f800000000000000
+dsub. f800000000000000 - 7a34000000000000 => f800000000000000
+
+
+dmul 2234000000000e50 * 223400000014c000 => 22300001143a0000
+dmul a2340000000000e0 * 223400000014c000 => a23000000fa03000
+dmul 22240000000000cf * a21400010a395bcf => a20000fe5b36cca1
+dmul 2234000000000e50 * 000400000089b000 => 0000000c28a03000
+dmul a2340000000000e0 * a21400010a395bcf => 221000d67d31a940
+dmul 6e4d3f1f534acdd4 * 223400000014c000 => 266510610e1d3703
+dmul 6e4d3f1f534acdd4 * a2340000000000e0 => a656f47e5fba95b7
+dmul 2238000000000000 * a238000000000000 => a238000000000000
+dmul 2238000000000000 * 223400000014c000 => 2234000000000000
+dmul 4248000000000000 * 7a34000000000000 => 7c00000000000000
+dmul a238000000000000 * fc00000000000000 => fc00000000000000
+dmul 2238000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul 7800000000000000 * a2340000000000e0 => f800000000000000
+dmul 7800000000000000 * f800000000000000 => f800000000000000
+dmul 7a34000000000000 * fc00000000000000 => fc00000000000000
+dmul f800000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul fc00000000000000 * fc00000000000000 => fc00000000000000
+dmul fc00000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul fe000000d0e0a0d0 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+dmul. 2234000000000e50 * 223400000014c000 => 22300001143a0000
+dmul. a2340000000000e0 * 223400000014c000 => a23000000fa03000
+dmul. 22240000000000cf * a21400010a395bcf => a20000fe5b36cca1
+dmul. 2234000000000e50 * 000400000089b000 => 0000000c28a03000
+dmul. a2340000000000e0 * a21400010a395bcf => 221000d67d31a940
+dmul. 6e4d3f1f534acdd4 * 223400000014c000 => 266510610e1d3703
+dmul. 6e4d3f1f534acdd4 * a2340000000000e0 => a656f47e5fba95b7
+dmul. 2238000000000000 * a238000000000000 => a238000000000000
+dmul. 2238000000000000 * 223400000014c000 => 2234000000000000
+dmul. 4248000000000000 * 7a34000000000000 => 7c00000000000000
+dmul. a238000000000000 * fc00000000000000 => fc00000000000000
+dmul. 2238000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul. 7800000000000000 * a2340000000000e0 => f800000000000000
+dmul. 7800000000000000 * f800000000000000 => f800000000000000
+dmul. 7a34000000000000 * fc00000000000000 => fc00000000000000
+dmul. f800000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul. fc00000000000000 * fc00000000000000 => fc00000000000000
+dmul. fc00000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul. fe000000d0e0a0d0 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+
+ddiv 2234000000000e50 / 223400000014c000 => 29f20ccf848e2a4e
+ddiv a2340000000000e0 / 223400000014c000 => a5ed80474082c00b
+ddiv 22240000000000cf / a21400010a395bcf => b1eeabacabd62ac3
+ddiv 2234000000000e50 / 000400000089b000 => 7800000000000000
+ddiv a2340000000000e0 / a21400010a395bcf => 2dfc0e4e6a205575
+ddiv 6e4d3f1f534acdd4 / 223400000014c000 => 3e38ff87d92ca3c3
+ddiv 6e4d3f1f534acdd4 / a2340000000000e0 => ba48c92fea1aadc6
+ddiv 2238000000000000 / a238000000000000 => 7c00000000000000
+ddiv 2238000000000000 / 223400000014c000 => 223c000000000000
+ddiv 4248000000000000 / 7a34000000000000 => 0000000000000000
+ddiv a238000000000000 / fc00000000000000 => fc00000000000000
+ddiv 2238000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv 7800000000000000 / a2340000000000e0 => f800000000000000
+ddiv 7800000000000000 / f800000000000000 => 7c00000000000000
+ddiv 7a34000000000000 / fc00000000000000 => fc00000000000000
+ddiv f800000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv fc00000000000000 / fc00000000000000 => fc00000000000000
+ddiv fc00000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv fe000000d0e0a0d0 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+ddiv. 2234000000000e50 / 223400000014c000 => 29f20ccf848e2a4e
+ddiv. a2340000000000e0 / 223400000014c000 => a5ed80474082c00b
+ddiv. 22240000000000cf / a21400010a395bcf => b1eeabacabd62ac3
+ddiv. 2234000000000e50 / 000400000089b000 => 7800000000000000
+ddiv. a2340000000000e0 / a21400010a395bcf => 2dfc0e4e6a205575
+ddiv. 6e4d3f1f534acdd4 / 223400000014c000 => 3e38ff87d92ca3c3
+ddiv. 6e4d3f1f534acdd4 / a2340000000000e0 => ba48c92fea1aadc6
+ddiv. 2238000000000000 / a238000000000000 => 7c00000000000000
+ddiv. 2238000000000000 / 223400000014c000 => 223c000000000000
+ddiv. 4248000000000000 / 7a34000000000000 => 0000000000000000
+ddiv. a238000000000000 / fc00000000000000 => fc00000000000000
+ddiv. 2238000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv. 7800000000000000 / a2340000000000e0 => f800000000000000
+ddiv. 7800000000000000 / f800000000000000 => 7c00000000000000
+ddiv. 7a34000000000000 / fc00000000000000 => fc00000000000000
+ddiv. f800000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv. fc00000000000000 / fc00000000000000 => fc00000000000000
+ddiv. fc00000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv. fe000000d0e0a0d0 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+
+daddq 2207c00000000000 0000000000000e50 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014ce50
+daddq a207c00000000000 00000000000000e0 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014a44c
+daddq 2206c00000000000 00000000000000cf + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000010a1b9bcf
+daddq 2207c00000000000 0000000000000e50 + 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+daddq a207c00000000000 00000000000000e0 + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000080a395bcf
+daddq 6209400000fd0000 00253f1f534acdd4 + 2207c00000000000 000000000014c000 ==> 2601130000000000 0000000000000000
+daddq 6209400000fd0000 00253f1f534acdd4 + a207c00000000000 00000000000000e0 ==> a600300000000000 0000000000000000
+daddq 2208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq 2208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq a208000000000000 0000000000000000 + 2207c00000000000 0000000000000e50 ==> 2207c00000000000 0000000000000e50
+daddq a208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq a208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq 2208000000000000 0000000000000000 + a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+daddq 7e00000000000000 fe000000d0e0a0d0 + f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq fc00000000000000 c00100035b007700 + f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq fc00000000000000 c00100035b007700 + 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+daddq fc00000000000000 c00100035b007700 + 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq fc00000000000000 c00100035b007700 + fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+daddq f800000000000000 0000000000000000 + f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+daddq f800000000000000 0000000000000000 + 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+daddq f800000000000000 0000000000000000 + f900000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+
+daddq. 2207c00000000000 0000000000000e50 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014ce50
+daddq. a207c00000000000 00000000000000e0 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014a44c
+daddq. 2206c00000000000 00000000000000cf + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000010a1b9bcf
+daddq. 2207c00000000000 0000000000000e50 + 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+daddq. a207c00000000000 00000000000000e0 + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000080a395bcf
+daddq. 6209400000fd0000 00253f1f534acdd4 + 2207c00000000000 000000000014c000 ==> 2601130000000000 0000000000000000
+daddq. 6209400000fd0000 00253f1f534acdd4 + a207c00000000000 00000000000000e0 ==> a600300000000000 0000000000000000
+daddq. 2208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq. 2208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq. a208000000000000 0000000000000000 + 2207c00000000000 0000000000000e50 ==> 2207c00000000000 0000000000000e50
+daddq. a208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq. a208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq. 2208000000000000 0000000000000000 + a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+daddq. 7e00000000000000 fe000000d0e0a0d0 + f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. fc00000000000000 c00100035b007700 + f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq. fc00000000000000 c00100035b007700 + 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+daddq. fc00000000000000 c00100035b007700 + 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq. fc00000000000000 c00100035b007700 + fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+daddq. f800000000000000 0000000000000000 + f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+daddq. f800000000000000 0000000000000000 + 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+daddq. f800000000000000 0000000000000000 + f900000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+
+
+dsubq 2207c00000000000 0000000000000e50 - 2207c00000000000 000000000014c000 ==> a207c00000000000 0000000000149ad0
+dsubq a207c00000000000 00000000000000e0 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c0e0
+dsubq 2206c00000000000 00000000000000cf - a205c00000000000 000000010a395bcf ==> 2205c00000000000 000000010a571bcf
+dsubq 2207c00000000000 0000000000000e50 - 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+dsubq a207c00000000000 00000000000000e0 - a205c00000000000 000000010a395bcf ==> a205c00000000000 0000000477cb0d11
+dsubq 6209400000fd0000 00253f1f534acdd4 - 2207c00000000000 000000000014c000 ==> a601130000000000 0000000000000000
+dsubq 6209400000fd0000 00253f1f534acdd4 - a207c00000000000 00000000000000e0 ==> 2600300000000000 0000000000000000
+dsubq 2208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq 2208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq a208000000000000 0000000000000000 - 2207c00000000000 0000000000000e50 ==> a207c00000000000 0000000000000e50
+dsubq a208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq a208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq 2208000000000000 0000000000000000 - a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+dsubq 7e00000000000000 fe000000d0e0a0d0 - f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq fc00000000000000 c00100035b007700 - f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq fc00000000000000 c00100035b007700 - 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+dsubq fc00000000000000 c00100035b007700 - 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq fc00000000000000 c00100035b007700 - fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dsubq f800000000000000 0000000000000000 - f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dsubq f800000000000000 0000000000000000 - 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+dsubq f800000000000000 0000000000000000 - f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+
+dsubq. 2207c00000000000 0000000000000e50 - 2207c00000000000 000000000014c000 ==> a207c00000000000 0000000000149ad0
+dsubq. a207c00000000000 00000000000000e0 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c0e0
+dsubq. 2206c00000000000 00000000000000cf - a205c00000000000 000000010a395bcf ==> 2205c00000000000 000000010a571bcf
+dsubq. 2207c00000000000 0000000000000e50 - 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+dsubq. a207c00000000000 00000000000000e0 - a205c00000000000 000000010a395bcf ==> a205c00000000000 0000000477cb0d11
+dsubq. 6209400000fd0000 00253f1f534acdd4 - 2207c00000000000 000000000014c000 ==> a601130000000000 0000000000000000
+dsubq. 6209400000fd0000 00253f1f534acdd4 - a207c00000000000 00000000000000e0 ==> 2600300000000000 0000000000000000
+dsubq. 2208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq. 2208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq. a208000000000000 0000000000000000 - 2207c00000000000 0000000000000e50 ==> a207c00000000000 0000000000000e50
+dsubq. a208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq. a208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq. 2208000000000000 0000000000000000 - a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. fc00000000000000 c00100035b007700 - f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq. fc00000000000000 c00100035b007700 - 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+dsubq. fc00000000000000 c00100035b007700 - 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq. fc00000000000000 c00100035b007700 - fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dsubq. f800000000000000 0000000000000000 - f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dsubq. f800000000000000 0000000000000000 - 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+dsubq. f800000000000000 0000000000000000 - f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+
+
+dmulq 2207c00000000000 0000000000000e50 * 2207c00000000000 000000000014c000 ==> 2207800000000000 00000001143a0000
+dmulq a207c00000000000 00000000000000e0 * 2207c00000000000 000000000014c000 ==> a207800000000000 000000000fa03000
+dmulq 2206c00000000000 00000000000000cf * a205c00000000000 000000010a395bcf ==> a204800000000000 000000fe5b36cca1
+dmulq 2207c00000000000 0000000000000e50 * 000400000089b000 0a6000d000000049 ==> 0003c007dd9d007e b20908000003a450
+dmulq a207c00000000000 00000000000000e0 * a205c00000000000 000000010a395bcf ==> 2205800000000000 000000d67d31a940
+dmulq 6209400000fd0000 00253f1f534acdd4 * 2207c00000000000 000000000014c000 ==> 660a84c004da6c00 004883107189d825
+dmulq 6209400000fd0000 00253f1f534acdd4 * a207c00000000000 00000000000000e0 ==> 8609d0a000d57800 0006f47e5fba95b7
+dmulq 2208000000000000 0000000000000000 * a208000000000000 0000000000000000 ==> a208000000000000 0000000000000000
+dmulq 2208000000000000 0000000000000000 * 2207c00000000000 000000000014c000 ==> 2207c00000000000 0000000000000000
+dmulq a248000000000000 0000000000000000 * f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dmulq a208000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq 2208000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq 7800000000000000 0000000000000000 * a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+dmulq 7800000000000000 0000000000000000 * f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+dmulq f900000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq f800000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq 7e00000000000000 fe000000d0e0a0d0 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq 7e00000000000000 fe000000d0e0a0d0 * fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq fc00000000000000 c00100035b007700 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+dmulq. 2207c00000000000 0000000000000e50 * 2207c00000000000 000000000014c000 ==> 2207800000000000 00000001143a0000
+dmulq. a207c00000000000 00000000000000e0 * 2207c00000000000 000000000014c000 ==> a207800000000000 000000000fa03000
+dmulq. 2206c00000000000 00000000000000cf * a205c00000000000 000000010a395bcf ==> a204800000000000 000000fe5b36cca1
+dmulq. 2207c00000000000 0000000000000e50 * 000400000089b000 0a6000d000000049 ==> 0003c007dd9d007e b20908000003a450
+dmulq. a207c00000000000 00000000000000e0 * a205c00000000000 000000010a395bcf ==> 2205800000000000 000000d67d31a940
+dmulq. 6209400000fd0000 00253f1f534acdd4 * 2207c00000000000 000000000014c000 ==> 660a84c004da6c00 004883107189d825
+dmulq. 6209400000fd0000 00253f1f534acdd4 * a207c00000000000 00000000000000e0 ==> 8609d0a000d57800 0006f47e5fba95b7
+dmulq. 2208000000000000 0000000000000000 * a208000000000000 0000000000000000 ==> a208000000000000 0000000000000000
+dmulq. 2208000000000000 0000000000000000 * 2207c00000000000 000000000014c000 ==> 2207c00000000000 0000000000000000
+dmulq. a248000000000000 0000000000000000 * f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dmulq. a208000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. 2208000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq. 7800000000000000 0000000000000000 * a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+dmulq. 7800000000000000 0000000000000000 * f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+dmulq. f900000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. f800000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq. 7e00000000000000 fe000000d0e0a0d0 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. 7e00000000000000 fe000000d0e0a0d0 * fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. fc00000000000000 c00100035b007700 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+
+ddivq 2207c00000000000 0000000000000e50 / 2207c00000000000 000000000014c000 ==> 29ff20ccf848e2a6 b8333e1238a9ae0d
+ddivq a207c00000000000 00000000000000e0 / 2207c00000000000 000000000014c000 ==> a5fed80474082c00 b6011d020b002d81
+ddivq 2206c00000000000 00000000000000cf / a205c00000000000 000000010a395bcf ==> b1feeabacabd62ac 3812c9f3bf11f97a
+ddivq 2207c00000000000 0000000000000e50 / 000400000089b000 0a6000d000000049 ==> 4ffdcc9ad201f5f8 691a4dc710e32c5a
+ddivq a207c00000000000 00000000000000e0 / a205c00000000000 000000010a395bcf ==> 2dffc0e4e6a20557 44fc3ca241351d34
+ddivq 6209400000fd0000 00253f1f534acdd4 / 2207c00000000000 000000000014c000 ==> 1a082841943c02d8 00b408095bb6bed6
+ddivq 6209400000fd0000 00253f1f534acdd4 / a207c00000000000 00000000000000e0 ==> 9609000003069f40 0018c92fea1aadc6
+ddivq 2208000000000000 0000000000000000 / a208000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq 2208000000000000 0000000000000000 / 2207c00000000000 000000000014c000 ==> 2208400000000000 0000000000000000
+ddivq a248000000000000 0000000000000000 / f900000000000000 0000000000000000 ==> 0000000000000000 0000000000000000
+ddivq a208000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq 2208000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq 7800000000000000 0000000000000000 / a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+ddivq 7800000000000000 0000000000000000 / f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq f900000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq f800000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq 7e00000000000000 fe000000d0e0a0d0 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq 7e00000000000000 fe000000d0e0a0d0 / fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq fc00000000000000 c00100035b007700 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+ddivq. 2207c00000000000 0000000000000e50 / 2207c00000000000 000000000014c000 ==> 29ff20ccf848e2a6 b8333e1238a9ae0d
+ddivq. a207c00000000000 00000000000000e0 / 2207c00000000000 000000000014c000 ==> a5fed80474082c00 b6011d020b002d81
+ddivq. 2206c00000000000 00000000000000cf / a205c00000000000 000000010a395bcf ==> b1feeabacabd62ac 3812c9f3bf11f97a
+ddivq. 2207c00000000000 0000000000000e50 / 000400000089b000 0a6000d000000049 ==> 4ffdcc9ad201f5f8 691a4dc710e32c5a
+ddivq. a207c00000000000 00000000000000e0 / a205c00000000000 000000010a395bcf ==> 2dffc0e4e6a20557 44fc3ca241351d34
+ddivq. 6209400000fd0000 00253f1f534acdd4 / 2207c00000000000 000000000014c000 ==> 1a082841943c02d8 00b408095bb6bed6
+ddivq. 6209400000fd0000 00253f1f534acdd4 / a207c00000000000 00000000000000e0 ==> 9609000003069f40 0018c92fea1aadc6
+ddivq. 2208000000000000 0000000000000000 / a208000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq. 2208000000000000 0000000000000000 / 2207c00000000000 000000000014c000 ==> 2208400000000000 0000000000000000
+ddivq. a248000000000000 0000000000000000 / f900000000000000 0000000000000000 ==> 0000000000000000 0000000000000000
+ddivq. a208000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. 2208000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq. 7800000000000000 0000000000000000 / a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+ddivq. 7800000000000000 0000000000000000 / f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq. f900000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. f800000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq. 7e00000000000000 fe000000d0e0a0d0 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. 7e00000000000000 fe000000d0e0a0d0 / fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. fc00000000000000 c00100035b007700 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+
+Test DFP rounding modes
+test #0: dmul with rounding mode 0: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 1: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 2: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f6
+
+test #0: dmul with rounding mode 3: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 4: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 5: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 6: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f6
+
+test #0: dmul with rounding mode 7: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f6
+
+test #1: dmul with rounding mode 0: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 1: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 2: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f8
+
+test #1: dmul with rounding mode 3: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 4: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 5: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 6: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f8
+
+test #1: dmul with rounding mode 7: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #2: dmul with rounding mode 0: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 1: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 2: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e098a
+
+test #2: dmul with rounding mode 3: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 4: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 5: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 6: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e098a
+
+test #2: dmul with rounding mode 7: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #3: dmul with rounding mode 0: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 1: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 2: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e09aa
+
+test #3: dmul with rounding mode 3: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 4: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 5: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 6: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e09aa
+
+test #3: dmul with rounding mode 7: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #4: dmul with rounding mode 0: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 1: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 2: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ca
+
+test #4: dmul with rounding mode 3: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 4: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 5: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 6: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ca
+
+test #4: dmul with rounding mode 7: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #5: dmul with rounding mode 0: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 1: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 2: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09ea
+
+test #5: dmul with rounding mode 3: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 4: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 5: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 6: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09ea
+
+test #5: dmul with rounding mode 7: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09ea
+
+test #6: dmul with rounding mode 0: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 1: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 2: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a56
+
+test #6: dmul with rounding mode 3: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 4: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 5: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 6: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a56
+
+test #6: dmul with rounding mode 7: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a56
+
+test #7: dmul with rounding mode 0: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 1: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 2: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a58
+
+test #7: dmul with rounding mode 3: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 4: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 5: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 6: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a58
+
+test #7: dmul with rounding mode 7: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #8: dmul with rounding mode 0: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 1: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef0
+
+test #8: dmul with rounding mode 2: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 3: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef0
+
+test #8: dmul with rounding mode 4: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 5: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 6: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 7: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #9: dmul with rounding mode 0: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 1: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef2
+
+test #9: dmul with rounding mode 2: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 3: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef2
+
+test #9: dmul with rounding mode 4: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 5: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 6: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 7: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef2
+
+test #10: dmul with rounding mode 0: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 1: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 2: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a64
+
+test #10: dmul with rounding mode 3: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 4: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 5: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 6: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a64
+
+test #10: dmul with rounding mode 7: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #11: dmul with rounding mode 0: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 1: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 2: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a66
+
+test #11: dmul with rounding mode 3: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 4: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 5: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 6: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a66
+
+test #11: dmul with rounding mode 7: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a66
+
+Test move to/from FPSCR
+FPSCR binary floating point rounding mode 0000000000000000 == 0000000000000000? yes
+FPSCR binary floating point rounding mode 0000000000000001 == 0000000000000001? yes
+FPSCR binary floating point rounding mode 0000000000000002 == 0000000000000002? yes
+FPSCR binary floating point rounding mode 0000000000000003 == 0000000000000003? yes
+FPSCR decimal floating point rounding mode 0000000000000003 == 0000000000000003? yes
+FPSCR decimal floating point rounding mode 0000000100000003 == 0000000100000003? yes
+FPSCR decimal floating point rounding mode 0000000200000003 == 0000000200000003? yes
+FPSCR decimal floating point rounding mode 0000000300000003 == 0000000300000003? yes
+FPSCR decimal floating point rounding mode 0000000400000003 == 0000000400000003? yes
+FPSCR decimal floating point rounding mode 0000000500000003 == 0000000500000003? yes
+FPSCR decimal floating point rounding mode 0000000600000003 == 0000000600000003? yes
+FPSCR decimal floating point rounding mode 0000000700000003 == 0000000700000003? yes
diff --git a/none/tests/ppc32/test_dfp1.vgtest b/none/tests/ppc32/test_dfp1.vgtest
new file mode 100644
index 0000000..0efe5df
--- /dev/null
+++ b/none/tests/ppc32/test_dfp1.vgtest
@@ -0,0 +1,2 @@
+prereq: ../../../tests/check_dfp_cap
+prog: test_dfp1
diff --git a/none/tests/ppc64/Makefile.am b/none/tests/ppc64/Makefile.am
index 8d6e3af..93fa272 100644
--- a/none/tests/ppc64/Makefile.am
+++ b/none/tests/ppc64/Makefile.am
@@ -17,12 +17,13 @@
power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest \
test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest \
test_isa_2_06_part2.stderr.exp test_isa_2_06_part2.stdout.exp test_isa_2_06_part2.vgtest \
- test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest
+ test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest \
+ test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest
check_PROGRAMS = \
allexec \
jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp power6_mf_gpr test_isa_2_06_part1 \
- test_isa_2_06_part2 test_isa_2_06_part3
+ test_isa_2_06_part2 test_isa_2_06_part3 test_dfp1
AM_CFLAGS += @FLAG_M64@
AM_CXXFLAGS += @FLAG_M64@
@@ -44,6 +45,14 @@
BUILD_FLAG_VSX =
endif
+if HAS_DFP
+BUILD_FLAGS_DFP = -mhard-dfp -mcpu=power6
+DFP_FLAG = -DHAS_DFP
+else
+BUILD_FLAGS_DFP =
+DFP_FLAG =
+endif
+
test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
@@ -56,3 +65,6 @@
jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \
@FLAG_M64@ $(ALTIVEC_FLAG)
+test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \
+ @FLAG_M64@ $(BUILD_FLAGS_DFP)
+
diff --git a/none/tests/ppc64/test_dfp1.c b/none/tests/ppc64/test_dfp1.c
new file mode 120000
index 0000000..dc077d4
--- /dev/null
+++ b/none/tests/ppc64/test_dfp1.c
@@ -0,0 +1 @@
+../../../none/tests/ppc32/test_dfp1.c
\ No newline at end of file
diff --git a/none/tests/ppc64/test_dfp1.stderr.exp b/none/tests/ppc64/test_dfp1.stderr.exp
new file mode 100644
index 0000000..139597f
--- /dev/null
+++ b/none/tests/ppc64/test_dfp1.stderr.exp
@@ -0,0 +1,2 @@
+
+
diff --git a/none/tests/ppc64/test_dfp1.stdout.exp b/none/tests/ppc64/test_dfp1.stdout.exp
new file mode 100644
index 0000000..614895d
--- /dev/null
+++ b/none/tests/ppc64/test_dfp1.stdout.exp
@@ -0,0 +1,583 @@
+Test DFP arithmetic instructions
+dadd 2234000000000e50 + 223400000014c000 => 223400000014ce50
+dadd a2340000000000e0 + 223400000014c000 => 223400000014a44c
+dadd 22240000000000cf + a21400010a395bcf => a21400010a1b9bcf
+dadd 2234000000000e50 + 000400000089b000 => 2e06500000000000
+dadd a2340000000000e0 + a21400010a395bcf => a21400080a395bcf
+dadd 6e4d3f1f534acdd4 + 223400000014c000 => 6e4d3f1f534acdd5
+dadd 6e4d3f1f534acdd4 + a2340000000000e0 => 6e4d3f1f534acdd4
+dadd 2238000000000000 + 223400000014c000 => 223400000014c000
+dadd 2238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd a238000000000000 + 2234000000000e50 => 2234000000000e50
+dadd a238000000000000 + 223400000014c000 => 223400000014c000
+dadd a238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd 2238000000000000 + a238000000000000 => 2238000000000000
+dadd fc00000000000000 + f800000000000000 => fc00000000000000
+dadd fc00000000000000 + 223400000014c000 => fc00000000000000
+dadd fc00000000000000 + 7800000000000000 => fc00000000000000
+dadd fc00000000000000 + fc00000000000000 => fc00000000000000
+dadd fc00000000000000 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + f800000000000000 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + 2234000000000e50 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + 7800000000000000 => fc000000d0e0a0d0
+dadd fe000000d0e0a0d0 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd f800000000000000 + f800000000000000 => f800000000000000
+dadd f800000000000000 + 22240000000000cf => f800000000000000
+dadd f800000000000000 + 7a34000000000000 => 7c00000000000000
+
+dadd. 2234000000000e50 + 223400000014c000 => 223400000014ce50
+dadd. a2340000000000e0 + 223400000014c000 => 223400000014a44c
+dadd. 22240000000000cf + a21400010a395bcf => a21400010a1b9bcf
+dadd. 2234000000000e50 + 000400000089b000 => 2e06500000000000
+dadd. a2340000000000e0 + a21400010a395bcf => a21400080a395bcf
+dadd. 6e4d3f1f534acdd4 + 223400000014c000 => 6e4d3f1f534acdd5
+dadd. 6e4d3f1f534acdd4 + a2340000000000e0 => 6e4d3f1f534acdd4
+dadd. 2238000000000000 + 223400000014c000 => 223400000014c000
+dadd. 2238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd. a238000000000000 + 2234000000000e50 => 2234000000000e50
+dadd. a238000000000000 + 223400000014c000 => 223400000014c000
+dadd. a238000000000000 + a2340000000000e0 => a2340000000000e0
+dadd. 2238000000000000 + a238000000000000 => 2238000000000000
+dadd. fc00000000000000 + f800000000000000 => fc00000000000000
+dadd. fc00000000000000 + 223400000014c000 => fc00000000000000
+dadd. fc00000000000000 + 7800000000000000 => fc00000000000000
+dadd. fc00000000000000 + fc00000000000000 => fc00000000000000
+dadd. fc00000000000000 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + f800000000000000 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + 2234000000000e50 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + 7800000000000000 => fc000000d0e0a0d0
+dadd. fe000000d0e0a0d0 + fe000000d0e0a0d0 => fc000000d0e0a0d0
+dadd. f800000000000000 + f800000000000000 => f800000000000000
+dadd. f800000000000000 + 22240000000000cf => f800000000000000
+dadd. f800000000000000 + 7a34000000000000 => 7c00000000000000
+
+
+dsub 2234000000000e50 - 223400000014c000 => a234000000149ad0
+dsub a2340000000000e0 - 223400000014c000 => a23400000014c0e0
+dsub 22240000000000cf - a21400010a395bcf => 221400010a571bcf
+dsub 2234000000000e50 - 000400000089b000 => 2e06500000000000
+dsub a2340000000000e0 - a21400010a395bcf => a214000477cb0d11
+dsub 6e4d3f1f534acdd4 - 223400000014c000 => 6e4d3f1f534acdd3
+dsub 6e4d3f1f534acdd4 - a2340000000000e0 => 6e4d3f1f534acdd4
+dsub 2238000000000000 - 223400000014c000 => a23400000014c000
+dsub 2238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub a238000000000000 - 2234000000000e50 => a234000000000e50
+dsub a238000000000000 - 223400000014c000 => a23400000014c000
+dsub a238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub 2238000000000000 - a238000000000000 => 2238000000000000
+dsub fc00000000000000 - f800000000000000 => fc00000000000000
+dsub fc00000000000000 - 223400000014c000 => fc00000000000000
+dsub fc00000000000000 - 7800000000000000 => fc00000000000000
+dsub fc00000000000000 - fc00000000000000 => fc00000000000000
+dsub fc00000000000000 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - f800000000000000 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - 2234000000000e50 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - 7800000000000000 => fc000000d0e0a0d0
+dsub fe000000d0e0a0d0 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub f800000000000000 - f800000000000000 => 7c00000000000000
+dsub f800000000000000 - 22240000000000cf => f800000000000000
+dsub f800000000000000 - 7a34000000000000 => f800000000000000
+
+dsub. 2234000000000e50 - 223400000014c000 => a234000000149ad0
+dsub. a2340000000000e0 - 223400000014c000 => a23400000014c0e0
+dsub. 22240000000000cf - a21400010a395bcf => 221400010a571bcf
+dsub. 2234000000000e50 - 000400000089b000 => 2e06500000000000
+dsub. a2340000000000e0 - a21400010a395bcf => a214000477cb0d11
+dsub. 6e4d3f1f534acdd4 - 223400000014c000 => 6e4d3f1f534acdd3
+dsub. 6e4d3f1f534acdd4 - a2340000000000e0 => 6e4d3f1f534acdd4
+dsub. 2238000000000000 - 223400000014c000 => a23400000014c000
+dsub. 2238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub. a238000000000000 - 2234000000000e50 => a234000000000e50
+dsub. a238000000000000 - 223400000014c000 => a23400000014c000
+dsub. a238000000000000 - a2340000000000e0 => 22340000000000e0
+dsub. 2238000000000000 - a238000000000000 => 2238000000000000
+dsub. fc00000000000000 - f800000000000000 => fc00000000000000
+dsub. fc00000000000000 - 223400000014c000 => fc00000000000000
+dsub. fc00000000000000 - 7800000000000000 => fc00000000000000
+dsub. fc00000000000000 - fc00000000000000 => fc00000000000000
+dsub. fc00000000000000 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - f800000000000000 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - 2234000000000e50 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - 7800000000000000 => fc000000d0e0a0d0
+dsub. fe000000d0e0a0d0 - fe000000d0e0a0d0 => fc000000d0e0a0d0
+dsub. f800000000000000 - f800000000000000 => 7c00000000000000
+dsub. f800000000000000 - 22240000000000cf => f800000000000000
+dsub. f800000000000000 - 7a34000000000000 => f800000000000000
+
+
+dmul 2234000000000e50 * 223400000014c000 => 22300001143a0000
+dmul a2340000000000e0 * 223400000014c000 => a23000000fa03000
+dmul 22240000000000cf * a21400010a395bcf => a20000fe5b36cca1
+dmul 2234000000000e50 * 000400000089b000 => 0000000c28a03000
+dmul a2340000000000e0 * a21400010a395bcf => 221000d67d31a940
+dmul 6e4d3f1f534acdd4 * 223400000014c000 => 266510610e1d3703
+dmul 6e4d3f1f534acdd4 * a2340000000000e0 => a656f47e5fba95b7
+dmul 2238000000000000 * a238000000000000 => a238000000000000
+dmul 2238000000000000 * 223400000014c000 => 2234000000000000
+dmul 4248000000000000 * 7a34000000000000 => 7c00000000000000
+dmul a238000000000000 * fc00000000000000 => fc00000000000000
+dmul 2238000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul 7800000000000000 * a2340000000000e0 => f800000000000000
+dmul 7800000000000000 * f800000000000000 => f800000000000000
+dmul 7a34000000000000 * fc00000000000000 => fc00000000000000
+dmul f800000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul fc00000000000000 * fc00000000000000 => fc00000000000000
+dmul fc00000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul fe000000d0e0a0d0 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+dmul. 2234000000000e50 * 223400000014c000 => 22300001143a0000
+dmul. a2340000000000e0 * 223400000014c000 => a23000000fa03000
+dmul. 22240000000000cf * a21400010a395bcf => a20000fe5b36cca1
+dmul. 2234000000000e50 * 000400000089b000 => 0000000c28a03000
+dmul. a2340000000000e0 * a21400010a395bcf => 221000d67d31a940
+dmul. 6e4d3f1f534acdd4 * 223400000014c000 => 266510610e1d3703
+dmul. 6e4d3f1f534acdd4 * a2340000000000e0 => a656f47e5fba95b7
+dmul. 2238000000000000 * a238000000000000 => a238000000000000
+dmul. 2238000000000000 * 223400000014c000 => 2234000000000000
+dmul. 4248000000000000 * 7a34000000000000 => 7c00000000000000
+dmul. a238000000000000 * fc00000000000000 => fc00000000000000
+dmul. 2238000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul. 7800000000000000 * a2340000000000e0 => f800000000000000
+dmul. 7800000000000000 * f800000000000000 => f800000000000000
+dmul. 7a34000000000000 * fc00000000000000 => fc00000000000000
+dmul. f800000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul. fc00000000000000 * fc00000000000000 => fc00000000000000
+dmul. fc00000000000000 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+dmul. fe000000d0e0a0d0 * fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+
+ddiv 2234000000000e50 / 223400000014c000 => 29f20ccf848e2a4e
+ddiv a2340000000000e0 / 223400000014c000 => a5ed80474082c00b
+ddiv 22240000000000cf / a21400010a395bcf => b1eeabacabd62ac3
+ddiv 2234000000000e50 / 000400000089b000 => 7800000000000000
+ddiv a2340000000000e0 / a21400010a395bcf => 2dfc0e4e6a205575
+ddiv 6e4d3f1f534acdd4 / 223400000014c000 => 3e38ff87d92ca3c3
+ddiv 6e4d3f1f534acdd4 / a2340000000000e0 => ba48c92fea1aadc6
+ddiv 2238000000000000 / a238000000000000 => 7c00000000000000
+ddiv 2238000000000000 / 223400000014c000 => 223c000000000000
+ddiv 4248000000000000 / 7a34000000000000 => 0000000000000000
+ddiv a238000000000000 / fc00000000000000 => fc00000000000000
+ddiv 2238000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv 7800000000000000 / a2340000000000e0 => f800000000000000
+ddiv 7800000000000000 / f800000000000000 => 7c00000000000000
+ddiv 7a34000000000000 / fc00000000000000 => fc00000000000000
+ddiv f800000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv fc00000000000000 / fc00000000000000 => fc00000000000000
+ddiv fc00000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv fe000000d0e0a0d0 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+ddiv. 2234000000000e50 / 223400000014c000 => 29f20ccf848e2a4e
+ddiv. a2340000000000e0 / 223400000014c000 => a5ed80474082c00b
+ddiv. 22240000000000cf / a21400010a395bcf => b1eeabacabd62ac3
+ddiv. 2234000000000e50 / 000400000089b000 => 7800000000000000
+ddiv. a2340000000000e0 / a21400010a395bcf => 2dfc0e4e6a205575
+ddiv. 6e4d3f1f534acdd4 / 223400000014c000 => 3e38ff87d92ca3c3
+ddiv. 6e4d3f1f534acdd4 / a2340000000000e0 => ba48c92fea1aadc6
+ddiv. 2238000000000000 / a238000000000000 => 7c00000000000000
+ddiv. 2238000000000000 / 223400000014c000 => 223c000000000000
+ddiv. 4248000000000000 / 7a34000000000000 => 0000000000000000
+ddiv. a238000000000000 / fc00000000000000 => fc00000000000000
+ddiv. 2238000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv. 7800000000000000 / a2340000000000e0 => f800000000000000
+ddiv. 7800000000000000 / f800000000000000 => 7c00000000000000
+ddiv. 7a34000000000000 / fc00000000000000 => fc00000000000000
+ddiv. f800000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv. fc00000000000000 / fc00000000000000 => fc00000000000000
+ddiv. fc00000000000000 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+ddiv. fe000000d0e0a0d0 / fe000000d0e0a0d0 => fc000000d0e0a0d0
+
+
+daddq 2207c00000000000 0000000000000e50 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014ce50
+daddq a207c00000000000 00000000000000e0 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014a44c
+daddq 2206c00000000000 00000000000000cf + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000010a1b9bcf
+daddq 2207c00000000000 0000000000000e50 + 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+daddq a207c00000000000 00000000000000e0 + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000080a395bcf
+daddq 6209400000fd0000 00253f1f534acdd4 + 2207c00000000000 000000000014c000 ==> 2601130000000000 0000000000000000
+daddq 6209400000fd0000 00253f1f534acdd4 + a207c00000000000 00000000000000e0 ==> a600300000000000 0000000000000000
+daddq 2208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq 2208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq a208000000000000 0000000000000000 + 2207c00000000000 0000000000000e50 ==> 2207c00000000000 0000000000000e50
+daddq a208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq a208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq 2208000000000000 0000000000000000 + a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+daddq 7e00000000000000 fe000000d0e0a0d0 + f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq 7e00000000000000 fe000000d0e0a0d0 + fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq fc00000000000000 c00100035b007700 + f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq fc00000000000000 c00100035b007700 + 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+daddq fc00000000000000 c00100035b007700 + 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq fc00000000000000 c00100035b007700 + fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+daddq f800000000000000 0000000000000000 + f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+daddq f800000000000000 0000000000000000 + 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+daddq f800000000000000 0000000000000000 + f900000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+
+daddq. 2207c00000000000 0000000000000e50 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014ce50
+daddq. a207c00000000000 00000000000000e0 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014a44c
+daddq. 2206c00000000000 00000000000000cf + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000010a1b9bcf
+daddq. 2207c00000000000 0000000000000e50 + 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+daddq. a207c00000000000 00000000000000e0 + a205c00000000000 000000010a395bcf ==> a205c00000000000 000000080a395bcf
+daddq. 6209400000fd0000 00253f1f534acdd4 + 2207c00000000000 000000000014c000 ==> 2601130000000000 0000000000000000
+daddq. 6209400000fd0000 00253f1f534acdd4 + a207c00000000000 00000000000000e0 ==> a600300000000000 0000000000000000
+daddq. 2208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq. 2208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq. a208000000000000 0000000000000000 + 2207c00000000000 0000000000000e50 ==> 2207c00000000000 0000000000000e50
+daddq. a208000000000000 0000000000000000 + 2207c00000000000 000000000014c000 ==> 2207c00000000000 000000000014c000
+daddq. a208000000000000 0000000000000000 + a207c00000000000 00000000000000e0 ==> a207c00000000000 00000000000000e0
+daddq. 2208000000000000 0000000000000000 + a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+daddq. 7e00000000000000 fe000000d0e0a0d0 + f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. 7e00000000000000 fe000000d0e0a0d0 + fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+daddq. fc00000000000000 c00100035b007700 + f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq. fc00000000000000 c00100035b007700 + 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+daddq. fc00000000000000 c00100035b007700 + 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+daddq. fc00000000000000 c00100035b007700 + fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+daddq. f800000000000000 0000000000000000 + f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+daddq. f800000000000000 0000000000000000 + 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+daddq. f800000000000000 0000000000000000 + f900000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+
+
+dsubq 2207c00000000000 0000000000000e50 - 2207c00000000000 000000000014c000 ==> a207c00000000000 0000000000149ad0
+dsubq a207c00000000000 00000000000000e0 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c0e0
+dsubq 2206c00000000000 00000000000000cf - a205c00000000000 000000010a395bcf ==> 2205c00000000000 000000010a571bcf
+dsubq 2207c00000000000 0000000000000e50 - 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+dsubq a207c00000000000 00000000000000e0 - a205c00000000000 000000010a395bcf ==> a205c00000000000 0000000477cb0d11
+dsubq 6209400000fd0000 00253f1f534acdd4 - 2207c00000000000 000000000014c000 ==> a601130000000000 0000000000000000
+dsubq 6209400000fd0000 00253f1f534acdd4 - a207c00000000000 00000000000000e0 ==> 2600300000000000 0000000000000000
+dsubq 2208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq 2208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq a208000000000000 0000000000000000 - 2207c00000000000 0000000000000e50 ==> a207c00000000000 0000000000000e50
+dsubq a208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq a208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq 2208000000000000 0000000000000000 - a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+dsubq 7e00000000000000 fe000000d0e0a0d0 - f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq 7e00000000000000 fe000000d0e0a0d0 - fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq fc00000000000000 c00100035b007700 - f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq fc00000000000000 c00100035b007700 - 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+dsubq fc00000000000000 c00100035b007700 - 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq fc00000000000000 c00100035b007700 - fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dsubq f800000000000000 0000000000000000 - f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dsubq f800000000000000 0000000000000000 - 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+dsubq f800000000000000 0000000000000000 - f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+
+dsubq. 2207c00000000000 0000000000000e50 - 2207c00000000000 000000000014c000 ==> a207c00000000000 0000000000149ad0
+dsubq. a207c00000000000 00000000000000e0 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c0e0
+dsubq. 2206c00000000000 00000000000000cf - a205c00000000000 000000010a395bcf ==> 2205c00000000000 000000010a571bcf
+dsubq. 2207c00000000000 0000000000000e50 - 000400000089b000 0a6000d000000049 ==> 2e00650000000000 0000000000000000
+dsubq. a207c00000000000 00000000000000e0 - a205c00000000000 000000010a395bcf ==> a205c00000000000 0000000477cb0d11
+dsubq. 6209400000fd0000 00253f1f534acdd4 - 2207c00000000000 000000000014c000 ==> a601130000000000 0000000000000000
+dsubq. 6209400000fd0000 00253f1f534acdd4 - a207c00000000000 00000000000000e0 ==> 2600300000000000 0000000000000000
+dsubq. 2208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq. 2208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq. a208000000000000 0000000000000000 - 2207c00000000000 0000000000000e50 ==> a207c00000000000 0000000000000e50
+dsubq. a208000000000000 0000000000000000 - 2207c00000000000 000000000014c000 ==> a207c00000000000 000000000014c000
+dsubq. a208000000000000 0000000000000000 - a207c00000000000 00000000000000e0 ==> 2207c00000000000 00000000000000e0
+dsubq. 2208000000000000 0000000000000000 - a208000000000000 0000000000000000 ==> 2208000000000000 0000000000000000
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - f800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - 2207c00000000000 000000000014c000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - 7800000000000000 0000000000000000 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. 7e00000000000000 fe000000d0e0a0d0 - fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dsubq. fc00000000000000 c00100035b007700 - f800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq. fc00000000000000 c00100035b007700 - 2207c00000000000 0000000000000e50 ==> fc00000000000000 c00100035b007700
+dsubq. fc00000000000000 c00100035b007700 - 7800000000000000 0000000000000000 ==> fc00000000000000 c00100035b007700
+dsubq. fc00000000000000 c00100035b007700 - fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dsubq. f800000000000000 0000000000000000 - f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dsubq. f800000000000000 0000000000000000 - 2206c00000000000 00000000000000cf ==> f800000000000000 0000000000000000
+dsubq. f800000000000000 0000000000000000 - f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+
+
+dmulq 2207c00000000000 0000000000000e50 * 2207c00000000000 000000000014c000 ==> 2207800000000000 00000001143a0000
+dmulq a207c00000000000 00000000000000e0 * 2207c00000000000 000000000014c000 ==> a207800000000000 000000000fa03000
+dmulq 2206c00000000000 00000000000000cf * a205c00000000000 000000010a395bcf ==> a204800000000000 000000fe5b36cca1
+dmulq 2207c00000000000 0000000000000e50 * 000400000089b000 0a6000d000000049 ==> 0003c007dd9d007e b20908000003a450
+dmulq a207c00000000000 00000000000000e0 * a205c00000000000 000000010a395bcf ==> 2205800000000000 000000d67d31a940
+dmulq 6209400000fd0000 00253f1f534acdd4 * 2207c00000000000 000000000014c000 ==> 660a84c004da6c00 004883107189d825
+dmulq 6209400000fd0000 00253f1f534acdd4 * a207c00000000000 00000000000000e0 ==> 8609d0a000d57800 0006f47e5fba95b7
+dmulq 2208000000000000 0000000000000000 * a208000000000000 0000000000000000 ==> a208000000000000 0000000000000000
+dmulq 2208000000000000 0000000000000000 * 2207c00000000000 000000000014c000 ==> 2207c00000000000 0000000000000000
+dmulq a248000000000000 0000000000000000 * f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dmulq a208000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq 2208000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq 7800000000000000 0000000000000000 * a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+dmulq 7800000000000000 0000000000000000 * f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+dmulq f900000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq f800000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq 7e00000000000000 fe000000d0e0a0d0 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq 7e00000000000000 fe000000d0e0a0d0 * fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq fc00000000000000 c00100035b007700 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+dmulq. 2207c00000000000 0000000000000e50 * 2207c00000000000 000000000014c000 ==> 2207800000000000 00000001143a0000
+dmulq. a207c00000000000 00000000000000e0 * 2207c00000000000 000000000014c000 ==> a207800000000000 000000000fa03000
+dmulq. 2206c00000000000 00000000000000cf * a205c00000000000 000000010a395bcf ==> a204800000000000 000000fe5b36cca1
+dmulq. 2207c00000000000 0000000000000e50 * 000400000089b000 0a6000d000000049 ==> 0003c007dd9d007e b20908000003a450
+dmulq. a207c00000000000 00000000000000e0 * a205c00000000000 000000010a395bcf ==> 2205800000000000 000000d67d31a940
+dmulq. 6209400000fd0000 00253f1f534acdd4 * 2207c00000000000 000000000014c000 ==> 660a84c004da6c00 004883107189d825
+dmulq. 6209400000fd0000 00253f1f534acdd4 * a207c00000000000 00000000000000e0 ==> 8609d0a000d57800 0006f47e5fba95b7
+dmulq. 2208000000000000 0000000000000000 * a208000000000000 0000000000000000 ==> a208000000000000 0000000000000000
+dmulq. 2208000000000000 0000000000000000 * 2207c00000000000 000000000014c000 ==> 2207c00000000000 0000000000000000
+dmulq. a248000000000000 0000000000000000 * f900000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+dmulq. a208000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. 2208000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq. 7800000000000000 0000000000000000 * a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+dmulq. 7800000000000000 0000000000000000 * f800000000000000 0000000000000000 ==> f800000000000000 0000000000000000
+dmulq. f900000000000000 0000000000000000 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. f800000000000000 0000000000000000 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+dmulq. 7e00000000000000 fe000000d0e0a0d0 * 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. 7e00000000000000 fe000000d0e0a0d0 * fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+dmulq. fc00000000000000 c00100035b007700 * fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+
+ddivq 2207c00000000000 0000000000000e50 / 2207c00000000000 000000000014c000 ==> 29ff20ccf848e2a6 b8333e1238a9ae0d
+ddivq a207c00000000000 00000000000000e0 / 2207c00000000000 000000000014c000 ==> a5fed80474082c00 b6011d020b002d81
+ddivq 2206c00000000000 00000000000000cf / a205c00000000000 000000010a395bcf ==> b1feeabacabd62ac 3812c9f3bf11f97a
+ddivq 2207c00000000000 0000000000000e50 / 000400000089b000 0a6000d000000049 ==> 4ffdcc9ad201f5f8 691a4dc710e32c5a
+ddivq a207c00000000000 00000000000000e0 / a205c00000000000 000000010a395bcf ==> 2dffc0e4e6a20557 44fc3ca241351d34
+ddivq 6209400000fd0000 00253f1f534acdd4 / 2207c00000000000 000000000014c000 ==> 1a082841943c02d8 00b408095bb6bed6
+ddivq 6209400000fd0000 00253f1f534acdd4 / a207c00000000000 00000000000000e0 ==> 9609000003069f40 0018c92fea1aadc6
+ddivq 2208000000000000 0000000000000000 / a208000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq 2208000000000000 0000000000000000 / 2207c00000000000 000000000014c000 ==> 2208400000000000 0000000000000000
+ddivq a248000000000000 0000000000000000 / f900000000000000 0000000000000000 ==> 0000000000000000 0000000000000000
+ddivq a208000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq 2208000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq 7800000000000000 0000000000000000 / a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+ddivq 7800000000000000 0000000000000000 / f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq f900000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq f800000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq 7e00000000000000 fe000000d0e0a0d0 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq 7e00000000000000 fe000000d0e0a0d0 / fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq fc00000000000000 c00100035b007700 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+ddivq. 2207c00000000000 0000000000000e50 / 2207c00000000000 000000000014c000 ==> 29ff20ccf848e2a6 b8333e1238a9ae0d
+ddivq. a207c00000000000 00000000000000e0 / 2207c00000000000 000000000014c000 ==> a5fed80474082c00 b6011d020b002d81
+ddivq. 2206c00000000000 00000000000000cf / a205c00000000000 000000010a395bcf ==> b1feeabacabd62ac 3812c9f3bf11f97a
+ddivq. 2207c00000000000 0000000000000e50 / 000400000089b000 0a6000d000000049 ==> 4ffdcc9ad201f5f8 691a4dc710e32c5a
+ddivq. a207c00000000000 00000000000000e0 / a205c00000000000 000000010a395bcf ==> 2dffc0e4e6a20557 44fc3ca241351d34
+ddivq. 6209400000fd0000 00253f1f534acdd4 / 2207c00000000000 000000000014c000 ==> 1a082841943c02d8 00b408095bb6bed6
+ddivq. 6209400000fd0000 00253f1f534acdd4 / a207c00000000000 00000000000000e0 ==> 9609000003069f40 0018c92fea1aadc6
+ddivq. 2208000000000000 0000000000000000 / a208000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq. 2208000000000000 0000000000000000 / 2207c00000000000 000000000014c000 ==> 2208400000000000 0000000000000000
+ddivq. a248000000000000 0000000000000000 / f900000000000000 0000000000000000 ==> 0000000000000000 0000000000000000
+ddivq. a208000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. 2208000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq. 7800000000000000 0000000000000000 / a207c00000000000 00000000000000e0 ==> f800000000000000 0000000000000000
+ddivq. 7800000000000000 0000000000000000 / f800000000000000 0000000000000000 ==> 7c00000000000000 0000000000000000
+ddivq. f900000000000000 0000000000000000 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. f800000000000000 0000000000000000 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+ddivq. 7e00000000000000 fe000000d0e0a0d0 / 7e00000000000000 fe000000d0e0a0d0 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. 7e00000000000000 fe000000d0e0a0d0 / fc00000000000000 c00100035b007700 ==> 7c00000000000000 fe000000d0e0a0d0
+ddivq. fc00000000000000 c00100035b007700 / fc00000000000000 c00100035b007700 ==> fc00000000000000 c00100035b007700
+
+
+Test DFP rounding modes
+test #0: dmul with rounding mode 0: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 1: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 2: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f6
+
+test #0: dmul with rounding mode 3: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 4: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 5: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f5
+
+test #0: dmul with rounding mode 6: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f6
+
+test #0: dmul with rounding mode 7: 26cc3f1f534acdd4 * 27feff197a42ba06 => 4ccf3810908e09f6
+
+test #1: dmul with rounding mode 0: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 1: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 2: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f8
+
+test #1: dmul with rounding mode 3: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 4: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 5: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #1: dmul with rounding mode 6: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f8
+
+test #1: dmul with rounding mode 7: 26cc3f1f534acdd5 * 27feff197a42ba06 => 4ccf3810908e09f7
+
+test #2: dmul with rounding mode 0: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 1: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 2: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e098a
+
+test #2: dmul with rounding mode 3: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 4: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 5: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #2: dmul with rounding mode 6: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e098a
+
+test #2: dmul with rounding mode 7: 26cc3f1f534acdd6 * 27feff197a42ba06 => 4ccf3810908e09f9
+
+test #3: dmul with rounding mode 0: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 1: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 2: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e09aa
+
+test #3: dmul with rounding mode 3: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 4: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 5: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #3: dmul with rounding mode 6: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e09aa
+
+test #3: dmul with rounding mode 7: 26cc3f1f534acdd7 * 27feff197a42ba06 => 4ccf3810908e098b
+
+test #4: dmul with rounding mode 0: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 1: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 2: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ca
+
+test #4: dmul with rounding mode 3: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 4: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 5: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #4: dmul with rounding mode 6: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ca
+
+test #4: dmul with rounding mode 7: 26cc3f1f534acdd8 * 27feff197a42ba06 => 4ccf3810908e09ab
+
+test #5: dmul with rounding mode 0: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 1: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 2: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09ea
+
+test #5: dmul with rounding mode 3: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 4: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 5: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09cb
+
+test #5: dmul with rounding mode 6: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09ea
+
+test #5: dmul with rounding mode 7: 26cc3f1f534acdd9 * 27feff197a42ba06 => 4ccf3810908e09ea
+
+test #6: dmul with rounding mode 0: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 1: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 2: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a56
+
+test #6: dmul with rounding mode 3: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 4: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 5: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a55
+
+test #6: dmul with rounding mode 6: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a56
+
+test #6: dmul with rounding mode 7: 26cc3f1f534acdda * 27feff197a42ba06 => 4ccf3810908e0a56
+
+test #7: dmul with rounding mode 0: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 1: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 2: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a58
+
+test #7: dmul with rounding mode 3: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 4: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 5: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #7: dmul with rounding mode 6: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a58
+
+test #7: dmul with rounding mode 7: 26cc3f1f534acddb * 27feff197a42ba06 => 4ccf3810908e0a57
+
+test #8: dmul with rounding mode 0: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 1: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef0
+
+test #8: dmul with rounding mode 2: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 3: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef0
+
+test #8: dmul with rounding mode 4: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 5: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 6: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #8: dmul with rounding mode 7: 26cc3f1f534acddc * 27feff197a42ba06 => 4ccf3810908e0ef1
+
+test #9: dmul with rounding mode 0: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 1: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef2
+
+test #9: dmul with rounding mode 2: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 3: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef2
+
+test #9: dmul with rounding mode 4: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 5: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 6: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef3
+
+test #9: dmul with rounding mode 7: 26cc3f1f534acddd * 27feff197a42ba06 => 4ccf3810908e0ef2
+
+test #10: dmul with rounding mode 0: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 1: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 2: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a64
+
+test #10: dmul with rounding mode 3: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 4: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 5: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #10: dmul with rounding mode 6: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a64
+
+test #10: dmul with rounding mode 7: 26cc3f1f534acdde * 27feff197a42ba06 => 4ccf3810908e0a63
+
+test #11: dmul with rounding mode 0: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 1: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 2: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a66
+
+test #11: dmul with rounding mode 3: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 4: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 5: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a65
+
+test #11: dmul with rounding mode 6: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a66
+
+test #11: dmul with rounding mode 7: 26cc3f1f534acddf * 27feff197a42ba06 => 4ccf3810908e0a66
+
+Test move to/from FPSCR
+FPSCR binary floating point rounding mode 0000000000000000 == 0000000000000000? yes
+FPSCR binary floating point rounding mode 0000000000000001 == 0000000000000001? yes
+FPSCR binary floating point rounding mode 0000000000000002 == 0000000000000002? yes
+FPSCR binary floating point rounding mode 0000000000000003 == 0000000000000003? yes
+FPSCR decimal floating point rounding mode 0000000000000003 == 0000000000000003? yes
+FPSCR decimal floating point rounding mode 0000000100000003 == 0000000100000003? yes
+FPSCR decimal floating point rounding mode 0000000200000003 == 0000000200000003? yes
+FPSCR decimal floating point rounding mode 0000000300000003 == 0000000300000003? yes
+FPSCR decimal floating point rounding mode 0000000400000003 == 0000000400000003? yes
+FPSCR decimal floating point rounding mode 0000000500000003 == 0000000500000003? yes
+FPSCR decimal floating point rounding mode 0000000600000003 == 0000000600000003? yes
+FPSCR decimal floating point rounding mode 0000000700000003 == 0000000700000003? yes
diff --git a/none/tests/ppc64/test_dfp1.vgtest b/none/tests/ppc64/test_dfp1.vgtest
new file mode 100644
index 0000000..0efe5df
--- /dev/null
+++ b/none/tests/ppc64/test_dfp1.vgtest
@@ -0,0 +1,2 @@
+prereq: ../../../tests/check_dfp_cap
+prog: test_dfp1
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 60bad3a..5fe3296 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -4,6 +4,7 @@
dist_noinst_SCRIPTS = \
check_isa-2_06_cap \
check_makefile_consistency \
+ check_dfp_cap \
check_vmx_cap \
filter_addresses \
filter_discards \
diff --git a/tests/check_dfp_cap b/tests/check_dfp_cap
new file mode 100755
index 0000000..d9bc273
--- /dev/null
+++ b/tests/check_dfp_cap
@@ -0,0 +1,10 @@
+#!/bin/sh
+
+# We use this script to check whether or not the processor supports Decimal Floating Point (DFP).
+
+LD_SHOW_AUXV=1 /bin/true | grep dfp > /dev/null 2>&1
+if [ "$?" -ne "0" ]; then
+ exit 1
+else
+ exit 0
+fi