njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 1 | |
| 2 | /*--------------------------------------------------------------------*/ |
| 3 | /*--- Machine-related things. pub_core_machine.h ---*/ |
| 4 | /*--------------------------------------------------------------------*/ |
| 5 | |
| 6 | /* |
| 7 | This file is part of Valgrind, a dynamic binary instrumentation |
| 8 | framework. |
| 9 | |
njn | 9f20746 | 2009-03-10 22:02:09 +0000 | [diff] [blame] | 10 | Copyright (C) 2000-2009 Julian Seward |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 11 | jseward@acm.org |
| 12 | |
| 13 | This program is free software; you can redistribute it and/or |
| 14 | modify it under the terms of the GNU General Public License as |
| 15 | published by the Free Software Foundation; either version 2 of the |
| 16 | License, or (at your option) any later version. |
| 17 | |
| 18 | This program is distributed in the hope that it will be useful, but |
| 19 | WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 21 | General Public License for more details. |
| 22 | |
| 23 | You should have received a copy of the GNU General Public License |
| 24 | along with this program; if not, write to the Free Software |
| 25 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 26 | 02111-1307, USA. |
| 27 | |
| 28 | The GNU General Public License is contained in the file COPYING. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __PUB_CORE_MACHINE_H |
| 32 | #define __PUB_CORE_MACHINE_H |
| 33 | |
| 34 | //-------------------------------------------------------------------- |
| 35 | // PURPOSE: This module contains code related to the particular |
| 36 | // architecture, things like accessing guest state, endianness, word size, |
| 37 | // etc. |
| 38 | //-------------------------------------------------------------------- |
| 39 | |
| 40 | #include "pub_tool_machine.h" |
| 41 | |
njn | 265aae7 | 2009-05-19 01:49:50 +0000 | [diff] [blame^] | 42 | // XXX: this is *really* the wrong spot for these things |
sewardj | f1c91e0 | 2006-10-17 01:35:58 +0000 | [diff] [blame] | 43 | #if defined(VGP_x86_linux) |
sewardj | 6e340c7 | 2005-07-10 00:53:42 +0000 | [diff] [blame] | 44 | # define VG_ELF_DATA2XXX ELFDATA2LSB |
njn | af839f5 | 2005-06-23 03:27:57 +0000 | [diff] [blame] | 45 | # define VG_ELF_MACHINE EM_386 |
| 46 | # define VG_ELF_CLASS ELFCLASS32 |
sewardj | f1c91e0 | 2006-10-17 01:35:58 +0000 | [diff] [blame] | 47 | # undef VG_PLAT_USES_PPCTOC |
| 48 | #elif defined(VGP_amd64_linux) |
sewardj | 6e340c7 | 2005-07-10 00:53:42 +0000 | [diff] [blame] | 49 | # define VG_ELF_DATA2XXX ELFDATA2LSB |
njn | af839f5 | 2005-06-23 03:27:57 +0000 | [diff] [blame] | 50 | # define VG_ELF_MACHINE EM_X86_64 |
| 51 | # define VG_ELF_CLASS ELFCLASS64 |
sewardj | f1c91e0 | 2006-10-17 01:35:58 +0000 | [diff] [blame] | 52 | # undef VG_PLAT_USES_PPCTOC |
| 53 | #elif defined(VGP_ppc32_linux) |
sewardj | 6e340c7 | 2005-07-10 00:53:42 +0000 | [diff] [blame] | 54 | # define VG_ELF_DATA2XXX ELFDATA2MSB |
njn | af839f5 | 2005-06-23 03:27:57 +0000 | [diff] [blame] | 55 | # define VG_ELF_MACHINE EM_PPC |
| 56 | # define VG_ELF_CLASS ELFCLASS32 |
sewardj | f1c91e0 | 2006-10-17 01:35:58 +0000 | [diff] [blame] | 57 | # undef VG_PLAT_USES_PPCTOC |
| 58 | #elif defined(VGP_ppc64_linux) |
sewardj | 2c48c7b | 2005-11-29 13:05:56 +0000 | [diff] [blame] | 59 | # define VG_ELF_DATA2XXX ELFDATA2MSB |
| 60 | # define VG_ELF_MACHINE EM_PPC64 |
| 61 | # define VG_ELF_CLASS ELFCLASS64 |
sewardj | f1c91e0 | 2006-10-17 01:35:58 +0000 | [diff] [blame] | 62 | # define VG_PLAT_USES_PPCTOC 1 |
| 63 | #elif defined(VGO_aix5) |
| 64 | # undef VG_ELF_DATA2XXX |
| 65 | # undef VG_ELF_MACHINE |
| 66 | # undef VG_ELF_CLASS |
| 67 | # define VG_PLAT_USES_PPCTOC 1 |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 68 | #else |
sewardj | f1c91e0 | 2006-10-17 01:35:58 +0000 | [diff] [blame] | 69 | # error Unknown platform |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 70 | #endif |
| 71 | |
| 72 | #if defined(VGA_x86) |
njn | af839f5 | 2005-06-23 03:27:57 +0000 | [diff] [blame] | 73 | # define VG_INSTR_PTR guest_EIP |
| 74 | # define VG_STACK_PTR guest_ESP |
| 75 | # define VG_FRAME_PTR guest_EBP |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 76 | #elif defined(VGA_amd64) |
njn | af839f5 | 2005-06-23 03:27:57 +0000 | [diff] [blame] | 77 | # define VG_INSTR_PTR guest_RIP |
| 78 | # define VG_STACK_PTR guest_RSP |
| 79 | # define VG_FRAME_PTR guest_RBP |
cerion | 85665ca | 2005-06-20 15:51:07 +0000 | [diff] [blame] | 80 | #elif defined(VGA_ppc32) |
njn | af839f5 | 2005-06-23 03:27:57 +0000 | [diff] [blame] | 81 | # define VG_INSTR_PTR guest_CIA |
| 82 | # define VG_STACK_PTR guest_GPR1 |
| 83 | # define VG_FRAME_PTR guest_GPR1 // No frame ptr for PPC |
sewardj | 2c48c7b | 2005-11-29 13:05:56 +0000 | [diff] [blame] | 84 | #elif defined(VGA_ppc64) |
| 85 | # define VG_INSTR_PTR guest_CIA |
| 86 | # define VG_STACK_PTR guest_GPR1 |
| 87 | # define VG_FRAME_PTR guest_GPR1 // No frame ptr for PPC |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 88 | #else |
| 89 | # error Unknown arch |
| 90 | #endif |
| 91 | |
sewardj | 7821e2e | 2005-08-08 00:35:46 +0000 | [diff] [blame] | 92 | |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 93 | // Offsets for the Vex state |
njn | af839f5 | 2005-06-23 03:27:57 +0000 | [diff] [blame] | 94 | #define VG_O_STACK_PTR (offsetof(VexGuestArchState, VG_STACK_PTR)) |
njn | cda2f0f | 2009-05-18 02:12:08 +0000 | [diff] [blame] | 95 | #define VG_O_INSTR_PTR (offsetof(VexGuestArchState, VG_INSTR_PTR)) |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 96 | |
sewardj | 7821e2e | 2005-08-08 00:35:46 +0000 | [diff] [blame] | 97 | |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 98 | //------------------------------------------------------------- |
| 99 | /* Details about the capabilities of the underlying (host) CPU. These |
| 100 | details are acquired by (1) enquiring with the CPU at startup, or |
cerion | 1f0d814 | 2005-12-23 00:57:03 +0000 | [diff] [blame] | 101 | (2) from the AT_SYSINFO entries the kernel gave us (ppc cache |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 102 | line size). It's a bit nasty in the sense that there's no obvious |
| 103 | way to stop uses of some of this info before it's ready to go. |
sewardj | 10f08cf | 2005-06-29 10:16:14 +0000 | [diff] [blame] | 104 | |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 105 | Current dependencies are: |
| 106 | |
| 107 | x86: initially: call VG_(machine_get_hwcaps) |
| 108 | |
| 109 | then safe to use VG_(machine_get_VexArchInfo) |
| 110 | and VG_(machine_x86_have_mxcsr) |
| 111 | ------------- |
| 112 | amd64: initially: call VG_(machine_get_hwcaps) |
| 113 | |
| 114 | then safe to use VG_(machine_get_VexArchInfo) |
| 115 | ------------- |
| 116 | ppc32: initially: call VG_(machine_get_hwcaps) |
| 117 | call VG_(machine_ppc32_set_clszB) |
| 118 | |
| 119 | then safe to use VG_(machine_get_VexArchInfo) |
sewardj | 2c36d42 | 2005-11-13 01:59:22 +0000 | [diff] [blame] | 120 | and VG_(machine_ppc32_has_FP) |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 121 | and VG_(machine_ppc32_has_VMX) |
sewardj | 2c48c7b | 2005-11-29 13:05:56 +0000 | [diff] [blame] | 122 | ------------- |
| 123 | ppc64: initially: call VG_(machine_get_hwcaps) |
| 124 | call VG_(machine_ppc64_set_clszB) |
| 125 | |
| 126 | then safe to use VG_(machine_get_VexArchInfo) |
| 127 | and VG_(machine_ppc64_has_VMX) |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 128 | |
| 129 | VG_(machine_get_hwcaps) may use signals (although it attempts to |
| 130 | leave signal state unchanged) and therefore should only be |
| 131 | called before m_main sets up the client's signal state. |
| 132 | */ |
| 133 | |
| 134 | /* Determine what insn set and insn set variant the host has, and |
| 135 | record it. To be called once at system startup. Returns False if |
| 136 | this a CPU incapable of running Valgrind. */ |
| 137 | extern Bool VG_(machine_get_hwcaps)( void ); |
| 138 | |
| 139 | /* Fetch host cpu info, as per above comment. */ |
| 140 | extern void VG_(machine_get_VexArchInfo)( /*OUT*/VexArch*, |
| 141 | /*OUT*/VexArchInfo* ); |
| 142 | |
| 143 | /* Notify host cpu cache line size, as per above comment. */ |
cerion | bc28f66 | 2005-09-13 11:13:43 +0000 | [diff] [blame] | 144 | #if defined(VGA_ppc32) |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 145 | extern void VG_(machine_ppc32_set_clszB)( Int ); |
sewardj | 10f08cf | 2005-06-29 10:16:14 +0000 | [diff] [blame] | 146 | #endif |
| 147 | |
sewardj | 2c48c7b | 2005-11-29 13:05:56 +0000 | [diff] [blame] | 148 | #if defined(VGA_ppc64) |
| 149 | extern void VG_(machine_ppc64_set_clszB)( Int ); |
| 150 | #endif |
| 151 | |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 152 | /* X86: set to 1 if the host is able to do {ld,st}mxcsr (load/store |
| 153 | the SSE control/status register), else zero. Is referenced from |
| 154 | assembly code, so do not change from a 32-bit int. */ |
sewardj | 7821e2e | 2005-08-08 00:35:46 +0000 | [diff] [blame] | 155 | #if defined(VGA_x86) |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 156 | extern UInt VG_(machine_x86_have_mxcsr); |
sewardj | 7821e2e | 2005-08-08 00:35:46 +0000 | [diff] [blame] | 157 | #endif |
| 158 | |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 159 | /* PPC32: set to 1 if FP instructions are supported in user-space, |
| 160 | else 0. Is referenced from assembly code, so do not change from a |
| 161 | 32-bit int. */ |
| 162 | #if defined(VGA_ppc32) |
sewardj | 2c36d42 | 2005-11-13 01:59:22 +0000 | [diff] [blame] | 163 | extern UInt VG_(machine_ppc32_has_FP); |
sewardj | e2d1e67 | 2005-11-12 23:10:48 +0000 | [diff] [blame] | 164 | #endif |
| 165 | |
| 166 | /* PPC32: set to 1 if Altivec instructions are supported in |
| 167 | user-space, else 0. Is referenced from assembly code, so do not |
| 168 | change from a 32-bit int. */ |
| 169 | #if defined(VGA_ppc32) |
| 170 | extern UInt VG_(machine_ppc32_has_VMX); |
| 171 | #endif |
sewardj | 7821e2e | 2005-08-08 00:35:46 +0000 | [diff] [blame] | 172 | |
sewardj | 2c48c7b | 2005-11-29 13:05:56 +0000 | [diff] [blame] | 173 | /* PPC64: set to 1 if Altivec instructions are supported in |
| 174 | user-space, else 0. Is referenced from assembly code, so do not |
| 175 | change from a 64-bit int. */ |
| 176 | #if defined(VGA_ppc64) |
| 177 | extern ULong VG_(machine_ppc64_has_VMX); |
| 178 | #endif |
| 179 | |
njn | f536bbb | 2005-06-13 04:21:38 +0000 | [diff] [blame] | 180 | #endif // __PUB_CORE_MACHINE_H |
| 181 | |
| 182 | /*--------------------------------------------------------------------*/ |
| 183 | /*--- end ---*/ |
| 184 | /*--------------------------------------------------------------------*/ |