sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 1 | |
| 2 | /*--------------------------------------------------------------------*/ |
njn | 2e8f4ef | 2005-05-14 21:44:20 +0000 | [diff] [blame] | 3 | /*--- Asm-only TransTab stuff. pub_core_transtab_asm.h ---*/ |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 4 | /*--------------------------------------------------------------------*/ |
| 5 | |
| 6 | /* |
njn | b9c427c | 2004-12-01 14:14:42 +0000 | [diff] [blame] | 7 | This file is part of Valgrind, a dynamic binary instrumentation |
| 8 | framework. |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 9 | |
Elliott Hughes | ed39800 | 2017-06-21 14:41:24 -0700 | [diff] [blame] | 10 | Copyright (C) 2000-2017 Julian Seward |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 11 | jseward@acm.org |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 12 | |
| 13 | This program is free software; you can redistribute it and/or |
| 14 | modify it under the terms of the GNU General Public License as |
| 15 | published by the Free Software Foundation; either version 2 of the |
| 16 | License, or (at your option) any later version. |
| 17 | |
| 18 | This program is distributed in the hope that it will be useful, but |
| 19 | WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 21 | General Public License for more details. |
| 22 | |
| 23 | You should have received a copy of the GNU General Public License |
| 24 | along with this program; if not, write to the Free Software |
| 25 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 26 | 02111-1307, USA. |
| 27 | |
njn25 | e49d8e7 | 2002-09-23 09:36:25 +0000 | [diff] [blame] | 28 | The GNU General Public License is contained in the file COPYING. |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 29 | */ |
| 30 | |
njn | 2e8f4ef | 2005-05-14 21:44:20 +0000 | [diff] [blame] | 31 | #ifndef __PUB_CORE_TRANSTAB_ASM_H |
| 32 | #define __PUB_CORE_TRANSTAB_ASM_H |
sewardj | 91f6278 | 2004-11-29 19:47:54 +0000 | [diff] [blame] | 33 | |
sewardj | 3387dda | 2005-12-26 17:58:58 +0000 | [diff] [blame] | 34 | /* Constants for the fast translation lookup cache. It is a direct |
| 35 | mapped cache, with 2^VG_TT_FAST_BITS entries. |
| 36 | |
| 37 | On x86/amd64, the cache index is computed as |
| 38 | 'address[VG_TT_FAST_BITS-1 : 0]'. |
| 39 | |
sewardj | f0c1250 | 2014-01-12 12:54:00 +0000 | [diff] [blame] | 40 | On ppc32/ppc64/mips32/mips64/arm64, the bottom two bits of |
| 41 | instruction addresses are zero, which means that function causes |
| 42 | only 1/4 of the entries to ever be used. So instead the function |
| 43 | is '(address >>u 2)[VG_TT_FAST_BITS-1 : 0]' on those targets. |
sewardj | 59570ff | 2010-01-01 11:59:33 +0000 | [diff] [blame] | 44 | |
sewardj | 291849f | 2012-04-20 23:58:55 +0000 | [diff] [blame] | 45 | On ARM we shift by 1, since Thumb insns can be of size 2, hence to |
| 46 | minimise collisions and maximise cache utilisation we need to take |
| 47 | into account all but the least significant bit. |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 48 | |
| 49 | On s390x the rightmost bit of an instruction address is zero. |
| 50 | For best table utilization shift the address to the right by 1 bit. */ |
sewardj | 3387dda | 2005-12-26 17:58:58 +0000 | [diff] [blame] | 51 | |
sewardj | ce29f37 | 2005-10-19 11:23:07 +0000 | [diff] [blame] | 52 | #define VG_TT_FAST_BITS 15 |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 53 | #define VG_TT_FAST_SIZE (1 << VG_TT_FAST_BITS) |
| 54 | #define VG_TT_FAST_MASK ((VG_TT_FAST_SIZE) - 1) |
| 55 | |
sewardj | 3387dda | 2005-12-26 17:58:58 +0000 | [diff] [blame] | 56 | /* This macro isn't usable in asm land; nevertheless this seems |
| 57 | like a good place to put it. */ |
sewardj | 4778c66 | 2011-04-28 14:58:15 +0000 | [diff] [blame] | 58 | |
sewardj | 3387dda | 2005-12-26 17:58:58 +0000 | [diff] [blame] | 59 | #if defined(VGA_x86) || defined(VGA_amd64) |
| 60 | # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) ) & VG_TT_FAST_MASK) |
sewardj | 4778c66 | 2011-04-28 14:58:15 +0000 | [diff] [blame] | 61 | |
| 62 | #elif defined(VGA_s390x) || defined(VGA_arm) |
sewardj | b5b8740 | 2011-03-07 16:05:35 +0000 | [diff] [blame] | 63 | # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 1) & VG_TT_FAST_MASK) |
sewardj | 4778c66 | 2011-04-28 14:58:15 +0000 | [diff] [blame] | 64 | |
carll | cae0cc2 | 2014-08-07 23:17:29 +0000 | [diff] [blame] | 65 | #elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ |
| 66 | || defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64) |
sewardj | 4778c66 | 2011-04-28 14:58:15 +0000 | [diff] [blame] | 67 | # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 2) & VG_TT_FAST_MASK) |
| 68 | |
sewardj | 3387dda | 2005-12-26 17:58:58 +0000 | [diff] [blame] | 69 | #else |
| 70 | # error "VG_TT_FAST_HASH: unknown platform" |
| 71 | #endif |
| 72 | |
njn | 2e8f4ef | 2005-05-14 21:44:20 +0000 | [diff] [blame] | 73 | #endif // __PUB_CORE_TRANSTAB_ASM_H |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 74 | |
| 75 | /*--------------------------------------------------------------------*/ |
nethercote | 5a2664c | 2004-09-02 15:37:39 +0000 | [diff] [blame] | 76 | /*--- end ---*/ |
sewardj | de4a1d0 | 2002-03-22 01:27:54 +0000 | [diff] [blame] | 77 | /*--------------------------------------------------------------------*/ |