blob: 9d3cf86e7c02a180b6759bf77ae52ea501aaab0e [file] [log] [blame]
sewardjde4a1d02002-03-22 01:27:54 +00001
2/*--------------------------------------------------------------------*/
3/*--- Maintain bitmaps of memory, tracking the accessibility (A) ---*/
4/*--- and validity (V) status of each byte. ---*/
5/*--- vg_memory.c ---*/
6/*--------------------------------------------------------------------*/
7
8/*
9 This file is part of Valgrind, an x86 protected-mode emulator
10 designed for debugging and profiling binaries on x86-Unixes.
11
12 Copyright (C) 2000-2002 Julian Seward
13 jseward@acm.org
sewardjde4a1d02002-03-22 01:27:54 +000014
15 This program is free software; you can redistribute it and/or
16 modify it under the terms of the GNU General Public License as
17 published by the Free Software Foundation; either version 2 of the
18 License, or (at your option) any later version.
19
20 This program is distributed in the hope that it will be useful, but
21 WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23 General Public License for more details.
24
25 You should have received a copy of the GNU General Public License
26 along with this program; if not, write to the Free Software
27 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
28 02111-1307, USA.
29
30 The GNU General Public License is contained in the file LICENSE.
31*/
32
33#include "vg_include.h"
34
35/* Define to debug the mem audit system. */
36/* #define VG_DEBUG_MEMORY */
37
38/* Define to debug the memory-leak-detector. */
39/* #define VG_DEBUG_LEAKCHECK */
40
41/* Define to collect detailed performance info. */
42/* #define VG_PROFILE_MEMORY */
43
44
45/*------------------------------------------------------------*/
46/*--- Low-level support for memory checking. ---*/
47/*------------------------------------------------------------*/
48
49/*
50 All reads and writes are checked against a memory map, which
51 records the state of all memory in the process. The memory map is
52 organised like this:
53
54 The top 16 bits of an address are used to index into a top-level
55 map table, containing 65536 entries. Each entry is a pointer to a
56 second-level map, which records the accesibililty and validity
57 permissions for the 65536 bytes indexed by the lower 16 bits of the
58 address. Each byte is represented by nine bits, one indicating
59 accessibility, the other eight validity. So each second-level map
60 contains 73728 bytes. This two-level arrangement conveniently
61 divides the 4G address space into 64k lumps, each size 64k bytes.
62
63 All entries in the primary (top-level) map must point to a valid
64 secondary (second-level) map. Since most of the 4G of address
65 space will not be in use -- ie, not mapped at all -- there is a
66 distinguished secondary map, which indicates `not addressible and
67 not valid' writeable for all bytes. Entries in the primary map for
68 which the entire 64k is not in use at all point at this
69 distinguished map.
70
71 [...] lots of stuff deleted due to out of date-ness
72
73 As a final optimisation, the alignment and address checks for
74 4-byte loads and stores are combined in a neat way. The primary
75 map is extended to have 262144 entries (2^18), rather than 2^16.
76 The top 3/4 of these entries are permanently set to the
77 distinguished secondary map. For a 4-byte load/store, the
78 top-level map is indexed not with (addr >> 16) but instead f(addr),
79 where
80
81 f( XXXX XXXX XXXX XXXX ____ ____ ____ __YZ )
82 = ____ ____ ____ __YZ XXXX XXXX XXXX XXXX or
83 = ____ ____ ____ __ZY XXXX XXXX XXXX XXXX
84
85 ie the lowest two bits are placed above the 16 high address bits.
86 If either of these two bits are nonzero, the address is misaligned;
87 this will select a secondary map from the upper 3/4 of the primary
88 map. Because this is always the distinguished secondary map, a
89 (bogus) address check failure will result. The failure handling
90 code can then figure out whether this is a genuine addr check
91 failure or whether it is a possibly-legitimate access at a
92 misaligned address.
93*/
94
95
96/*------------------------------------------------------------*/
97/*--- Crude profiling machinery. ---*/
98/*------------------------------------------------------------*/
99
100#ifdef VG_PROFILE_MEMORY
101
102#define N_PROF_EVENTS 120
103
104static UInt event_ctr[N_PROF_EVENTS];
105
106static void init_prof_mem ( void )
107{
108 Int i;
109 for (i = 0; i < N_PROF_EVENTS; i++)
110 event_ctr[i] = 0;
111}
112
113void VG_(done_prof_mem) ( void )
114{
115 Int i;
116 for (i = 0; i < N_PROF_EVENTS; i++) {
117 if ((i % 10) == 0)
118 VG_(printf)("\n");
119 if (event_ctr[i] > 0)
120 VG_(printf)( "prof mem event %2d: %d\n", i, event_ctr[i] );
121 }
122 VG_(printf)("\n");
123}
124
125#define PROF_EVENT(ev) \
126 do { vg_assert((ev) >= 0 && (ev) < N_PROF_EVENTS); \
127 event_ctr[ev]++; \
128 } while (False);
129
130#else
131
132static void init_prof_mem ( void ) { }
133 void VG_(done_prof_mem) ( void ) { }
134
135#define PROF_EVENT(ev) /* */
136
137#endif
138
139/* Event index. If just the name of the fn is given, this means the
140 number of calls to the fn. Otherwise it is the specified event.
141
142 10 alloc_secondary_map
143
144 20 get_abit
145 21 get_vbyte
146 22 set_abit
147 23 set_vbyte
148 24 get_abits4_ALIGNED
149 25 get_vbytes4_ALIGNED
150
151 30 set_address_range_perms
152 31 set_address_range_perms(lower byte loop)
153 32 set_address_range_perms(quadword loop)
154 33 set_address_range_perms(upper byte loop)
155
156 35 make_noaccess
157 36 make_writable
158 37 make_readable
159
160 40 copy_address_range_perms
161 41 copy_address_range_perms(byte loop)
162 42 check_writable
163 43 check_writable(byte loop)
164 44 check_readable
165 45 check_readable(byte loop)
166 46 check_readable_asciiz
167 47 check_readable_asciiz(byte loop)
168
169 50 make_aligned_word_NOACCESS
170 51 make_aligned_word_WRITABLE
171
172 60 helperc_LOADV4
173 61 helperc_STOREV4
174 62 helperc_LOADV2
175 63 helperc_STOREV2
176 64 helperc_LOADV1
177 65 helperc_STOREV1
178
179 70 rim_rd_V4_SLOWLY
180 71 rim_wr_V4_SLOWLY
181 72 rim_rd_V2_SLOWLY
182 73 rim_wr_V2_SLOWLY
183 74 rim_rd_V1_SLOWLY
184 75 rim_wr_V1_SLOWLY
185
186 80 fpu_read
187 81 fpu_read aligned 4
188 82 fpu_read aligned 8
189 83 fpu_read 2
190 84 fpu_read 10
191
192 85 fpu_write
193 86 fpu_write aligned 4
194 87 fpu_write aligned 8
195 88 fpu_write 2
196 89 fpu_write 10
197
198 90 fpu_read_check_SLOWLY
199 91 fpu_read_check_SLOWLY(byte loop)
200 92 fpu_write_check_SLOWLY
201 93 fpu_write_check_SLOWLY(byte loop)
202
203 100 is_plausible_stack_addr
204 101 handle_esp_assignment
205 102 handle_esp_assignment(-4)
206 103 handle_esp_assignment(+4)
207 104 handle_esp_assignment(+16)
208 105 handle_esp_assignment(-12)
209 106 handle_esp_assignment(+8)
210 107 handle_esp_assignment(-8)
211
212 110 vg_handle_esp_assignment_SLOWLY
213 111 vg_handle_esp_assignment_SLOWLY(normal; move down)
214 112 vg_handle_esp_assignment_SLOWLY(normal; move up)
215 113 vg_handle_esp_assignment_SLOWLY(normal)
216 114 vg_handle_esp_assignment_SLOWLY(>= HUGE_DELTA)
217*/
218
219/*------------------------------------------------------------*/
220/*--- Function declarations. ---*/
221/*------------------------------------------------------------*/
222
223/* Set permissions for an address range. Not speed-critical. */
224void VGM_(make_noaccess) ( Addr a, UInt len );
225void VGM_(make_writable) ( Addr a, UInt len );
226void VGM_(make_readable) ( Addr a, UInt len );
227
228/* Check permissions for an address range. Not speed-critical. */
229Bool VGM_(check_writable) ( Addr a, UInt len, Addr* bad_addr );
230Bool VGM_(check_readable) ( Addr a, UInt len, Addr* bad_addr );
231Bool VGM_(check_readable_asciiz) ( Addr a, Addr* bad_addr );
232
233static UInt vgm_rd_V4_SLOWLY ( Addr a );
234static UInt vgm_rd_V2_SLOWLY ( Addr a );
235static UInt vgm_rd_V1_SLOWLY ( Addr a );
236static void vgm_wr_V4_SLOWLY ( Addr a, UInt vbytes );
237static void vgm_wr_V2_SLOWLY ( Addr a, UInt vbytes );
238static void vgm_wr_V1_SLOWLY ( Addr a, UInt vbytes );
239static void fpu_read_check_SLOWLY ( Addr addr, Int size );
240static void fpu_write_check_SLOWLY ( Addr addr, Int size );
241
242
243/*------------------------------------------------------------*/
244/*--- Data defns. ---*/
245/*------------------------------------------------------------*/
246
247typedef
248 struct {
249 UChar abits[8192];
250 UChar vbyte[65536];
251 }
252 SecMap;
253
254/* These two are statically allocated. Should they be non-public? */
255SecMap* VG_(primary_map)[ /*65536*/ 262144 ];
256static SecMap vg_distinguished_secondary_map;
257
258#define IS_DISTINGUISHED_SM(smap) \
259 ((smap) == &vg_distinguished_secondary_map)
260
261#define ENSURE_MAPPABLE(addr,caller) \
262 do { \
263 if (IS_DISTINGUISHED_SM(VG_(primary_map)[(addr) >> 16])) { \
264 VG_(primary_map)[(addr) >> 16] = alloc_secondary_map(caller); \
265 /* VG_(printf)("new 2map because of %p\n", addr); */ \
266 } \
267 } while(0)
268
269#define BITARR_SET(aaa_p,iii_p) \
270 do { \
271 UInt iii = (UInt)iii_p; \
272 UChar* aaa = (UChar*)aaa_p; \
273 aaa[iii >> 3] |= (1 << (iii & 7)); \
274 } while (0)
275
276#define BITARR_CLEAR(aaa_p,iii_p) \
277 do { \
278 UInt iii = (UInt)iii_p; \
279 UChar* aaa = (UChar*)aaa_p; \
280 aaa[iii >> 3] &= ~(1 << (iii & 7)); \
281 } while (0)
282
283#define BITARR_TEST(aaa_p,iii_p) \
284 (0 != (((UChar*)aaa_p)[ ((UInt)iii_p) >> 3 ] \
285 & (1 << (((UInt)iii_p) & 7)))) \
286
287
288#define VGM_BIT_VALID 0
289#define VGM_BIT_INVALID 1
290
291#define VGM_NIBBLE_VALID 0
292#define VGM_NIBBLE_INVALID 0xF
293
294#define VGM_BYTE_VALID 0
295#define VGM_BYTE_INVALID 0xFF
296
297#define VGM_WORD_VALID 0
298#define VGM_WORD_INVALID 0xFFFFFFFF
299
300#define VGM_EFLAGS_VALID 0xFFFFFFFE
301#define VGM_EFLAGS_INVALID 0xFFFFFFFF
302
303
304#define IS_ALIGNED4_ADDR(aaa_p) (0 == (((UInt)(aaa_p)) & 3))
305
306
307/*------------------------------------------------------------*/
308/*--- Basic bitmap management, reading and writing. ---*/
309/*------------------------------------------------------------*/
310
311/* Allocate and initialise a secondary map. */
312
313static SecMap* alloc_secondary_map ( __attribute__ ((unused))
314 Char* caller )
315{
316 SecMap* map;
317 UInt i;
318 PROF_EVENT(10);
319
320 /* Mark all bytes as invalid access and invalid value. */
321
322 /* It just happens that a SecMap occupies exactly 18 pages --
323 although this isn't important, so the following assert is
324 spurious. */
325 vg_assert(0 == (sizeof(SecMap) % VKI_BYTES_PER_PAGE));
326 map = VG_(get_memory_from_mmap)( sizeof(SecMap) );
327
328 for (i = 0; i < 8192; i++)
329 map->abits[i] = VGM_BYTE_INVALID; /* Invalid address */
330 for (i = 0; i < 65536; i++)
331 map->vbyte[i] = VGM_BYTE_INVALID; /* Invalid Value */
332
333 /* VG_(printf)("ALLOC_2MAP(%s)\n", caller ); */
334 return map;
335}
336
337
338/* Basic reading/writing of the bitmaps, for byte-sized accesses. */
339
340static __inline__ UChar get_abit ( Addr a )
341{
342 SecMap* sm = VG_(primary_map)[a >> 16];
343 UInt sm_off = a & 0xFFFF;
344 PROF_EVENT(20);
345 return BITARR_TEST(sm->abits, sm_off)
346 ? VGM_BIT_INVALID : VGM_BIT_VALID;
347}
348
349static __inline__ UChar get_vbyte ( Addr a )
350{
351 SecMap* sm = VG_(primary_map)[a >> 16];
352 UInt sm_off = a & 0xFFFF;
353 PROF_EVENT(21);
354 return sm->vbyte[sm_off];
355}
356
357static __inline__ void set_abit ( Addr a, UChar abit )
358{
359 SecMap* sm;
360 UInt sm_off;
361 PROF_EVENT(22);
362 ENSURE_MAPPABLE(a, "set_abit");
363 sm = VG_(primary_map)[a >> 16];
364 sm_off = a & 0xFFFF;
365 if (abit)
366 BITARR_SET(sm->abits, sm_off);
367 else
368 BITARR_CLEAR(sm->abits, sm_off);
369}
370
371static __inline__ void set_vbyte ( Addr a, UChar vbyte )
372{
373 SecMap* sm;
374 UInt sm_off;
375 PROF_EVENT(23);
376 ENSURE_MAPPABLE(a, "set_vbyte");
377 sm = VG_(primary_map)[a >> 16];
378 sm_off = a & 0xFFFF;
379 sm->vbyte[sm_off] = vbyte;
380}
381
382
383/* Reading/writing of the bitmaps, for aligned word-sized accesses. */
384
385static __inline__ UChar get_abits4_ALIGNED ( Addr a )
386{
387 SecMap* sm;
388 UInt sm_off;
389 UChar abits8;
390 PROF_EVENT(24);
391# ifdef VG_DEBUG_MEMORY
392 vg_assert(IS_ALIGNED4_ADDR(a));
393# endif
394 sm = VG_(primary_map)[a >> 16];
395 sm_off = a & 0xFFFF;
396 abits8 = sm->abits[sm_off >> 3];
397 abits8 >>= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
398 abits8 &= 0x0F;
399 return abits8;
400}
401
402static UInt __inline__ get_vbytes4_ALIGNED ( Addr a )
403{
404 SecMap* sm = VG_(primary_map)[a >> 16];
405 UInt sm_off = a & 0xFFFF;
406 PROF_EVENT(25);
407# ifdef VG_DEBUG_MEMORY
408 vg_assert(IS_ALIGNED4_ADDR(a));
409# endif
410 return ((UInt*)(sm->vbyte))[sm_off >> 2];
411}
412
413
414/*------------------------------------------------------------*/
415/*--- Setting permissions over address ranges. ---*/
416/*------------------------------------------------------------*/
417
418static void set_address_range_perms ( Addr a, UInt len,
419 UInt example_a_bit,
420 UInt example_v_bit )
421{
422 UChar vbyte, abyte8;
423 UInt vword4, sm_off;
424 SecMap* sm;
425
426 PROF_EVENT(30);
427
428 if (len == 0)
429 return;
430
431 if (len > 100 * 1000 * 1000)
432 VG_(message)(Vg_UserMsg,
433 "Warning: set address range perms: "
434 "large range %d, a %d, v %d",
435 len, example_a_bit, example_v_bit );
436
437 VGP_PUSHCC(VgpSARP);
438
439 /* Requests to change permissions of huge address ranges may
440 indicate bugs in our machinery. 30,000,000 is arbitrary, but so
441 far all legitimate requests have fallen beneath that size. */
442 /* 4 Mar 02: this is just stupid; get rid of it. */
443 /* vg_assert(len < 30000000); */
444
445 /* Check the permissions make sense. */
446 vg_assert(example_a_bit == VGM_BIT_VALID
447 || example_a_bit == VGM_BIT_INVALID);
448 vg_assert(example_v_bit == VGM_BIT_VALID
449 || example_v_bit == VGM_BIT_INVALID);
450 if (example_a_bit == VGM_BIT_INVALID)
451 vg_assert(example_v_bit == VGM_BIT_INVALID);
452
453 /* The validity bits to write. */
454 vbyte = example_v_bit==VGM_BIT_VALID
455 ? VGM_BYTE_VALID : VGM_BYTE_INVALID;
456
457 /* In order that we can charge through the address space at 8
458 bytes/main-loop iteration, make up some perms. */
459 abyte8 = (example_a_bit << 7)
460 | (example_a_bit << 6)
461 | (example_a_bit << 5)
462 | (example_a_bit << 4)
463 | (example_a_bit << 3)
464 | (example_a_bit << 2)
465 | (example_a_bit << 1)
466 | (example_a_bit << 0);
467 vword4 = (vbyte << 24) | (vbyte << 16) | (vbyte << 8) | vbyte;
468
469# ifdef VG_DEBUG_MEMORY
470 /* Do it ... */
471 while (True) {
472 PROF_EVENT(31);
473 if (len == 0) break;
474 set_abit ( a, example_a_bit );
475 set_vbyte ( a, vbyte );
476 a++;
477 len--;
478 }
479
480# else
481 /* Slowly do parts preceding 8-byte alignment. */
482 while (True) {
483 PROF_EVENT(31);
484 if (len == 0) break;
485 if ((a % 8) == 0) break;
486 set_abit ( a, example_a_bit );
487 set_vbyte ( a, vbyte );
488 a++;
489 len--;
490 }
491
492 if (len == 0) {
493 VGP_POPCC;
494 return;
495 }
496 vg_assert((a % 8) == 0 && len > 0);
497
498 /* Once aligned, go fast. */
499 while (True) {
500 PROF_EVENT(32);
501 if (len < 8) break;
502 ENSURE_MAPPABLE(a, "set_address_range_perms(fast)");
503 sm = VG_(primary_map)[a >> 16];
504 sm_off = a & 0xFFFF;
505 sm->abits[sm_off >> 3] = abyte8;
506 ((UInt*)(sm->vbyte))[(sm_off >> 2) + 0] = vword4;
507 ((UInt*)(sm->vbyte))[(sm_off >> 2) + 1] = vword4;
508 a += 8;
509 len -= 8;
510 }
511
512 if (len == 0) {
513 VGP_POPCC;
514 return;
515 }
516 vg_assert((a % 8) == 0 && len > 0 && len < 8);
517
518 /* Finish the upper fragment. */
519 while (True) {
520 PROF_EVENT(33);
521 if (len == 0) break;
522 set_abit ( a, example_a_bit );
523 set_vbyte ( a, vbyte );
524 a++;
525 len--;
526 }
527# endif
528
529 /* Check that zero page and highest page have not been written to
530 -- this could happen with buggy syscall wrappers. Today
531 (2001-04-26) had precisely such a problem with
532 __NR_setitimer. */
533 vg_assert(VG_(first_and_last_secondaries_look_plausible));
534 VGP_POPCC;
535}
536
537
538/* Set permissions for address ranges ... */
539
540void VGM_(make_noaccess) ( Addr a, UInt len )
541{
542 PROF_EVENT(35);
543 set_address_range_perms ( a, len, VGM_BIT_INVALID, VGM_BIT_INVALID );
544}
545
546void VGM_(make_writable) ( Addr a, UInt len )
547{
548 PROF_EVENT(36);
549 set_address_range_perms ( a, len, VGM_BIT_VALID, VGM_BIT_INVALID );
550}
551
552void VGM_(make_readable) ( Addr a, UInt len )
553{
554 PROF_EVENT(37);
555 set_address_range_perms ( a, len, VGM_BIT_VALID, VGM_BIT_VALID );
556}
557
558void VGM_(make_readwritable) ( Addr a, UInt len )
559{
560 PROF_EVENT(38);
561 set_address_range_perms ( a, len, VGM_BIT_VALID, VGM_BIT_VALID );
562}
563
564/* Block-copy permissions (needed for implementing realloc()). */
565
566void VGM_(copy_address_range_perms) ( Addr src, Addr dst, UInt len )
567{
568 UInt i;
569 PROF_EVENT(40);
570 for (i = 0; i < len; i++) {
571 UChar abit = get_abit ( src+i );
572 UChar vbyte = get_vbyte ( src+i );
573 PROF_EVENT(41);
574 set_abit ( dst+i, abit );
575 set_vbyte ( dst+i, vbyte );
576 }
577}
578
579
580/* Check permissions for address range. If inadequate permissions
581 exist, *bad_addr is set to the offending address, so the caller can
582 know what it is. */
583
584Bool VGM_(check_writable) ( Addr a, UInt len, Addr* bad_addr )
585{
586 UInt i;
587 UChar abit;
588 PROF_EVENT(42);
589 for (i = 0; i < len; i++) {
590 PROF_EVENT(43);
591 abit = get_abit(a);
592 if (abit == VGM_BIT_INVALID) {
593 if (bad_addr != NULL) *bad_addr = a;
594 return False;
595 }
596 a++;
597 }
598 return True;
599}
600
601Bool VGM_(check_readable) ( Addr a, UInt len, Addr* bad_addr )
602{
603 UInt i;
604 UChar abit;
605 UChar vbyte;
606 PROF_EVENT(44);
607 for (i = 0; i < len; i++) {
608 abit = get_abit(a);
609 vbyte = get_vbyte(a);
610 PROF_EVENT(45);
611 if (abit != VGM_BIT_VALID || vbyte != VGM_BYTE_VALID) {
612 if (bad_addr != NULL) *bad_addr = a;
613 return False;
614 }
615 a++;
616 }
617 return True;
618}
619
620
621/* Check a zero-terminated ascii string. Tricky -- don't want to
622 examine the actual bytes, to find the end, until we're sure it is
623 safe to do so. */
624
625Bool VGM_(check_readable_asciiz) ( Addr a, Addr* bad_addr )
626{
627 UChar abit;
628 UChar vbyte;
629 PROF_EVENT(46);
630 while (True) {
631 PROF_EVENT(47);
632 abit = get_abit(a);
633 vbyte = get_vbyte(a);
634 if (abit != VGM_BIT_VALID || vbyte != VGM_BYTE_VALID) {
635 if (bad_addr != NULL) *bad_addr = a;
636 return False;
637 }
638 /* Ok, a is safe to read. */
639 if (* ((UChar*)a) == 0) return True;
640 a++;
641 }
642}
643
644
645/* Setting permissions for aligned words. This supports fast stack
646 operations. */
647
648static __inline__ void make_aligned_word_NOACCESS ( Addr a )
649{
650 SecMap* sm;
651 UInt sm_off;
652 UChar mask;
653 PROF_EVENT(50);
654# ifdef VG_DEBUG_MEMORY
655 vg_assert(IS_ALIGNED4_ADDR(a));
656# endif
657 ENSURE_MAPPABLE(a, "make_aligned_word_NOACCESS");
658 sm = VG_(primary_map)[a >> 16];
659 sm_off = a & 0xFFFF;
660 ((UInt*)(sm->vbyte))[sm_off >> 2] = VGM_WORD_INVALID;
661 mask = 0x0F;
662 mask <<= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
663 /* mask now contains 1s where we wish to make address bits
664 invalid (1s). */
665 sm->abits[sm_off >> 3] |= mask;
666}
667
668static __inline__ void make_aligned_word_WRITABLE ( Addr a )
669{
670 SecMap* sm;
671 UInt sm_off;
672 UChar mask;
673 PROF_EVENT(51);
674# ifdef VG_DEBUG_MEMORY
675 vg_assert(IS_ALIGNED4_ADDR(a));
676# endif
677 ENSURE_MAPPABLE(a, "make_aligned_word_WRITABLE");
678 sm = VG_(primary_map)[a >> 16];
679 sm_off = a & 0xFFFF;
680 ((UInt*)(sm->vbyte))[sm_off >> 2] = VGM_WORD_INVALID;
681 mask = 0x0F;
682 mask <<= (a & 4 /* 100b */); /* a & 4 is either 0 or 4 */
683 /* mask now contains 1s where we wish to make address bits
684 invalid (0s). */
685 sm->abits[sm_off >> 3] &= ~mask;
686}
687
688
689/*------------------------------------------------------------*/
690/*--- Functions called directly from generated code. ---*/
691/*------------------------------------------------------------*/
692
693static __inline__ UInt rotateRight16 ( UInt x )
694{
695 /* Amazingly, gcc turns this into a single rotate insn. */
696 return (x >> 16) | (x << 16);
697}
698
699
700static __inline__ UInt shiftRight16 ( UInt x )
701{
702 return x >> 16;
703}
704
705
706/* Read/write 1/2/4 sized V bytes, and emit an address error if
707 needed. */
708
709/* VG_(helperc_{LD,ST}V{1,2,4}) handle the common case fast.
710 Under all other circumstances, it defers to the relevant _SLOWLY
711 function, which can handle all situations.
712*/
713
714UInt VG_(helperc_LOADV4) ( Addr a )
715{
716# ifdef VG_DEBUG_MEMORY
717 return vgm_rd_V4_SLOWLY(a);
718# else
719 UInt sec_no = rotateRight16(a) & 0x3FFFF;
720 SecMap* sm = VG_(primary_map)[sec_no];
721 UInt a_off = (a & 0xFFFF) >> 3;
722 UChar abits = sm->abits[a_off];
723 abits >>= (a & 4);
724 abits &= 15;
725 PROF_EVENT(60);
726 if (abits == VGM_NIBBLE_VALID) {
727 /* Handle common case quickly: a is suitably aligned, is mapped,
728 and is addressible. */
729 UInt v_off = a & 0xFFFF;
730 return ((UInt*)(sm->vbyte))[ v_off >> 2 ];
731 } else {
732 /* Slow but general case. */
733 return vgm_rd_V4_SLOWLY(a);
734 }
735# endif
736}
737
738void VG_(helperc_STOREV4) ( Addr a, UInt vbytes )
739{
740# ifdef VG_DEBUG_MEMORY
741 vgm_wr_V4_SLOWLY(a, vbytes);
742# else
743 UInt sec_no = rotateRight16(a) & 0x3FFFF;
744 SecMap* sm = VG_(primary_map)[sec_no];
745 UInt a_off = (a & 0xFFFF) >> 3;
746 UChar abits = sm->abits[a_off];
747 abits >>= (a & 4);
748 abits &= 15;
749 PROF_EVENT(61);
750 if (abits == VGM_NIBBLE_VALID) {
751 /* Handle common case quickly: a is suitably aligned, is mapped,
752 and is addressible. */
753 UInt v_off = a & 0xFFFF;
754 ((UInt*)(sm->vbyte))[ v_off >> 2 ] = vbytes;
755 } else {
756 /* Slow but general case. */
757 vgm_wr_V4_SLOWLY(a, vbytes);
758 }
759# endif
760}
761
762UInt VG_(helperc_LOADV2) ( Addr a )
763{
764# ifdef VG_DEBUG_MEMORY
765 return vgm_rd_V2_SLOWLY(a);
766# else
767 UInt sec_no = rotateRight16(a) & 0x1FFFF;
768 SecMap* sm = VG_(primary_map)[sec_no];
769 UInt a_off = (a & 0xFFFF) >> 3;
770 PROF_EVENT(62);
771 if (sm->abits[a_off] == VGM_BYTE_VALID) {
772 /* Handle common case quickly. */
773 UInt v_off = a & 0xFFFF;
774 return 0xFFFF0000
775 |
776 (UInt)( ((UShort*)(sm->vbyte))[ v_off >> 1 ] );
777 } else {
778 /* Slow but general case. */
779 return vgm_rd_V2_SLOWLY(a);
780 }
781# endif
782}
783
784void VG_(helperc_STOREV2) ( Addr a, UInt vbytes )
785{
786# ifdef VG_DEBUG_MEMORY
787 vgm_wr_V2_SLOWLY(a, vbytes);
788# else
789 UInt sec_no = rotateRight16(a) & 0x1FFFF;
790 SecMap* sm = VG_(primary_map)[sec_no];
791 UInt a_off = (a & 0xFFFF) >> 3;
792 PROF_EVENT(63);
793 if (sm->abits[a_off] == VGM_BYTE_VALID) {
794 /* Handle common case quickly. */
795 UInt v_off = a & 0xFFFF;
796 ((UShort*)(sm->vbyte))[ v_off >> 1 ] = vbytes & 0x0000FFFF;
797 } else {
798 /* Slow but general case. */
799 vgm_wr_V2_SLOWLY(a, vbytes);
800 }
801# endif
802}
803
804UInt VG_(helperc_LOADV1) ( Addr a )
805{
806# ifdef VG_DEBUG_MEMORY
807 return vgm_rd_V1_SLOWLY(a);
808# else
809 UInt sec_no = shiftRight16(a);
810 SecMap* sm = VG_(primary_map)[sec_no];
811 UInt a_off = (a & 0xFFFF) >> 3;
812 PROF_EVENT(64);
813 if (sm->abits[a_off] == VGM_BYTE_VALID) {
814 /* Handle common case quickly. */
815 UInt v_off = a & 0xFFFF;
816 return 0xFFFFFF00
817 |
818 (UInt)( ((UChar*)(sm->vbyte))[ v_off ] );
819 } else {
820 /* Slow but general case. */
821 return vgm_rd_V1_SLOWLY(a);
822 }
823# endif
824}
825
826void VG_(helperc_STOREV1) ( Addr a, UInt vbytes )
827{
828# ifdef VG_DEBUG_MEMORY
829 vgm_wr_V1_SLOWLY(a, vbytes);
830# else
831 UInt sec_no = shiftRight16(a);
832 SecMap* sm = VG_(primary_map)[sec_no];
833 UInt a_off = (a & 0xFFFF) >> 3;
834 PROF_EVENT(65);
835 if (sm->abits[a_off] == VGM_BYTE_VALID) {
836 /* Handle common case quickly. */
837 UInt v_off = a & 0xFFFF;
838 ((UChar*)(sm->vbyte))[ v_off ] = vbytes & 0x000000FF;
839 } else {
840 /* Slow but general case. */
841 vgm_wr_V1_SLOWLY(a, vbytes);
842 }
843# endif
844}
845
846
847/*------------------------------------------------------------*/
848/*--- Fallback functions to handle cases that the above ---*/
849/*--- VG_(helperc_{LD,ST}V{1,2,4}) can't manage. ---*/
850/*------------------------------------------------------------*/
851
852static UInt vgm_rd_V4_SLOWLY ( Addr a )
853{
854 Bool a0ok, a1ok, a2ok, a3ok;
855 UInt vb0, vb1, vb2, vb3;
856
857 PROF_EVENT(70);
858
859 /* First establish independently the addressibility of the 4 bytes
860 involved. */
861 a0ok = get_abit(a+0) == VGM_BIT_VALID;
862 a1ok = get_abit(a+1) == VGM_BIT_VALID;
863 a2ok = get_abit(a+2) == VGM_BIT_VALID;
864 a3ok = get_abit(a+3) == VGM_BIT_VALID;
865
866 /* Also get the validity bytes for the address. */
867 vb0 = (UInt)get_vbyte(a+0);
868 vb1 = (UInt)get_vbyte(a+1);
869 vb2 = (UInt)get_vbyte(a+2);
870 vb3 = (UInt)get_vbyte(a+3);
871
872 /* Now distinguish 3 cases */
873
874 /* Case 1: the address is completely valid, so:
875 - no addressing error
876 - return V bytes as read from memory
877 */
878 if (a0ok && a1ok && a2ok && a3ok) {
879 UInt vw = VGM_WORD_INVALID;
880 vw <<= 8; vw |= vb3;
881 vw <<= 8; vw |= vb2;
882 vw <<= 8; vw |= vb1;
883 vw <<= 8; vw |= vb0;
884 return vw;
885 }
886
887 /* Case 2: the address is completely invalid.
888 - emit addressing error
889 - return V word indicating validity.
890 This sounds strange, but if we make loads from invalid addresses
891 give invalid data, we also risk producing a number of confusing
892 undefined-value errors later, which confuses the fact that the
893 error arose in the first place from an invalid address.
894 */
895 /* VG_(printf)("%p (%d %d %d %d)\n", a, a0ok, a1ok, a2ok, a3ok); */
896 if (!VG_(clo_partial_loads_ok)
897 || ((a & 3) != 0)
898 || (!a0ok && !a1ok && !a2ok && !a3ok)) {
899 VG_(record_address_error)( a, 4, False );
900 return (VGM_BYTE_VALID << 24) | (VGM_BYTE_VALID << 16)
901 | (VGM_BYTE_VALID << 8) | VGM_BYTE_VALID;
902 }
903
904 /* Case 3: the address is partially valid.
905 - no addressing error
906 - returned V word is invalid where the address is invalid,
907 and contains V bytes from memory otherwise.
908 Case 3 is only allowed if VG_(clo_partial_loads_ok) is True
909 (which is the default), and the address is 4-aligned.
910 If not, Case 2 will have applied.
911 */
912 vg_assert(VG_(clo_partial_loads_ok));
913 {
914 UInt vw = VGM_WORD_INVALID;
915 vw <<= 8; vw |= (a3ok ? vb3 : VGM_BYTE_INVALID);
916 vw <<= 8; vw |= (a2ok ? vb2 : VGM_BYTE_INVALID);
917 vw <<= 8; vw |= (a1ok ? vb1 : VGM_BYTE_INVALID);
918 vw <<= 8; vw |= (a0ok ? vb0 : VGM_BYTE_INVALID);
919 return vw;
920 }
921}
922
923static void vgm_wr_V4_SLOWLY ( Addr a, UInt vbytes )
924{
925 /* Check the address for validity. */
926 Bool aerr = False;
927 PROF_EVENT(71);
928
929 if (get_abit(a+0) != VGM_BIT_VALID) aerr = True;
930 if (get_abit(a+1) != VGM_BIT_VALID) aerr = True;
931 if (get_abit(a+2) != VGM_BIT_VALID) aerr = True;
932 if (get_abit(a+3) != VGM_BIT_VALID) aerr = True;
933
934 /* Store the V bytes, remembering to do it little-endian-ly. */
935 set_vbyte( a+0, vbytes & 0x000000FF ); vbytes >>= 8;
936 set_vbyte( a+1, vbytes & 0x000000FF ); vbytes >>= 8;
937 set_vbyte( a+2, vbytes & 0x000000FF ); vbytes >>= 8;
938 set_vbyte( a+3, vbytes & 0x000000FF );
939
940 /* If an address error has happened, report it. */
941 if (aerr)
942 VG_(record_address_error)( a, 4, True );
943}
944
945static UInt vgm_rd_V2_SLOWLY ( Addr a )
946{
947 /* Check the address for validity. */
948 UInt vw = VGM_WORD_INVALID;
949 Bool aerr = False;
950 PROF_EVENT(72);
951
952 if (get_abit(a+0) != VGM_BIT_VALID) aerr = True;
953 if (get_abit(a+1) != VGM_BIT_VALID) aerr = True;
954
955 /* Fetch the V bytes, remembering to do it little-endian-ly. */
956 vw <<= 8; vw |= (UInt)get_vbyte(a+1);
957 vw <<= 8; vw |= (UInt)get_vbyte(a+0);
958
959 /* If an address error has happened, report it. */
960 if (aerr) {
961 VG_(record_address_error)( a, 2, False );
962 vw = (VGM_BYTE_INVALID << 24) | (VGM_BYTE_INVALID << 16)
963 | (VGM_BYTE_VALID << 8) | (VGM_BYTE_VALID);
964 }
965 return vw;
966}
967
968static void vgm_wr_V2_SLOWLY ( Addr a, UInt vbytes )
969{
970 /* Check the address for validity. */
971 Bool aerr = False;
972 PROF_EVENT(73);
973
974 if (get_abit(a+0) != VGM_BIT_VALID) aerr = True;
975 if (get_abit(a+1) != VGM_BIT_VALID) aerr = True;
976
977 /* Store the V bytes, remembering to do it little-endian-ly. */
978 set_vbyte( a+0, vbytes & 0x000000FF ); vbytes >>= 8;
979 set_vbyte( a+1, vbytes & 0x000000FF );
980
981 /* If an address error has happened, report it. */
982 if (aerr)
983 VG_(record_address_error)( a, 2, True );
984}
985
986static UInt vgm_rd_V1_SLOWLY ( Addr a )
987{
988 /* Check the address for validity. */
989 UInt vw = VGM_WORD_INVALID;
990 Bool aerr = False;
991 PROF_EVENT(74);
992
993 if (get_abit(a+0) != VGM_BIT_VALID) aerr = True;
994
995 /* Fetch the V byte. */
996 vw <<= 8; vw |= (UInt)get_vbyte(a+0);
997
998 /* If an address error has happened, report it. */
999 if (aerr) {
1000 VG_(record_address_error)( a, 1, False );
1001 vw = (VGM_BYTE_INVALID << 24) | (VGM_BYTE_INVALID << 16)
1002 | (VGM_BYTE_INVALID << 8) | (VGM_BYTE_VALID);
1003 }
1004 return vw;
1005}
1006
1007static void vgm_wr_V1_SLOWLY ( Addr a, UInt vbytes )
1008{
1009 /* Check the address for validity. */
1010 Bool aerr = False;
1011 PROF_EVENT(75);
1012 if (get_abit(a+0) != VGM_BIT_VALID) aerr = True;
1013
1014 /* Store the V bytes, remembering to do it little-endian-ly. */
1015 set_vbyte( a+0, vbytes & 0x000000FF );
1016
1017 /* If an address error has happened, report it. */
1018 if (aerr)
1019 VG_(record_address_error)( a, 1, True );
1020}
1021
1022
1023/* ---------------------------------------------------------------------
1024 Called from generated code, or from the assembly helpers.
1025 Handlers for value check failures.
1026 ------------------------------------------------------------------ */
1027
1028void VG_(helperc_value_check0_fail) ( void )
1029{
1030 VG_(record_value_error) ( 0 );
1031}
1032
1033void VG_(helperc_value_check1_fail) ( void )
1034{
1035 VG_(record_value_error) ( 1 );
1036}
1037
1038void VG_(helperc_value_check2_fail) ( void )
1039{
1040 VG_(record_value_error) ( 2 );
1041}
1042
1043void VG_(helperc_value_check4_fail) ( void )
1044{
1045 VG_(record_value_error) ( 4 );
1046}
1047
1048
1049/* ---------------------------------------------------------------------
1050 FPU load and store checks, called from generated code.
1051 ------------------------------------------------------------------ */
1052
1053void VGM_(fpu_read_check) ( Addr addr, Int size )
1054{
1055 /* Ensure the read area is both addressible and valid (ie,
1056 readable). If there's an address error, don't report a value
1057 error too; but if there isn't an address error, check for a
1058 value error.
1059
1060 Try to be reasonably fast on the common case; wimp out and defer
1061 to fpu_read_check_SLOWLY for everything else. */
1062
1063 SecMap* sm;
1064 UInt sm_off, v_off, a_off;
1065 Addr addr4;
1066
1067 PROF_EVENT(80);
1068
1069# ifdef VG_DEBUG_MEMORY
1070 fpu_read_check_SLOWLY ( addr, size );
1071# else
1072
1073 if (size == 4) {
1074 if (!IS_ALIGNED4_ADDR(addr)) goto slow4;
1075 PROF_EVENT(81);
1076 /* Properly aligned. */
1077 sm = VG_(primary_map)[addr >> 16];
1078 sm_off = addr & 0xFFFF;
1079 a_off = sm_off >> 3;
1080 if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow4;
1081 /* Properly aligned and addressible. */
1082 v_off = addr & 0xFFFF;
1083 if (((UInt*)(sm->vbyte))[ v_off >> 2 ] != VGM_WORD_VALID)
1084 goto slow4;
1085 /* Properly aligned, addressible and with valid data. */
1086 return;
1087 slow4:
1088 fpu_read_check_SLOWLY ( addr, 4 );
1089 return;
1090 }
1091
1092 if (size == 8) {
1093 if (!IS_ALIGNED4_ADDR(addr)) goto slow8;
1094 PROF_EVENT(82);
1095 /* Properly aligned. Do it in two halves. */
1096 addr4 = addr + 4;
1097 /* First half. */
1098 sm = VG_(primary_map)[addr >> 16];
1099 sm_off = addr & 0xFFFF;
1100 a_off = sm_off >> 3;
1101 if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow8;
1102 /* First half properly aligned and addressible. */
1103 v_off = addr & 0xFFFF;
1104 if (((UInt*)(sm->vbyte))[ v_off >> 2 ] != VGM_WORD_VALID)
1105 goto slow8;
1106 /* Second half. */
1107 sm = VG_(primary_map)[addr4 >> 16];
1108 sm_off = addr4 & 0xFFFF;
1109 a_off = sm_off >> 3;
1110 if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow8;
1111 /* Second half properly aligned and addressible. */
1112 v_off = addr4 & 0xFFFF;
1113 if (((UInt*)(sm->vbyte))[ v_off >> 2 ] != VGM_WORD_VALID)
1114 goto slow8;
1115 /* Both halves properly aligned, addressible and with valid
1116 data. */
1117 return;
1118 slow8:
1119 fpu_read_check_SLOWLY ( addr, 8 );
1120 return;
1121 }
1122
1123 /* Can't be bothered to huff'n'puff to make these (allegedly) rare
1124 cases go quickly. */
1125 if (size == 2) {
1126 PROF_EVENT(83);
1127 fpu_read_check_SLOWLY ( addr, 2 );
1128 return;
1129 }
1130
1131 if (size == 10) {
1132 PROF_EVENT(84);
1133 fpu_read_check_SLOWLY ( addr, 10 );
1134 return;
1135 }
1136
1137 VG_(printf)("size is %d\n", size);
1138 VG_(panic)("vgm_fpu_read_check: unhandled size");
1139# endif
1140}
1141
1142
1143void VGM_(fpu_write_check) ( Addr addr, Int size )
1144{
1145 /* Ensure the written area is addressible, and moan if otherwise.
1146 If it is addressible, make it valid, otherwise invalid.
1147 */
1148
1149 SecMap* sm;
1150 UInt sm_off, v_off, a_off;
1151 Addr addr4;
1152
1153 PROF_EVENT(85);
1154
1155# ifdef VG_DEBUG_MEMORY
1156 fpu_write_check_SLOWLY ( addr, size );
1157# else
1158
1159 if (size == 4) {
1160 if (!IS_ALIGNED4_ADDR(addr)) goto slow4;
1161 PROF_EVENT(86);
1162 /* Properly aligned. */
1163 sm = VG_(primary_map)[addr >> 16];
1164 sm_off = addr & 0xFFFF;
1165 a_off = sm_off >> 3;
1166 if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow4;
1167 /* Properly aligned and addressible. Make valid. */
1168 v_off = addr & 0xFFFF;
1169 ((UInt*)(sm->vbyte))[ v_off >> 2 ] = VGM_WORD_VALID;
1170 return;
1171 slow4:
1172 fpu_write_check_SLOWLY ( addr, 4 );
1173 return;
1174 }
1175
1176 if (size == 8) {
1177 if (!IS_ALIGNED4_ADDR(addr)) goto slow8;
1178 PROF_EVENT(87);
1179 /* Properly aligned. Do it in two halves. */
1180 addr4 = addr + 4;
1181 /* First half. */
1182 sm = VG_(primary_map)[addr >> 16];
1183 sm_off = addr & 0xFFFF;
1184 a_off = sm_off >> 3;
1185 if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow8;
1186 /* First half properly aligned and addressible. Make valid. */
1187 v_off = addr & 0xFFFF;
1188 ((UInt*)(sm->vbyte))[ v_off >> 2 ] = VGM_WORD_VALID;
1189 /* Second half. */
1190 sm = VG_(primary_map)[addr4 >> 16];
1191 sm_off = addr4 & 0xFFFF;
1192 a_off = sm_off >> 3;
1193 if (sm->abits[a_off] != VGM_BYTE_VALID) goto slow8;
1194 /* Second half properly aligned and addressible. */
1195 v_off = addr4 & 0xFFFF;
1196 ((UInt*)(sm->vbyte))[ v_off >> 2 ] = VGM_WORD_VALID;
1197 /* Properly aligned, addressible and with valid data. */
1198 return;
1199 slow8:
1200 fpu_write_check_SLOWLY ( addr, 8 );
1201 return;
1202 }
1203
1204 /* Can't be bothered to huff'n'puff to make these (allegedly) rare
1205 cases go quickly. */
1206 if (size == 2) {
1207 PROF_EVENT(88);
1208 fpu_write_check_SLOWLY ( addr, 2 );
1209 return;
1210 }
1211
1212 if (size == 10) {
1213 PROF_EVENT(89);
1214 fpu_write_check_SLOWLY ( addr, 10 );
1215 return;
1216 }
1217
1218 VG_(printf)("size is %d\n", size);
1219 VG_(panic)("vgm_fpu_write_check: unhandled size");
1220# endif
1221}
1222
1223
1224/* ---------------------------------------------------------------------
1225 Slow, general cases for FPU load and store checks.
1226 ------------------------------------------------------------------ */
1227
1228/* Generic version. Test for both addr and value errors, but if
1229 there's an addr error, don't report a value error even if it
1230 exists. */
1231
1232void fpu_read_check_SLOWLY ( Addr addr, Int size )
1233{
1234 Int i;
1235 Bool aerr = False;
1236 Bool verr = False;
1237 PROF_EVENT(90);
1238 for (i = 0; i < size; i++) {
1239 PROF_EVENT(91);
1240 if (get_abit(addr+i) != VGM_BIT_VALID)
1241 aerr = True;
1242 if (get_vbyte(addr+i) != VGM_BYTE_VALID)
1243 verr = True;
1244 }
1245
1246 if (aerr) {
1247 VG_(record_address_error)( addr, size, False );
1248 } else {
1249 if (verr)
1250 VG_(record_value_error)( size );
1251 }
1252}
1253
1254
1255/* Generic version. Test for addr errors. Valid addresses are
1256 given valid values, and invalid addresses invalid values. */
1257
1258void fpu_write_check_SLOWLY ( Addr addr, Int size )
1259{
1260 Int i;
1261 Addr a_here;
1262 Bool a_ok;
1263 Bool aerr = False;
1264 PROF_EVENT(92);
1265 for (i = 0; i < size; i++) {
1266 PROF_EVENT(93);
1267 a_here = addr+i;
1268 a_ok = get_abit(a_here) == VGM_BIT_VALID;
1269 if (a_ok) {
1270 set_vbyte(a_here, VGM_BYTE_VALID);
1271 } else {
1272 set_vbyte(a_here, VGM_BYTE_INVALID);
1273 aerr = True;
1274 }
1275 }
1276 if (aerr) {
1277 VG_(record_address_error)( addr, size, True );
1278 }
1279}
1280
1281
1282/*------------------------------------------------------------*/
1283/*--- Tracking permissions around %esp changes. ---*/
1284/*------------------------------------------------------------*/
1285
1286/*
1287 The stack
1288 ~~~~~~~~~
1289 The stack's segment seems to be dynamically extended downwards
1290 by the kernel as the stack pointer moves down. Initially, a
1291 1-page (4k) stack is allocated. When %esp moves below that for
1292 the first time, presumably a page fault occurs. The kernel
1293 detects that the faulting address is in the range from %esp upwards
1294 to the current valid stack. It then extends the stack segment
1295 downwards for enough to cover the faulting address, and resumes
1296 the process (invisibly). The process is unaware of any of this.
1297
1298 That means that Valgrind can't spot when the stack segment is
1299 being extended. Fortunately, we want to precisely and continuously
1300 update stack permissions around %esp, so we need to spot all
1301 writes to %esp anyway.
1302
1303 The deal is: when %esp is assigned a lower value, the stack is
1304 being extended. Create a secondary maps to fill in any holes
1305 between the old stack ptr and this one, if necessary. Then
1306 mark all bytes in the area just "uncovered" by this %esp change
1307 as write-only.
1308
1309 When %esp goes back up, mark the area receded over as unreadable
1310 and unwritable.
1311
1312 Just to record the %esp boundary conditions somewhere convenient:
1313 %esp always points to the lowest live byte in the stack. All
1314 addresses below %esp are not live; those at and above it are.
1315*/
1316
sewardj1e8cdc92002-04-18 11:37:52 +00001317/* Does this address look like something in or vaguely near the
1318 current thread's stack? */
1319static
1320Bool is_plausible_stack_addr ( ThreadState* tst, Addr aa )
sewardjde4a1d02002-03-22 01:27:54 +00001321{
1322 UInt a = (UInt)aa;
1323 PROF_EVENT(100);
sewardj1e8cdc92002-04-18 11:37:52 +00001324 if (a <= tst->stack_highest_word &&
1325 a > tst->stack_highest_word - VG_PLAUSIBLE_STACK_SIZE)
sewardjde4a1d02002-03-22 01:27:54 +00001326 return True;
1327 else
1328 return False;
1329}
1330
1331
1332/* Is this address within some small distance below %ESP? Used only
1333 for the --workaround-gcc296-bugs kludge. */
sewardj8c824512002-04-14 04:16:48 +00001334Bool VG_(is_just_below_ESP)( Addr esp, Addr aa )
sewardjde4a1d02002-03-22 01:27:54 +00001335{
sewardj8c824512002-04-14 04:16:48 +00001336 if ((UInt)esp > (UInt)aa
1337 && ((UInt)esp - (UInt)aa) <= VG_GCC296_BUG_STACK_SLOP)
sewardjde4a1d02002-03-22 01:27:54 +00001338 return True;
1339 else
1340 return False;
1341}
1342
1343
1344/* Kludgey ... how much does %esp have to change before we reckon that
1345 the application is switching stacks ? */
1346#define VG_HUGE_DELTA (VG_PLAUSIBLE_STACK_SIZE / 4)
1347
1348static Addr get_page_base ( Addr a )
1349{
1350 return a & ~(VKI_BYTES_PER_PAGE-1);
1351}
1352
1353
1354static void vg_handle_esp_assignment_SLOWLY ( Addr );
1355
1356void VGM_(handle_esp_assignment) ( Addr new_espA )
1357{
1358 UInt old_esp = VG_(baseBlock)[VGOFF_(m_esp)];
1359 UInt new_esp = (UInt)new_espA;
1360 Int delta = ((Int)new_esp) - ((Int)old_esp);
1361
1362 PROF_EVENT(101);
1363
1364# ifndef VG_DEBUG_MEMORY
1365
1366 if (IS_ALIGNED4_ADDR(old_esp)) {
1367
1368 /* Deal with the most common cases fast. These are ordered in
1369 the sequence most common first. */
1370
1371 if (delta == -4) {
1372 /* Moving down by 4 and properly aligned.. */
1373 PROF_EVENT(102);
1374 make_aligned_word_WRITABLE(new_esp);
1375 return;
1376 }
1377
1378 if (delta == 4) {
1379 /* Moving up by 4 and properly aligned. */
1380 PROF_EVENT(103);
1381 make_aligned_word_NOACCESS(old_esp);
1382 return;
1383 }
1384
1385 if (delta == 16) {
1386 /* Also surprisingly common. */
1387 PROF_EVENT(104);
1388 make_aligned_word_NOACCESS(old_esp);
1389 make_aligned_word_NOACCESS(old_esp+4);
1390 make_aligned_word_NOACCESS(old_esp+8);
1391 make_aligned_word_NOACCESS(old_esp+12);
1392 return;
1393 }
1394
1395 if (delta == -12) {
1396 PROF_EVENT(105);
1397 make_aligned_word_WRITABLE(new_esp);
1398 make_aligned_word_WRITABLE(new_esp+4);
1399 make_aligned_word_WRITABLE(new_esp+8);
1400 return;
1401 }
1402
1403 if (delta == 8) {
1404 PROF_EVENT(106);
1405 make_aligned_word_NOACCESS(old_esp);
1406 make_aligned_word_NOACCESS(old_esp+4);
1407 return;
1408 }
1409
1410 if (delta == -8) {
1411 PROF_EVENT(107);
1412 make_aligned_word_WRITABLE(new_esp);
1413 make_aligned_word_WRITABLE(new_esp+4);
1414 return;
1415 }
1416 }
1417
1418# endif
1419
1420 /* The above special cases handle 90% to 95% of all the stack
1421 adjustments. The rest we give to the slow-but-general
1422 mechanism. */
1423 vg_handle_esp_assignment_SLOWLY ( new_espA );
1424}
1425
1426
1427static void vg_handle_esp_assignment_SLOWLY ( Addr new_espA )
1428{
1429 UInt old_esp = VG_(baseBlock)[VGOFF_(m_esp)];
1430 UInt new_esp = (UInt)new_espA;
1431 Int delta = ((Int)new_esp) - ((Int)old_esp);
1432
1433 PROF_EVENT(110);
1434 if (-(VG_HUGE_DELTA) < delta && delta < VG_HUGE_DELTA) {
1435 /* "Ordinary" stack change. */
1436 if (new_esp < old_esp) {
1437 /* Moving down; the stack is growing. */
1438 PROF_EVENT(111);
1439 VGM_(make_writable) ( new_esp, old_esp - new_esp );
1440 return;
1441 }
1442 if (new_esp > old_esp) {
1443 /* Moving up; the stack is shrinking. */
1444 PROF_EVENT(112);
1445 VGM_(make_noaccess) ( old_esp, new_esp - old_esp );
1446 return;
1447 }
1448 PROF_EVENT(113);
1449 return; /* when old_esp == new_esp */
1450 }
1451
1452 /* %esp has changed by more than HUGE_DELTA. We take this to mean
1453 that the application is switching to a new stack, for whatever
1454 reason, and we attempt to initialise the permissions around the
1455 new stack in some plausible way. All pretty kludgey; needed to
1456 make netscape-4.07 run without generating thousands of error
1457 contexts.
1458
1459 If we appear to be switching back to the main stack, don't mess
1460 with the permissions in the area at and above the stack ptr.
1461 Otherwise, we're switching to an alternative stack; make the
1462 area above %esp readable -- this doesn't seem right -- the right
1463 thing to do would be to make it writable -- but is needed to
1464 avoid huge numbers of errs in netscape. To be investigated. */
1465
1466 { Addr invalid_down_to = get_page_base(new_esp)
1467 - 0 * VKI_BYTES_PER_PAGE;
1468 Addr valid_up_to = get_page_base(new_esp) + VKI_BYTES_PER_PAGE
1469 + 0 * VKI_BYTES_PER_PAGE;
sewardj1e8cdc92002-04-18 11:37:52 +00001470 ThreadState* tst = VG_(get_current_thread_state)();
sewardjde4a1d02002-03-22 01:27:54 +00001471 PROF_EVENT(114);
1472 if (VG_(clo_verbosity) > 1)
1473 VG_(message)(Vg_UserMsg, "Warning: client switching stacks? "
1474 "%%esp: %p --> %p",
1475 old_esp, new_esp);
1476 /* VG_(printf)("na %p, %%esp %p, wr %p\n",
1477 invalid_down_to, new_esp, valid_up_to ); */
1478 VGM_(make_noaccess) ( invalid_down_to, new_esp - invalid_down_to );
sewardj1e8cdc92002-04-18 11:37:52 +00001479 if (!is_plausible_stack_addr(tst, new_esp)) {
sewardjde4a1d02002-03-22 01:27:54 +00001480 VGM_(make_readable) ( new_esp, valid_up_to - new_esp );
1481 }
1482 }
1483}
1484
1485
1486/*--------------------------------------------------------------*/
1487/*--- Initialise the memory audit system on program startup. ---*/
1488/*--------------------------------------------------------------*/
1489
1490/* Handle one entry derived from /proc/self/maps. */
1491
1492static
1493void init_memory_audit_callback (
1494 Addr start, UInt size,
1495 Char rr, Char ww, Char xx,
1496 UInt foffset, UChar* filename )
1497{
1498 UChar example_a_bit;
1499 UChar example_v_bit;
1500 UInt r_esp;
1501 Bool is_stack_segment;
1502
1503 /* Sanity check ... if this is the executable's text segment,
1504 ensure it is loaded where we think it ought to be. Any file
1505 name which doesn't contain ".so" is assumed to be the
1506 executable. */
1507 if (filename != NULL
1508 && xx == 'x'
1509 && VG_(strstr(filename, ".so")) == NULL
1510 ) {
1511 /* We assume this is the executable. */
1512 if (start != VG_ASSUMED_EXE_BASE) {
1513 VG_(message)(Vg_UserMsg,
1514 "FATAL: executable base addr not as assumed.");
1515 VG_(message)(Vg_UserMsg, "name %s, actual %p, assumed %p.",
1516 filename, start, VG_ASSUMED_EXE_BASE);
sewardjc7c6aed2002-03-24 12:03:00 +00001517 VG_(message)(Vg_UserMsg,
1518 "One reason this could happen is that you have a shared object");
1519 VG_(message)(Vg_UserMsg,
1520 " whose name doesn't contain the characters \".so\", so Valgrind ");
1521 VG_(message)(Vg_UserMsg,
1522 "naively assumes it is the executable. ");
1523 VG_(message)(Vg_UserMsg,
1524 "In that case, rename it appropriately.");
sewardjde4a1d02002-03-22 01:27:54 +00001525 VG_(panic)("VG_ASSUMED_EXE_BASE doesn't match reality");
1526 }
1527 }
1528
1529 if (0)
1530 VG_(message)(Vg_DebugMsg,
1531 "initial map %8x-%8x %c%c%c? %8x (%d) (%s)",
1532 start,start+size,rr,ww,xx,foffset,
1533 size, filename?filename:(UChar*)"NULL");
1534
1535 r_esp = VG_(baseBlock)[VGOFF_(m_esp)];
1536 is_stack_segment = start <= r_esp && r_esp < start+size;
1537
1538 /* Figure out the segment's permissions.
1539
1540 All segments are addressible -- since a process can read its
1541 own text segment.
1542
1543 A read-but-not-write segment presumably contains initialised
1544 data, so is all valid. Read-write segments presumably contains
1545 uninitialised data, so is all invalid. */
1546
1547 /* ToDo: make this less bogus. */
1548 if (rr != 'r' && xx != 'x' && ww != 'w') {
1549 /* Very bogus; this path never gets taken. */
1550 /* A no, V no */
1551 example_a_bit = VGM_BIT_INVALID;
1552 example_v_bit = VGM_BIT_INVALID;
1553 } else {
1554 /* A yes, V yes */
1555 example_a_bit = VGM_BIT_VALID;
1556 example_v_bit = VGM_BIT_VALID;
1557 /* Causes a lot of errs for unknown reasons.
1558 if (filename is valgrind.so
1559 [careful about end conditions on filename]) {
1560 example_a_bit = VGM_BIT_INVALID;
1561 example_v_bit = VGM_BIT_INVALID;
1562 }
1563 */
1564 }
1565
1566 set_address_range_perms ( start, size,
1567 example_a_bit, example_v_bit );
1568
1569 if (is_stack_segment) {
1570 /* This is the stack segment. Mark all below %esp as
1571 noaccess. */
1572 if (0)
1573 VG_(message)(Vg_DebugMsg,
1574 "invalidating stack area: %x .. %x",
1575 start,r_esp);
1576 VGM_(make_noaccess)( start, r_esp-start );
1577 }
1578}
1579
1580
1581
1582/* ONLY HERE for sbrk() */
1583#include <unistd.h>
1584
1585/* Initialise the memory audit system. */
1586void VGM_(init_memory_audit) ( void )
1587{
1588 Int i;
1589
1590 init_prof_mem();
1591
1592 for (i = 0; i < 8192; i++)
1593 vg_distinguished_secondary_map.abits[i]
1594 = VGM_BYTE_INVALID; /* Invalid address */
1595 for (i = 0; i < 65536; i++)
1596 vg_distinguished_secondary_map.vbyte[i]
1597 = VGM_BYTE_INVALID; /* Invalid Value */
1598
1599 /* These entries gradually get overwritten as the used address
1600 space expands. */
1601 for (i = 0; i < 65536; i++)
1602 VG_(primary_map)[i] = &vg_distinguished_secondary_map;
1603 /* These ones should never change; it's a bug in Valgrind if they
1604 do. */
1605 for (i = 65536; i < 262144; i++)
1606 VG_(primary_map)[i] = &vg_distinguished_secondary_map;
1607
1608 /* Read the initial memory mapping from the /proc filesystem, and
1609 set up our own maps accordingly. */
1610 VG_(read_procselfmaps) ( init_memory_audit_callback );
1611
1612 /* Last but not least, set up the shadow regs with reasonable (sic)
1613 values. All regs are claimed to have valid values.
1614 */
1615 VG_(baseBlock)[VGOFF_(sh_esp)] = VGM_WORD_VALID;
1616 VG_(baseBlock)[VGOFF_(sh_ebp)] = VGM_WORD_VALID;
1617 VG_(baseBlock)[VGOFF_(sh_eax)] = VGM_WORD_VALID;
1618 VG_(baseBlock)[VGOFF_(sh_ecx)] = VGM_WORD_VALID;
1619 VG_(baseBlock)[VGOFF_(sh_edx)] = VGM_WORD_VALID;
1620 VG_(baseBlock)[VGOFF_(sh_ebx)] = VGM_WORD_VALID;
1621 VG_(baseBlock)[VGOFF_(sh_esi)] = VGM_WORD_VALID;
1622 VG_(baseBlock)[VGOFF_(sh_edi)] = VGM_WORD_VALID;
1623 VG_(baseBlock)[VGOFF_(sh_eflags)] = VGM_EFLAGS_VALID;
1624
1625 /* Record the end of the data segment, so that vg_syscall_mem.c
1626 can make sense of calls to brk().
1627 */
1628 VGM_(curr_dataseg_end) = (Addr)sbrk(0);
1629 if (VGM_(curr_dataseg_end) == (Addr)(-1))
1630 VG_(panic)("vgm_init_memory_audit: can't determine data-seg end");
1631
1632 if (0)
sewardj9a199dc2002-04-14 13:01:38 +00001633 VG_(printf)("DS END is %p\n", (void*)VGM_(curr_dataseg_end));
sewardjde4a1d02002-03-22 01:27:54 +00001634
1635 /* Read the list of errors to suppress. This should be found in
1636 the file specified by vg_clo_suppressions. */
1637 VG_(load_suppressions)();
1638}
1639
1640
1641/*------------------------------------------------------------*/
1642/*--- Low-level address-space scanning, for the leak ---*/
1643/*--- detector. ---*/
1644/*------------------------------------------------------------*/
1645
1646static
1647jmp_buf memscan_jmpbuf;
1648
1649static
1650void vg_scan_all_valid_memory_sighandler ( Int sigNo )
1651{
1652 __builtin_longjmp(memscan_jmpbuf, 1);
1653}
1654
1655UInt VG_(scan_all_valid_memory) ( void (*notify_word)( Addr, UInt ) )
1656{
1657 /* All volatile, because some gccs seem paranoid about longjmp(). */
1658 volatile UInt res, numPages, page, vbytes, primaryMapNo, nWordsNotified;
1659 volatile Addr pageBase, addr;
1660 volatile SecMap* sm;
1661 volatile UChar abits;
1662 volatile UInt page_first_word;
1663
1664 vki_ksigaction sigbus_saved;
1665 vki_ksigaction sigbus_new;
1666 vki_ksigaction sigsegv_saved;
1667 vki_ksigaction sigsegv_new;
1668 vki_ksigset_t blockmask_saved;
1669 vki_ksigset_t unblockmask_new;
1670
1671 /* Temporarily install a new sigsegv and sigbus handler, and make
1672 sure SIGBUS, SIGSEGV and SIGTERM are unblocked. (Perhaps the
1673 first two can never be blocked anyway?) */
1674
1675 sigbus_new.ksa_handler = vg_scan_all_valid_memory_sighandler;
1676 sigbus_new.ksa_flags = VKI_SA_ONSTACK | VKI_SA_RESTART;
1677 sigbus_new.ksa_restorer = NULL;
1678 res = VG_(ksigemptyset)( &sigbus_new.ksa_mask );
1679 vg_assert(res == 0);
1680
1681 sigsegv_new.ksa_handler = vg_scan_all_valid_memory_sighandler;
1682 sigsegv_new.ksa_flags = VKI_SA_ONSTACK | VKI_SA_RESTART;
1683 sigsegv_new.ksa_restorer = NULL;
1684 res = VG_(ksigemptyset)( &sigsegv_new.ksa_mask );
1685 vg_assert(res == 0+0);
1686
1687 res = VG_(ksigemptyset)( &unblockmask_new );
1688 res |= VG_(ksigaddset)( &unblockmask_new, VKI_SIGBUS );
1689 res |= VG_(ksigaddset)( &unblockmask_new, VKI_SIGSEGV );
1690 res |= VG_(ksigaddset)( &unblockmask_new, VKI_SIGTERM );
1691 vg_assert(res == 0+0+0);
1692
1693 res = VG_(ksigaction)( VKI_SIGBUS, &sigbus_new, &sigbus_saved );
1694 vg_assert(res == 0+0+0+0);
1695
1696 res = VG_(ksigaction)( VKI_SIGSEGV, &sigsegv_new, &sigsegv_saved );
1697 vg_assert(res == 0+0+0+0+0);
1698
1699 res = VG_(ksigprocmask)( VKI_SIG_UNBLOCK, &unblockmask_new, &blockmask_saved );
1700 vg_assert(res == 0+0+0+0+0+0);
1701
1702 /* The signal handlers are installed. Actually do the memory scan. */
1703 numPages = 1 << (32-VKI_BYTES_PER_PAGE_BITS);
1704 vg_assert(numPages == 1048576);
1705 vg_assert(4096 == (1 << VKI_BYTES_PER_PAGE_BITS));
1706
1707 nWordsNotified = 0;
1708
1709 for (page = 0; page < numPages; page++) {
1710 pageBase = page << VKI_BYTES_PER_PAGE_BITS;
1711 primaryMapNo = pageBase >> 16;
1712 sm = VG_(primary_map)[primaryMapNo];
1713 if (IS_DISTINGUISHED_SM(sm)) continue;
1714 if (__builtin_setjmp(memscan_jmpbuf) == 0) {
1715 /* try this ... */
1716 page_first_word = * (volatile UInt*)pageBase;
1717 /* we get here if we didn't get a fault */
1718 /* Scan the page */
1719 for (addr = pageBase; addr < pageBase+VKI_BYTES_PER_PAGE; addr += 4) {
1720 abits = get_abits4_ALIGNED(addr);
1721 vbytes = get_vbytes4_ALIGNED(addr);
1722 if (abits == VGM_NIBBLE_VALID
1723 && vbytes == VGM_WORD_VALID) {
1724 nWordsNotified++;
1725 notify_word ( addr, *(UInt*)addr );
1726 }
1727 }
1728 } else {
1729 /* We get here if reading the first word of the page caused a
1730 fault, which in turn caused the signal handler to longjmp.
1731 Ignore this page. */
1732 if (0)
1733 VG_(printf)(
1734 "vg_scan_all_valid_memory_sighandler: ignoring page at %p\n",
sewardj9a199dc2002-04-14 13:01:38 +00001735 (void*)pageBase
sewardjde4a1d02002-03-22 01:27:54 +00001736 );
1737 }
1738 }
1739
1740 /* Restore signal state to whatever it was before. */
1741 res = VG_(ksigaction)( VKI_SIGBUS, &sigbus_saved, NULL );
1742 vg_assert(res == 0 +0);
1743
1744 res = VG_(ksigaction)( VKI_SIGSEGV, &sigsegv_saved, NULL );
1745 vg_assert(res == 0 +0 +0);
1746
1747 res = VG_(ksigprocmask)( VKI_SIG_SETMASK, &blockmask_saved, NULL );
1748 vg_assert(res == 0 +0 +0 +0);
1749
1750 return nWordsNotified;
1751}
1752
1753
1754/*------------------------------------------------------------*/
1755/*--- Detecting leaked (unreachable) malloc'd blocks. ---*/
1756/*------------------------------------------------------------*/
1757
1758/* A block is either
1759 -- Proper-ly reached; a pointer to its start has been found
1760 -- Interior-ly reached; only an interior pointer to it has been found
1761 -- Unreached; so far, no pointers to any part of it have been found.
1762*/
1763typedef
1764 enum { Unreached, Interior, Proper }
1765 Reachedness;
1766
1767/* A block record, used for generating err msgs. */
1768typedef
1769 struct _LossRecord {
1770 struct _LossRecord* next;
1771 /* Where these lost blocks were allocated. */
1772 ExeContext* allocated_at;
1773 /* Their reachability. */
1774 Reachedness loss_mode;
1775 /* Number of blocks and total # bytes involved. */
1776 UInt total_bytes;
1777 UInt num_blocks;
1778 }
1779 LossRecord;
1780
1781
1782/* Find the i such that ptr points at or inside the block described by
1783 shadows[i]. Return -1 if none found. This assumes that shadows[]
1784 has been sorted on the ->data field. */
1785
1786#ifdef VG_DEBUG_LEAKCHECK
1787/* Used to sanity-check the fast binary-search mechanism. */
1788static Int find_shadow_for_OLD ( Addr ptr,
1789 ShadowChunk** shadows,
1790 Int n_shadows )
1791
1792{
1793 Int i;
1794 Addr a_lo, a_hi;
1795 PROF_EVENT(70);
1796 for (i = 0; i < n_shadows; i++) {
1797 PROF_EVENT(71);
1798 a_lo = shadows[i]->data;
1799 a_hi = ((Addr)shadows[i]->data) + shadows[i]->size - 1;
1800 if (a_lo <= ptr && ptr <= a_hi)
1801 return i;
1802 }
1803 return -1;
1804}
1805#endif
1806
1807
1808static Int find_shadow_for ( Addr ptr,
1809 ShadowChunk** shadows,
1810 Int n_shadows )
1811{
1812 Addr a_mid_lo, a_mid_hi;
1813 Int lo, mid, hi, retVal;
1814 PROF_EVENT(70);
1815 /* VG_(printf)("find shadow for %p = ", ptr); */
1816 retVal = -1;
1817 lo = 0;
1818 hi = n_shadows-1;
1819 while (True) {
1820 PROF_EVENT(71);
1821
1822 /* invariant: current unsearched space is from lo to hi,
1823 inclusive. */
1824 if (lo > hi) break; /* not found */
1825
1826 mid = (lo + hi) / 2;
1827 a_mid_lo = shadows[mid]->data;
1828 a_mid_hi = ((Addr)shadows[mid]->data) + shadows[mid]->size - 1;
1829
1830 if (ptr < a_mid_lo) {
1831 hi = mid-1;
1832 continue;
1833 }
1834 if (ptr > a_mid_hi) {
1835 lo = mid+1;
1836 continue;
1837 }
1838 vg_assert(ptr >= a_mid_lo && ptr <= a_mid_hi);
1839 retVal = mid;
1840 break;
1841 }
1842
1843# ifdef VG_DEBUG_LEAKCHECK
1844 vg_assert(retVal == find_shadow_for_OLD ( ptr, shadows, n_shadows ));
1845# endif
1846 /* VG_(printf)("%d\n", retVal); */
1847 return retVal;
1848}
1849
1850
1851
1852static void sort_malloc_shadows ( ShadowChunk** shadows, UInt n_shadows )
1853{
1854 Int incs[14] = { 1, 4, 13, 40, 121, 364, 1093, 3280,
1855 9841, 29524, 88573, 265720,
1856 797161, 2391484 };
1857 Int lo = 0;
1858 Int hi = n_shadows-1;
1859 Int i, j, h, bigN, hp;
1860 ShadowChunk* v;
1861
1862 PROF_EVENT(72);
1863 bigN = hi - lo + 1; if (bigN < 2) return;
1864 hp = 0; while (incs[hp] < bigN) hp++; hp--;
1865
1866 for (; hp >= 0; hp--) {
1867 PROF_EVENT(73);
1868 h = incs[hp];
1869 i = lo + h;
1870 while (1) {
1871 PROF_EVENT(74);
1872 if (i > hi) break;
1873 v = shadows[i];
1874 j = i;
1875 while (shadows[j-h]->data > v->data) {
1876 PROF_EVENT(75);
1877 shadows[j] = shadows[j-h];
1878 j = j - h;
1879 if (j <= (lo + h - 1)) break;
1880 }
1881 shadows[j] = v;
1882 i++;
1883 }
1884 }
1885}
1886
1887/* Globals, for the callback used by VG_(detect_memory_leaks). */
1888
1889static ShadowChunk** vglc_shadows;
1890static Int vglc_n_shadows;
1891static Reachedness* vglc_reachedness;
1892static Addr vglc_min_mallocd_addr;
1893static Addr vglc_max_mallocd_addr;
1894
1895static
1896void vg_detect_memory_leaks_notify_addr ( Addr a, UInt word_at_a )
1897{
1898 Int sh_no;
1899 Addr ptr = (Addr)word_at_a;
1900 if (ptr >= vglc_min_mallocd_addr && ptr <= vglc_max_mallocd_addr) {
1901 /* Might be legitimate; we'll have to investigate further. */
1902 sh_no = find_shadow_for ( ptr, vglc_shadows, vglc_n_shadows );
1903 if (sh_no != -1) {
1904 /* Found a block at/into which ptr points. */
1905 vg_assert(sh_no >= 0 && sh_no < vglc_n_shadows);
1906 vg_assert(ptr < vglc_shadows[sh_no]->data
1907 + vglc_shadows[sh_no]->size);
1908 /* Decide whether Proper-ly or Interior-ly reached. */
1909 if (ptr == vglc_shadows[sh_no]->data) {
1910 vglc_reachedness[sh_no] = Proper;
1911 } else {
1912 if (vglc_reachedness[sh_no] == Unreached)
1913 vglc_reachedness[sh_no] = Interior;
1914 }
1915 }
1916 }
1917}
1918
1919
1920void VG_(detect_memory_leaks) ( void )
1921{
1922 Int i;
1923 Int blocks_leaked, bytes_leaked;
1924 Int blocks_dubious, bytes_dubious;
1925 Int blocks_reachable, bytes_reachable;
1926 Int n_lossrecords;
1927 UInt bytes_notified;
1928
1929 LossRecord* errlist;
1930 LossRecord* p;
1931
1932 Bool (*ec_comparer_fn) ( ExeContext*, ExeContext* );
1933 PROF_EVENT(76);
1934 vg_assert(VG_(clo_instrument));
1935
1936 /* Decide how closely we want to match ExeContexts in leak
1937 records. */
1938 switch (VG_(clo_leak_resolution)) {
1939 case 2:
1940 ec_comparer_fn = VG_(eq_ExeContext_top2);
1941 break;
1942 case 4:
1943 ec_comparer_fn = VG_(eq_ExeContext_top4);
1944 break;
1945 case VG_DEEPEST_BACKTRACE:
1946 ec_comparer_fn = VG_(eq_ExeContext_all);
1947 break;
1948 default:
1949 VG_(panic)("VG_(detect_memory_leaks): "
1950 "bad VG_(clo_leak_resolution)");
1951 break;
1952 }
1953
1954 /* vg_get_malloc_shadows allocates storage for shadows */
1955 vglc_shadows = VG_(get_malloc_shadows)( &vglc_n_shadows );
1956 if (vglc_n_shadows == 0) {
1957 vg_assert(vglc_shadows == NULL);
1958 VG_(message)(Vg_UserMsg,
1959 "No malloc'd blocks -- no leaks are possible.\n");
1960 return;
1961 }
1962
1963 VG_(message)(Vg_UserMsg,
1964 "searching for pointers to %d not-freed blocks.",
1965 vglc_n_shadows );
1966 sort_malloc_shadows ( vglc_shadows, vglc_n_shadows );
1967
1968 /* Sanity check; assert that the blocks are now in order and that
1969 they don't overlap. */
1970 for (i = 0; i < vglc_n_shadows-1; i++) {
1971 vg_assert( ((Addr)vglc_shadows[i]->data)
1972 < ((Addr)vglc_shadows[i+1]->data) );
1973 vg_assert( ((Addr)vglc_shadows[i]->data) + vglc_shadows[i]->size
1974 < ((Addr)vglc_shadows[i+1]->data) );
1975 }
1976
1977 vglc_min_mallocd_addr = ((Addr)vglc_shadows[0]->data);
1978 vglc_max_mallocd_addr = ((Addr)vglc_shadows[vglc_n_shadows-1]->data)
1979 + vglc_shadows[vglc_n_shadows-1]->size - 1;
1980
1981 vglc_reachedness
1982 = VG_(malloc)( VG_AR_PRIVATE, vglc_n_shadows * sizeof(Reachedness) );
1983 for (i = 0; i < vglc_n_shadows; i++)
1984 vglc_reachedness[i] = Unreached;
1985
1986 /* Do the scan of memory. */
1987 bytes_notified
1988 = VG_(scan_all_valid_memory)( &vg_detect_memory_leaks_notify_addr )
1989 * VKI_BYTES_PER_WORD;
1990
1991 VG_(message)(Vg_UserMsg, "checked %d bytes.", bytes_notified);
1992
1993 blocks_leaked = bytes_leaked = 0;
1994 blocks_dubious = bytes_dubious = 0;
1995 blocks_reachable = bytes_reachable = 0;
1996
1997 for (i = 0; i < vglc_n_shadows; i++) {
1998 if (vglc_reachedness[i] == Unreached) {
1999 blocks_leaked++;
2000 bytes_leaked += vglc_shadows[i]->size;
2001 }
2002 else if (vglc_reachedness[i] == Interior) {
2003 blocks_dubious++;
2004 bytes_dubious += vglc_shadows[i]->size;
2005 }
2006 else if (vglc_reachedness[i] == Proper) {
2007 blocks_reachable++;
2008 bytes_reachable += vglc_shadows[i]->size;
2009 }
2010 }
2011
2012 VG_(message)(Vg_UserMsg, "");
2013 VG_(message)(Vg_UserMsg, "definitely lost: %d bytes in %d blocks.",
2014 bytes_leaked, blocks_leaked );
2015 VG_(message)(Vg_UserMsg, "possibly lost: %d bytes in %d blocks.",
2016 bytes_dubious, blocks_dubious );
2017 VG_(message)(Vg_UserMsg, "still reachable: %d bytes in %d blocks.",
2018 bytes_reachable, blocks_reachable );
2019
2020
2021 /* Common up the lost blocks so we can print sensible error
2022 messages. */
2023
2024 n_lossrecords = 0;
2025 errlist = NULL;
2026 for (i = 0; i < vglc_n_shadows; i++) {
2027 for (p = errlist; p != NULL; p = p->next) {
2028 if (p->loss_mode == vglc_reachedness[i]
2029 && ec_comparer_fn (
2030 p->allocated_at,
2031 vglc_shadows[i]->where) ) {
2032 break;
2033 }
2034 }
2035 if (p != NULL) {
2036 p->num_blocks ++;
2037 p->total_bytes += vglc_shadows[i]->size;
2038 } else {
2039 n_lossrecords ++;
2040 p = VG_(malloc)(VG_AR_PRIVATE, sizeof(LossRecord));
2041 p->loss_mode = vglc_reachedness[i];
2042 p->allocated_at = vglc_shadows[i]->where;
2043 p->total_bytes = vglc_shadows[i]->size;
2044 p->num_blocks = 1;
2045 p->next = errlist;
2046 errlist = p;
2047 }
2048 }
2049
2050 for (i = 0; i < n_lossrecords; i++) {
2051 LossRecord* p_min = NULL;
2052 UInt n_min = 0xFFFFFFFF;
2053 for (p = errlist; p != NULL; p = p->next) {
2054 if (p->num_blocks > 0 && p->total_bytes < n_min) {
2055 n_min = p->total_bytes;
2056 p_min = p;
2057 }
2058 }
2059 vg_assert(p_min != NULL);
2060
2061 if ( (!VG_(clo_show_reachable)) && p_min->loss_mode == Proper) {
2062 p_min->num_blocks = 0;
2063 continue;
2064 }
2065
2066 VG_(message)(Vg_UserMsg, "");
2067 VG_(message)(
2068 Vg_UserMsg,
2069 "%d bytes in %d blocks are %s in loss record %d of %d",
2070 p_min->total_bytes, p_min->num_blocks,
2071 p_min->loss_mode==Unreached ? "definitely lost" :
2072 (p_min->loss_mode==Interior ? "possibly lost"
2073 : "still reachable"),
2074 i+1, n_lossrecords
2075 );
2076 VG_(pp_ExeContext)(p_min->allocated_at);
2077 p_min->num_blocks = 0;
2078 }
2079
2080 VG_(message)(Vg_UserMsg, "");
2081 VG_(message)(Vg_UserMsg, "LEAK SUMMARY:");
2082 VG_(message)(Vg_UserMsg, " possibly lost: %d bytes in %d blocks.",
2083 bytes_dubious, blocks_dubious );
2084 VG_(message)(Vg_UserMsg, " definitely lost: %d bytes in %d blocks.",
2085 bytes_leaked, blocks_leaked );
2086 VG_(message)(Vg_UserMsg, " still reachable: %d bytes in %d blocks.",
2087 bytes_reachable, blocks_reachable );
2088 if (!VG_(clo_show_reachable)) {
2089 VG_(message)(Vg_UserMsg,
2090 "Reachable blocks (those to which a pointer was found) are not shown.");
2091 VG_(message)(Vg_UserMsg,
2092 "To see them, rerun with: --show-reachable=yes");
2093 }
2094 VG_(message)(Vg_UserMsg, "");
2095
2096 VG_(free) ( VG_AR_PRIVATE, vglc_shadows );
2097 VG_(free) ( VG_AR_PRIVATE, vglc_reachedness );
2098}
2099
2100
2101/* ---------------------------------------------------------------------
2102 Sanity check machinery (permanently engaged).
2103 ------------------------------------------------------------------ */
2104
2105/* Check that nobody has spuriously claimed that the first or last 16
2106 pages (64 KB) of address space have become accessible. Failure of
2107 the following do not per se indicate an internal consistency
2108 problem, but they are so likely to that we really want to know
2109 about it if so. */
2110
2111Bool VG_(first_and_last_secondaries_look_plausible) ( void )
2112{
2113 if (IS_DISTINGUISHED_SM(VG_(primary_map)[0])
2114 && IS_DISTINGUISHED_SM(VG_(primary_map)[65535])) {
2115 return True;
2116 } else {
2117 return False;
2118 }
2119}
2120
2121
2122/* A fast sanity check -- suitable for calling circa once per
2123 millisecond. */
2124
sewardj2e93c502002-04-12 11:12:52 +00002125void VG_(do_sanity_checks) ( ThreadId tid, Bool force_expensive )
sewardjde4a1d02002-03-22 01:27:54 +00002126{
sewardj2e93c502002-04-12 11:12:52 +00002127 Int i;
2128 Bool do_expensive_checks;
2129 ThreadState* tst;
sewardjde4a1d02002-03-22 01:27:54 +00002130
2131 if (VG_(sanity_level) < 1) return;
2132
2133 /* --- First do all the tests that we can do quickly. ---*/
2134
2135 VG_(sanity_fast_count)++;
2136
sewardj2e93c502002-04-12 11:12:52 +00002137 tst = VG_(get_thread_state)(tid);
2138 vg_assert(tst != NULL && tst->status != VgTs_Empty);
2139
sewardjde4a1d02002-03-22 01:27:54 +00002140 /* Check that we haven't overrun our private stack. */
2141 for (i = 0; i < 10; i++) {
2142 vg_assert(VG_(stack)[i]
2143 == ((UInt)(&VG_(stack)[i]) ^ 0xA4B3C2D1));
2144 vg_assert(VG_(stack)[10000-1-i]
2145 == ((UInt)(&VG_(stack)[10000-i-1]) ^ 0xABCD4321));
2146 }
2147
2148 /* Check stuff pertaining to the memory check system. */
2149
2150 if (VG_(clo_instrument)) {
2151
2152 /* Check that the eflags tag is as expected. */
sewardj2e93c502002-04-12 11:12:52 +00002153 UInt vv = tst->sh_eflags;
sewardjde4a1d02002-03-22 01:27:54 +00002154 vg_assert(vv == VGM_EFLAGS_VALID || VGM_EFLAGS_INVALID);
2155
2156 /* Check that nobody has spuriously claimed that the first or
2157 last 16 pages of memory have become accessible [...] */
2158 vg_assert(VG_(first_and_last_secondaries_look_plausible));
2159 }
2160
sewardjde4a1d02002-03-22 01:27:54 +00002161 /* --- Now some more expensive checks. ---*/
2162
2163 /* Once every 25 times, check some more expensive stuff. */
2164
2165 do_expensive_checks = False;
2166 if (force_expensive)
2167 do_expensive_checks = True;
2168 if (VG_(sanity_level) > 1)
2169 do_expensive_checks = True;
2170 if (VG_(sanity_level) == 1
2171 && (VG_(sanity_fast_count) % 25) == 0)
2172 do_expensive_checks = True;
2173
2174 if (do_expensive_checks) {
2175 VG_(sanity_slow_count)++;
2176
2177# if 0
2178 { void zzzmemscan(void); zzzmemscan(); }
2179# endif
2180
2181 if ((VG_(sanity_fast_count) % 250) == 0)
2182 VG_(sanity_check_tc_tt)();
2183
2184 if (VG_(clo_instrument)) {
2185 /* Make sure nobody changed the distinguished secondary. */
2186 for (i = 0; i < 8192; i++)
2187 vg_assert(vg_distinguished_secondary_map.abits[i]
2188 == VGM_BYTE_INVALID);
2189 for (i = 0; i < 65536; i++)
2190 vg_assert(vg_distinguished_secondary_map.vbyte[i]
2191 == VGM_BYTE_INVALID);
2192
2193 /* Make sure that the upper 3/4 of the primary map hasn't
2194 been messed with. */
2195 for (i = 65536; i < 262144; i++)
2196 vg_assert(VG_(primary_map)[i]
2197 == & vg_distinguished_secondary_map);
2198 }
2199 /*
2200 if ((VG_(sanity_fast_count) % 500) == 0) VG_(mallocSanityCheckAll)();
2201 */
2202 }
2203
2204 if (VG_(sanity_level) > 1) {
2205 /* Check sanity of the low-level memory manager. Note that bugs
2206 in the client's code can cause this to fail, so we don't do
2207 this check unless specially asked for. And because it's
2208 potentially very expensive. */
2209 VG_(mallocSanityCheckAll)();
2210 }
2211}
2212
2213
2214/* ---------------------------------------------------------------------
2215 Debugging machinery (turn on to debug). Something of a mess.
2216 ------------------------------------------------------------------ */
2217
2218/* Print the value tags on the 8 integer registers & flag reg. */
2219
2220static void uint_to_bits ( UInt x, Char* str )
2221{
2222 Int i;
2223 Int w = 0;
2224 /* str must point to a space of at least 36 bytes. */
2225 for (i = 31; i >= 0; i--) {
2226 str[w++] = (x & ( ((UInt)1) << i)) ? '1' : '0';
2227 if (i == 24 || i == 16 || i == 8)
2228 str[w++] = ' ';
2229 }
2230 str[w++] = 0;
2231 vg_assert(w == 36);
2232}
2233
sewardj2e93c502002-04-12 11:12:52 +00002234/* Caution! Not vthread-safe; looks in VG_(baseBlock), not the thread
2235 state table. */
2236
sewardjde4a1d02002-03-22 01:27:54 +00002237void VG_(show_reg_tags) ( void )
2238{
2239 Char buf1[36];
2240 Char buf2[36];
2241 UInt z_eax, z_ebx, z_ecx, z_edx,
2242 z_esi, z_edi, z_ebp, z_esp, z_eflags;
2243
2244 z_eax = VG_(baseBlock)[VGOFF_(sh_eax)];
2245 z_ebx = VG_(baseBlock)[VGOFF_(sh_ebx)];
2246 z_ecx = VG_(baseBlock)[VGOFF_(sh_ecx)];
2247 z_edx = VG_(baseBlock)[VGOFF_(sh_edx)];
2248 z_esi = VG_(baseBlock)[VGOFF_(sh_esi)];
2249 z_edi = VG_(baseBlock)[VGOFF_(sh_edi)];
2250 z_ebp = VG_(baseBlock)[VGOFF_(sh_ebp)];
2251 z_esp = VG_(baseBlock)[VGOFF_(sh_esp)];
2252 z_eflags = VG_(baseBlock)[VGOFF_(sh_eflags)];
2253
2254 uint_to_bits(z_eflags, buf1);
2255 VG_(message)(Vg_DebugMsg, "efl %\n", buf1);
2256
2257 uint_to_bits(z_eax, buf1);
2258 uint_to_bits(z_ebx, buf2);
2259 VG_(message)(Vg_DebugMsg, "eax %s ebx %s\n", buf1, buf2);
2260
2261 uint_to_bits(z_ecx, buf1);
2262 uint_to_bits(z_edx, buf2);
2263 VG_(message)(Vg_DebugMsg, "ecx %s edx %s\n", buf1, buf2);
2264
2265 uint_to_bits(z_esi, buf1);
2266 uint_to_bits(z_edi, buf2);
2267 VG_(message)(Vg_DebugMsg, "esi %s edi %s\n", buf1, buf2);
2268
2269 uint_to_bits(z_ebp, buf1);
2270 uint_to_bits(z_esp, buf2);
2271 VG_(message)(Vg_DebugMsg, "ebp %s esp %s\n", buf1, buf2);
2272}
2273
2274
2275#if 0
2276/* For debugging only. Scan the address space and touch all allegedly
2277 addressible words. Useful for establishing where Valgrind's idea of
2278 addressibility has diverged from what the kernel believes. */
2279
2280static
2281void zzzmemscan_notify_word ( Addr a, UInt w )
2282{
2283}
2284
2285void zzzmemscan ( void )
2286{
2287 Int n_notifies
2288 = VG_(scan_all_valid_memory)( zzzmemscan_notify_word );
2289 VG_(printf)("zzzmemscan: n_bytes = %d\n", 4 * n_notifies );
2290}
2291#endif
2292
2293
2294
2295
2296#if 0
2297static Int zzz = 0;
2298
2299void show_bb ( Addr eip_next )
2300{
2301 VG_(printf)("[%4d] ", zzz);
2302 VG_(show_reg_tags)( &VG_(m_shadow );
2303 VG_(translate) ( eip_next, NULL, NULL, NULL );
2304}
2305#endif /* 0 */
2306
2307/*--------------------------------------------------------------------*/
2308/*--- end vg_memory.c ---*/
2309/*--------------------------------------------------------------------*/