Chih-Hung Hsieh | 85106a5 | 2016-10-14 23:36:20 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2013 The Android Open Source Project |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * * Redistributions of source code must retain the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer. |
| 10 | * * Redistributions in binary form must reproduce the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer in |
| 12 | * the documentation and/or other materials provided with the |
| 13 | * distribution. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 16 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 17 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 18 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 19 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| 22 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 25 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 26 | * SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifdef __aarch64__ |
| 30 | |
| 31 | // Copied and simplified macros from bionic_asm.h. |
| 32 | |
| 33 | #define ENTRY(f) \ |
| 34 | .text; \ |
| 35 | .globl f; \ |
| 36 | .type f, @function; \ |
| 37 | f: \ |
| 38 | .cfi_startproc \ |
| 39 | |
| 40 | #define END(f) \ |
| 41 | .cfi_endproc; \ |
| 42 | .size f, .-f; \ |
| 43 | |
| 44 | // According to AARCH64 PCS document we need to save the following |
| 45 | // registers: |
| 46 | // |
| 47 | // Core x19 - x30, sp (see section 5.1.1) |
| 48 | // VFP d8 - d15 (see section 5.1.2) |
| 49 | // |
| 50 | // NOTE: All the registers saved here will have 64 bit values. |
| 51 | // AAPCS mandates that the higher part of q registers do not need to |
| 52 | // be saved by the callee. |
| 53 | // |
| 54 | // The internal structure of a jmp_buf is totally private. |
| 55 | // Current layout (changes from release to release): |
| 56 | // |
| 57 | // word name description |
| 58 | // 0 sigflag/cookie setjmp cookie in top 31 bits, signal mask flag in low bit |
| 59 | // 1 sigmask signal mask (not used with _setjmp / _longjmp) |
| 60 | // 2 core_base base of core registers (x19-x30, sp) |
| 61 | // 15 float_base base of float registers (d8-d15) |
| 62 | // 23 checksum checksum of core registers |
| 63 | // 24 reserved reserved entries (room to grow) |
| 64 | // 32 |
| 65 | |
| 66 | // 'sigmask' and 'checksum' are not used in this simplified version for valgrind. |
| 67 | |
| 68 | #define _JB_SIGFLAG 0 |
| 69 | #define _JB_SIGMASK (_JB_SIGFLAG + 1) |
| 70 | #define _JB_X30_SP (_JB_SIGMASK + 1) |
| 71 | #define _JB_X28_X29 (_JB_X30_SP + 2) |
| 72 | #define _JB_X26_X27 (_JB_X28_X29 + 2) |
| 73 | #define _JB_X24_X25 (_JB_X26_X27 + 2) |
| 74 | #define _JB_X22_X23 (_JB_X24_X25 + 2) |
| 75 | #define _JB_X20_X21 (_JB_X22_X23 + 2) |
| 76 | #define _JB_X19 (_JB_X20_X21 + 2) |
| 77 | #define _JB_D14_D15 (_JB_X19 + 1) |
| 78 | #define _JB_D12_D13 (_JB_D14_D15 + 2) |
| 79 | #define _JB_D10_D11 (_JB_D12_D13 + 2) |
| 80 | #define _JB_D8_D9 (_JB_D10_D11 + 2) |
| 81 | |
| 82 | // int setjmp(jmp_buf env); |
| 83 | ENTRY(setjmp) |
| 84 | // Save core registers. |
| 85 | mov x10, sp |
| 86 | stp x30, x10, [x0, #(_JB_X30_SP * 8)] |
| 87 | stp x28, x29, [x0, #(_JB_X28_X29 * 8)] |
| 88 | stp x26, x27, [x0, #(_JB_X26_X27 * 8)] |
| 89 | stp x24, x25, [x0, #(_JB_X24_X25 * 8)] |
| 90 | stp x22, x23, [x0, #(_JB_X22_X23 * 8)] |
| 91 | stp x20, x21, [x0, #(_JB_X20_X21 * 8)] |
| 92 | str x19, [x0, #(_JB_X19 * 8)] |
| 93 | |
| 94 | // Save floating point registers. |
| 95 | stp d14, d15, [x0, #(_JB_D14_D15 * 8)] |
| 96 | stp d12, d13, [x0, #(_JB_D12_D13 * 8)] |
| 97 | stp d10, d11, [x0, #(_JB_D10_D11 * 8)] |
| 98 | stp d8, d9, [x0, #(_JB_D8_D9 * 8)] |
| 99 | |
| 100 | mov w0, #0 |
| 101 | ret |
| 102 | END(setjmp) |
| 103 | |
| 104 | // void longjmp(jmp_buf env, int value); |
| 105 | ENTRY(longjmp) |
| 106 | // Restore core registers. |
| 107 | ldp x30, x10, [x0, #(_JB_X30_SP * 8)] |
| 108 | ldp x28, x29, [x0, #(_JB_X28_X29 * 8)] |
| 109 | ldp x26, x27, [x0, #(_JB_X26_X27 * 8)] |
| 110 | ldp x24, x25, [x0, #(_JB_X24_X25 * 8)] |
| 111 | ldp x22, x23, [x0, #(_JB_X22_X23 * 8)] |
| 112 | ldp x20, x21, [x0, #(_JB_X20_X21 * 8)] |
| 113 | ldr x19, [x0, #(_JB_X19 * 8)] |
| 114 | mov sp, x10 |
| 115 | |
| 116 | // Restore floating point registers. |
| 117 | ldp d14, d15, [x0, #(_JB_D14_D15 * 8)] |
| 118 | ldp d12, d13, [x0, #(_JB_D12_D13 * 8)] |
| 119 | ldp d10, d11, [x0, #(_JB_D10_D11 * 8)] |
| 120 | ldp d8, d9, [x0, #(_JB_D8_D9 * 8)] |
| 121 | |
| 122 | // Set return value. |
| 123 | cmp w1, wzr |
| 124 | csinc w0, w1, wzr, ne |
| 125 | ret |
| 126 | END(longjmp) |
| 127 | |
| 128 | #endif // __aarch64__ |