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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
40
41#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
48#undef likely
49#undef unlikely
50#define likely(x) __builtin_expect(!!(x), 1)
51#define unlikely(x) __builtin_expect(!!(x), 0)
52
53
54
55/*------------------------------------------------------------*/
56/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
72/* The last seen execute target instruction */
73ULong last_execute_target;
74
75/* The possible outcomes of a decoding operation */
76typedef enum {
77 S390_DECODE_OK,
78 S390_DECODE_UNKNOWN_INSN,
79 S390_DECODE_UNIMPLEMENTED_INSN,
80 S390_DECODE_UNKNOWN_SPECIAL_INSN,
81 S390_DECODE_ERROR
82} s390_decode_t;
83
84/*------------------------------------------------------------*/
85/*--- Helpers for constructing IR. ---*/
86/*------------------------------------------------------------*/
87
88/* Sign extend a value with the given number of bits. This is a
89 macro because it allows us to overload the type of the value.
90 Note that VALUE must have a signed type! */
91#undef sign_extend
92#define sign_extend(value,num_bits) \
93(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
94 (sizeof(__typeof__(value)) * 8 - (num_bits)))
95
96
97/* Add a statement to the current irsb. */
98static __inline__ void
99stmt(IRStmt *st)
100{
101 addStmtToIRSB(irsb, st);
102}
103
104/* Allocate a new temporary of the given type. */
105static __inline__ IRTemp
106newTemp(IRType type)
107{
108 vassert(isPlausibleIRType(type));
109
110 return newIRTemp(irsb->tyenv, type);
111}
112
113/* Create an expression node for a temporary */
114static __inline__ IRExpr *
115mkexpr(IRTemp tmp)
116{
117 return IRExpr_RdTmp(tmp);
118}
119
120/* Add a statement that assigns to a temporary */
121static __inline__ void
122assign(IRTemp dst, IRExpr *expr)
123{
124 stmt(IRStmt_WrTmp(dst, expr));
125}
126
127/* Create a temporary of the given type and assign the expression to it */
128static __inline__ IRTemp
129mktemp(IRType type, IRExpr *expr)
130{
131 IRTemp temp = newTemp(type);
132
133 assign(temp, expr);
134
135 return temp;
136}
137
138/* Create a unary expression */
139static __inline__ IRExpr *
140unop(IROp kind, IRExpr *op)
141{
142 return IRExpr_Unop(kind, op);
143}
144
145/* Create a binary expression */
146static __inline__ IRExpr *
147binop(IROp kind, IRExpr *op1, IRExpr *op2)
148{
149 return IRExpr_Binop(kind, op1, op2);
150}
151
152/* Create a ternary expression */
153static __inline__ IRExpr *
154triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
155{
156 return IRExpr_Triop(kind, op1, op2, op3);
157}
158
159/* Create a quaternary expression */
160static __inline__ IRExpr *
161qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
162{
163 return IRExpr_Qop(kind, op1, op2, op3, op4);
164}
165
166/* Create an expression node for an 8-bit integer constant */
167static __inline__ IRExpr *
168mkU8(UInt value)
169{
170 vassert(value < 256);
171
172 return IRExpr_Const(IRConst_U8((UChar)value));
173}
174
175/* Create an expression node for a 16-bit integer constant */
176static __inline__ IRExpr *
177mkU16(UInt value)
178{
179 vassert(value < 65536);
180
181 return IRExpr_Const(IRConst_U16((UShort)value));
182}
183
184/* Create an expression node for a 32-bit integer constant */
185static __inline__ IRExpr *
186mkU32(UInt value)
187{
188 return IRExpr_Const(IRConst_U32(value));
189}
190
191/* Create an expression node for a 64-bit integer constant */
192static __inline__ IRExpr *
193mkU64(ULong value)
194{
195 return IRExpr_Const(IRConst_U64(value));
196}
197
198/* Create an expression node for a 32-bit floating point constant
199 whose value is given by a bit pattern. */
200static __inline__ IRExpr *
201mkF32i(UInt value)
202{
203 return IRExpr_Const(IRConst_F32i(value));
204}
205
206/* Create an expression node for a 32-bit floating point constant
207 whose value is given by a bit pattern. */
208static __inline__ IRExpr *
209mkF64i(ULong value)
210{
211 return IRExpr_Const(IRConst_F64i(value));
212}
213
214/* Little helper function for my sanity. ITE = if-then-else */
215static IRExpr *
216mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
217{
218 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
219
220 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
221}
222
223/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
224static void __inline__
225store(IRExpr *addr, IRExpr *data)
226{
227 stmt(IRStmt_Store(Iend_BE, addr, data));
228}
229
230/* Create an expression that loads a TYPE sized value from ADDR.
231 This is a big-endian machine. */
232static __inline__ IRExpr *
233load(IRType type, IRExpr *addr)
234{
235 return IRExpr_Load(Iend_BE, type, addr);
236}
237
238/* Function call */
239static void
240call_function(IRExpr *callee_address)
241{
242 irsb->next = callee_address;
243 irsb->jumpkind = Ijk_Call;
244
245 dis_res->whatNext = Dis_StopHere;
246}
247
248/* Function return sequence */
249static void
250return_from_function(IRExpr *return_address)
251{
252 irsb->next = return_address;
253 irsb->jumpkind = Ijk_Ret;
254
255 dis_res->whatNext = Dis_StopHere;
256}
257
258/* A conditional branch whose target is not known at instrumentation time.
259
260 if (condition) goto computed_target;
261
262 Needs to be represented as:
263
264 if (! condition) goto next_instruction;
265 goto computed_target;
266
267 This inversion is being handled at code generation time. So we just
268 take the condition here as is.
269*/
270static void
271if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
272{
273 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
274
275 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
276
277 irsb->next = target;
278 irsb->jumpkind = Ijk_Boring;
279
280 dis_res->whatNext = Dis_StopHere;
281}
282
283/* A conditional branch whose target is known at instrumentation time. */
284static void
285if_condition_goto(IRExpr *condition, Addr64 target)
286{
287 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
288
289 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
290 dis_res->whatNext = Dis_Continue;
291}
292
293/* An unconditional branch. Target may or may not be known at instrumentation
294 time. */
295static void
296always_goto(IRExpr *target)
297{
298 irsb->next = target;
299 irsb->jumpkind = Ijk_Boring;
300
301 dis_res->whatNext = Dis_StopHere;
302}
303
304/* A system call */
305static void
306system_call(IRExpr *sysno)
307{
308 /* Store the system call number in the pseudo register. */
309 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
310
311 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so.
312 fixs390: As we do not use it, can we get rid of it ?? */
313 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
314
315 /* It's important that all ArchRegs carry their up-to-date value
316 at this point. So we declare an end-of-block here, which
317 forces any TempRegs caching ArchRegs to be flushed. */
318 irsb->next = mkU64(guest_IA_next_instr);
319
320 irsb->jumpkind = Ijk_Sys_syscall;
321
322 dis_res->whatNext = Dis_StopHere;
323}
324
325/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
326 instructions to VEX's IRRoundingMode. */
327static IRRoundingMode
328encode_rounding_mode(UChar mode)
329{
330 switch (mode) {
331 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
332 case S390_ROUND_ZERO: return Irrm_ZERO;
333 case S390_ROUND_POSINF: return Irrm_PosINF;
334 case S390_ROUND_NEGINF: return Irrm_NegINF;
335 }
336 vpanic("encode_rounding_mode");
337}
338
339static __inline__ IRExpr *get_fpr_dw0(UInt);
340static __inline__ void put_fpr_dw0(UInt, IRExpr *);
341
342/* Read a floating point register pair and combine their contents into a
343 128-bit value */
344static IRExpr *
345get_fpr_pair(UInt archreg)
346{
347 IRExpr *high = get_fpr_dw0(archreg);
348 IRExpr *low = get_fpr_dw0(archreg + 2);
349
350 return binop(Iop_F64HLtoF128, high, low);
351}
352
353/* Write a 128-bit floating point value into a register pair. */
354static void
355put_fpr_pair(UInt archreg, IRExpr *expr)
356{
357 IRExpr *high = unop(Iop_F128HItoF64, expr);
358 IRExpr *low = unop(Iop_F128LOtoF64, expr);
359
360 put_fpr_dw0(archreg, high);
361 put_fpr_dw0(archreg + 2, low);
362}
363
364
365/* Flags thunk offsets */
366#define S390X_GUEST_OFFSET_CC_OP S390_GUEST_OFFSET(guest_CC_OP)
367#define S390X_GUEST_OFFSET_CC_DEP1 S390_GUEST_OFFSET(guest_CC_DEP1)
368#define S390X_GUEST_OFFSET_CC_DEP2 S390_GUEST_OFFSET(guest_CC_DEP2)
369#define S390X_GUEST_OFFSET_CC_NDEP S390_GUEST_OFFSET(guest_CC_NDEP)
370
371/*------------------------------------------------------------*/
372/*--- Build the flags thunk. ---*/
373/*------------------------------------------------------------*/
374
375/* Completely fill the flags thunk. We're always filling all fields.
376 Apparently, that is better for redundant PUT elimination. */
377static void
378s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
379{
380 UInt op_off, dep1_off, dep2_off, ndep_off;
381
382 op_off = S390X_GUEST_OFFSET_CC_OP;
383 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
384 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
385 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
386
387 stmt(IRStmt_Put(op_off, op));
388 stmt(IRStmt_Put(dep1_off, dep1));
389 stmt(IRStmt_Put(dep2_off, dep2));
390 stmt(IRStmt_Put(ndep_off, ndep));
391}
392
393
394/* Create an expression for V and widen the result to 64 bit. */
395static IRExpr *
396s390_cc_widen(IRTemp v, Bool sign_extend)
397{
398 IRExpr *expr;
399
400 expr = mkexpr(v);
401
402 switch (typeOfIRTemp(irsb->tyenv, v)) {
403 case Ity_I64:
404 break;
405 case Ity_I32:
406 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
407 break;
408 case Ity_I16:
409 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
410 break;
411 case Ity_I8:
412 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
413 break;
414 default:
415 vpanic("s390_cc_widen");
416 }
417
418 return expr;
419}
420
421static void
422s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
423{
424 IRExpr *op, *dep1, *dep2, *ndep;
425
426 op = mkU64(opc);
427 dep1 = s390_cc_widen(d1, sign_extend);
428 dep2 = mkU64(0);
429 ndep = mkU64(0);
430
431 s390_cc_thunk_fill(op, dep1, dep2, ndep);
432}
433
434
435static void
436s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
437{
438 IRExpr *op, *dep1, *dep2, *ndep;
439
440 op = mkU64(opc);
441 dep1 = s390_cc_widen(d1, sign_extend);
442 dep2 = s390_cc_widen(d2, sign_extend);
443 ndep = mkU64(0);
444
445 s390_cc_thunk_fill(op, dep1, dep2, ndep);
446}
447
448
449/* memcheck believes that the NDEP field in the flags thunk is always
450 defined. But for some flag computations (e.g. add with carry) that is
451 just not true. We therefore need to convey to memcheck that the value
452 of the ndep field does matter and therefore we make the DEP2 field
453 depend on it:
454
455 DEP2 = original_DEP2 ^ NDEP
456
457 In s390_calculate_cc we exploit that (a^b)^b == a
458 I.e. we xor the DEP2 value with the NDEP value to recover the
459 original_DEP2 value. */
460static void
461s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
462{
463 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
464
465 op = mkU64(opc);
466 dep1 = s390_cc_widen(d1, sign_extend);
467 dep2 = s390_cc_widen(d2, sign_extend);
468 ndep = s390_cc_widen(nd, sign_extend);
469
470 dep2x = binop(Iop_Xor64, dep2, ndep);
471
472 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
473}
474
475
476/* Write one floating point value into the flags thunk */
477static void
478s390_cc_thunk_put1f(UInt opc, IRTemp d1)
479{
480 IRExpr *op, *dep1, *dep2, *ndep;
481
482 op = mkU64(opc);
483 dep1 = mkexpr(d1);
484 dep2 = mkU64(0);
485 ndep = mkU64(0);
486
487 s390_cc_thunk_fill(op, dep1, dep2, ndep);
488}
489
490
491/* Write a floating point value and an integer into the flags thunk. The
492 integer value is zero-extended first. */
493static void
494s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
495{
496 IRExpr *op, *dep1, *dep2, *ndep;
497
498 op = mkU64(opc);
499 dep1 = mkexpr(d1);
500 dep2 = s390_cc_widen(d2, False);
501 ndep = mkU64(0);
502
503 s390_cc_thunk_fill(op, dep1, dep2, ndep);
504}
505
506
507/* Write a 128-bit floating point value into the flags thunk. This is
508 done by splitting the value into two 64-bits values. */
509static void
510s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
511{
512 IRExpr *op, *hi, *lo, *ndep;
513
514 op = mkU64(opc);
515 hi = unop(Iop_F128HItoF64, mkexpr(d1));
516 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
517 ndep = mkU64(0);
518
519 s390_cc_thunk_fill(op, hi, lo, ndep);
520}
521
522
523/* Write a 128-bit floating point value and an integer into the flags thunk.
524 The integer value is zero-extended first. */
525static void
526s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
527{
528 IRExpr *op, *hi, *lo, *lox, *ndep;
529
530 op = mkU64(opc);
531 hi = unop(Iop_F128HItoF64, mkexpr(d1));
532 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
533 ndep = s390_cc_widen(nd, False);
534
535 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
536
537 s390_cc_thunk_fill(op, hi, lox, ndep);
538}
539
540
541static void
542s390_cc_set(UInt val)
543{
544 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
545 mkU64(val), mkU64(0), mkU64(0));
546}
547
548/* Build IR to calculate the condition code from flags thunk.
549 Returns an expression of type Ity_I32 */
550static IRExpr *
551s390_call_calculate_cc(void)
552{
553 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
554
555 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
556 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
557 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
558 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
559
560 args = mkIRExprVec_4(op, dep1, dep2, ndep);
561 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
562 "s390_calculate_cc", &s390_calculate_cc, args);
563
564 /* Exclude OP and NDEP from definedness checking. We're only
565 interested in DEP1 and DEP2. */
566 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
567
568 return call;
569}
570
571/* Build IR to calculate the internal condition code for a "compare and branch"
572 insn. Returns an expression of type Ity_I32 */
573static IRExpr *
574s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
575{
576 IRExpr **args, *call, *op, *dep1, *dep2;
577
578 op = mkU64(opc);
579 dep1 = s390_cc_widen(op1, sign_extend);
580 dep2 = s390_cc_widen(op2, sign_extend);
581
582 args = mkIRExprVec_3(op, dep1, dep2);
583 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
584 "s390_calculate_icc", &s390_calculate_icc, args);
585
586 /* Exclude OP from definedness checking. We're only
587 interested in DEP1 and DEP2. */
588 call->Iex.CCall.cee->mcx_mask = (1<<0);
589
590 return call;
591}
592
593/* Build IR to calculate the condition code from flags thunk.
594 Returns an expression of type Ity_I32 */
595static IRExpr *
596s390_call_calculate_cond(UInt m)
597{
598 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
599
600 mask = mkU64(m);
601 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
602 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
603 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
604 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
605
606 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
607 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
608 "s390_calculate_cond", &s390_calculate_cond, args);
609
610 /* Exclude the requested condition, OP and NDEP from definedness
611 checking. We're only interested in DEP1 and DEP2. */
612 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
613
614 return call;
615}
616
617#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
618#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
619#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
620#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
621#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
622#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
623#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
624 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
625#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
626 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
627#define s390_call_calculate_iccZZ(op,dep1,dep2) \
628 s390_call_calculate_icc(op,dep1,dep2,False)
629#define s390_call_calculate_iccSS(op,dep1,dep2) \
630 s390_call_calculate_icc(op,dep1,dep2,True)
631
632
633#define OFFB_TISTART offsetof(VexGuestS390XState, guest_TISTART)
634#define OFFB_TILEN offsetof(VexGuestS390XState, guest_TILEN)
635
636
637/*------------------------------------------------------------*/
638/*--- Guest register access ---*/
639/*------------------------------------------------------------*/
640
641
642/*------------------------------------------------------------*/
643/*--- ar registers ---*/
644/*------------------------------------------------------------*/
645
646/* Return the guest state offset of a ar register. */
647static UInt
648ar_offset(UInt archreg)
649{
650 static const UInt offset[16] = {
651 offsetof(VexGuestS390XState, guest_a0),
652 offsetof(VexGuestS390XState, guest_a1),
653 offsetof(VexGuestS390XState, guest_a2),
654 offsetof(VexGuestS390XState, guest_a3),
655 offsetof(VexGuestS390XState, guest_a4),
656 offsetof(VexGuestS390XState, guest_a5),
657 offsetof(VexGuestS390XState, guest_a6),
658 offsetof(VexGuestS390XState, guest_a7),
659 offsetof(VexGuestS390XState, guest_a8),
660 offsetof(VexGuestS390XState, guest_a9),
661 offsetof(VexGuestS390XState, guest_a10),
662 offsetof(VexGuestS390XState, guest_a11),
663 offsetof(VexGuestS390XState, guest_a12),
664 offsetof(VexGuestS390XState, guest_a13),
665 offsetof(VexGuestS390XState, guest_a14),
666 offsetof(VexGuestS390XState, guest_a15),
667 };
668
669 vassert(archreg < 16);
670
671 return offset[archreg];
672}
673
674
675/* Return the guest state offset of word #0 of a ar register. */
676static __inline__ UInt
677ar_w0_offset(UInt archreg)
678{
679 return ar_offset(archreg) + 0;
680}
681
682/* Write word #0 of a ar to the guest state. */
683static __inline__ void
684put_ar_w0(UInt archreg, IRExpr *expr)
685{
686 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
687
688 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
689}
690
691/* Read word #0 of a ar register. */
692static __inline__ IRExpr *
693get_ar_w0(UInt archreg)
694{
695 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
696}
697
698
699/*------------------------------------------------------------*/
700/*--- fpr registers ---*/
701/*------------------------------------------------------------*/
702
703/* Return the guest state offset of a fpr register. */
704static UInt
705fpr_offset(UInt archreg)
706{
707 static const UInt offset[16] = {
708 offsetof(VexGuestS390XState, guest_f0),
709 offsetof(VexGuestS390XState, guest_f1),
710 offsetof(VexGuestS390XState, guest_f2),
711 offsetof(VexGuestS390XState, guest_f3),
712 offsetof(VexGuestS390XState, guest_f4),
713 offsetof(VexGuestS390XState, guest_f5),
714 offsetof(VexGuestS390XState, guest_f6),
715 offsetof(VexGuestS390XState, guest_f7),
716 offsetof(VexGuestS390XState, guest_f8),
717 offsetof(VexGuestS390XState, guest_f9),
718 offsetof(VexGuestS390XState, guest_f10),
719 offsetof(VexGuestS390XState, guest_f11),
720 offsetof(VexGuestS390XState, guest_f12),
721 offsetof(VexGuestS390XState, guest_f13),
722 offsetof(VexGuestS390XState, guest_f14),
723 offsetof(VexGuestS390XState, guest_f15),
724 };
725
726 vassert(archreg < 16);
727
728 return offset[archreg];
729}
730
731
732/* Return the guest state offset of word #0 of a fpr register. */
733static __inline__ UInt
734fpr_w0_offset(UInt archreg)
735{
736 return fpr_offset(archreg) + 0;
737}
738
739/* Write word #0 of a fpr to the guest state. */
740static __inline__ void
741put_fpr_w0(UInt archreg, IRExpr *expr)
742{
743 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
744
745 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
746}
747
748/* Read word #0 of a fpr register. */
749static __inline__ IRExpr *
750get_fpr_w0(UInt archreg)
751{
752 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
753}
754
755/* Return the guest state offset of double word #0 of a fpr register. */
756static __inline__ UInt
757fpr_dw0_offset(UInt archreg)
758{
759 return fpr_offset(archreg) + 0;
760}
761
762/* Write double word #0 of a fpr to the guest state. */
763static __inline__ void
764put_fpr_dw0(UInt archreg, IRExpr *expr)
765{
766 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
767
768 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
769}
770
771/* Read double word #0 of a fpr register. */
772static __inline__ IRExpr *
773get_fpr_dw0(UInt archreg)
774{
775 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
776}
777
778
779/*------------------------------------------------------------*/
780/*--- gpr registers ---*/
781/*------------------------------------------------------------*/
782
783/* Return the guest state offset of a gpr register. */
784static UInt
785gpr_offset(UInt archreg)
786{
787 static const UInt offset[16] = {
788 offsetof(VexGuestS390XState, guest_r0),
789 offsetof(VexGuestS390XState, guest_r1),
790 offsetof(VexGuestS390XState, guest_r2),
791 offsetof(VexGuestS390XState, guest_r3),
792 offsetof(VexGuestS390XState, guest_r4),
793 offsetof(VexGuestS390XState, guest_r5),
794 offsetof(VexGuestS390XState, guest_r6),
795 offsetof(VexGuestS390XState, guest_r7),
796 offsetof(VexGuestS390XState, guest_r8),
797 offsetof(VexGuestS390XState, guest_r9),
798 offsetof(VexGuestS390XState, guest_r10),
799 offsetof(VexGuestS390XState, guest_r11),
800 offsetof(VexGuestS390XState, guest_r12),
801 offsetof(VexGuestS390XState, guest_r13),
802 offsetof(VexGuestS390XState, guest_r14),
803 offsetof(VexGuestS390XState, guest_r15),
804 };
805
806 vassert(archreg < 16);
807
808 return offset[archreg];
809}
810
811
812/* Return the guest state offset of word #0 of a gpr register. */
813static __inline__ UInt
814gpr_w0_offset(UInt archreg)
815{
816 return gpr_offset(archreg) + 0;
817}
818
819/* Write word #0 of a gpr to the guest state. */
820static __inline__ void
821put_gpr_w0(UInt archreg, IRExpr *expr)
822{
823 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
824
825 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
826}
827
828/* Read word #0 of a gpr register. */
829static __inline__ IRExpr *
830get_gpr_w0(UInt archreg)
831{
832 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
833}
834
835/* Return the guest state offset of double word #0 of a gpr register. */
836static __inline__ UInt
837gpr_dw0_offset(UInt archreg)
838{
839 return gpr_offset(archreg) + 0;
840}
841
842/* Write double word #0 of a gpr to the guest state. */
843static __inline__ void
844put_gpr_dw0(UInt archreg, IRExpr *expr)
845{
846 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
847
848 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
849}
850
851/* Read double word #0 of a gpr register. */
852static __inline__ IRExpr *
853get_gpr_dw0(UInt archreg)
854{
855 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
856}
857
858/* Return the guest state offset of half word #1 of a gpr register. */
859static __inline__ UInt
860gpr_hw1_offset(UInt archreg)
861{
862 return gpr_offset(archreg) + 2;
863}
864
865/* Write half word #1 of a gpr to the guest state. */
866static __inline__ void
867put_gpr_hw1(UInt archreg, IRExpr *expr)
868{
869 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
870
871 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
872}
873
874/* Read half word #1 of a gpr register. */
875static __inline__ IRExpr *
876get_gpr_hw1(UInt archreg)
877{
878 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
879}
880
881/* Return the guest state offset of byte #6 of a gpr register. */
882static __inline__ UInt
883gpr_b6_offset(UInt archreg)
884{
885 return gpr_offset(archreg) + 6;
886}
887
888/* Write byte #6 of a gpr to the guest state. */
889static __inline__ void
890put_gpr_b6(UInt archreg, IRExpr *expr)
891{
892 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
893
894 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
895}
896
897/* Read byte #6 of a gpr register. */
898static __inline__ IRExpr *
899get_gpr_b6(UInt archreg)
900{
901 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
902}
903
904/* Return the guest state offset of byte #3 of a gpr register. */
905static __inline__ UInt
906gpr_b3_offset(UInt archreg)
907{
908 return gpr_offset(archreg) + 3;
909}
910
911/* Write byte #3 of a gpr to the guest state. */
912static __inline__ void
913put_gpr_b3(UInt archreg, IRExpr *expr)
914{
915 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
916
917 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
918}
919
920/* Read byte #3 of a gpr register. */
921static __inline__ IRExpr *
922get_gpr_b3(UInt archreg)
923{
924 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
925}
926
927/* Return the guest state offset of byte #0 of a gpr register. */
928static __inline__ UInt
929gpr_b0_offset(UInt archreg)
930{
931 return gpr_offset(archreg) + 0;
932}
933
934/* Write byte #0 of a gpr to the guest state. */
935static __inline__ void
936put_gpr_b0(UInt archreg, IRExpr *expr)
937{
938 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
939
940 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
941}
942
943/* Read byte #0 of a gpr register. */
944static __inline__ IRExpr *
945get_gpr_b0(UInt archreg)
946{
947 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
948}
949
950/* Return the guest state offset of word #1 of a gpr register. */
951static __inline__ UInt
952gpr_w1_offset(UInt archreg)
953{
954 return gpr_offset(archreg) + 4;
955}
956
957/* Write word #1 of a gpr to the guest state. */
958static __inline__ void
959put_gpr_w1(UInt archreg, IRExpr *expr)
960{
961 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
962
963 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
964}
965
966/* Read word #1 of a gpr register. */
967static __inline__ IRExpr *
968get_gpr_w1(UInt archreg)
969{
970 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
971}
972
973/* Return the guest state offset of half word #3 of a gpr register. */
974static __inline__ UInt
975gpr_hw3_offset(UInt archreg)
976{
977 return gpr_offset(archreg) + 6;
978}
979
980/* Write half word #3 of a gpr to the guest state. */
981static __inline__ void
982put_gpr_hw3(UInt archreg, IRExpr *expr)
983{
984 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
985
986 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
987}
988
989/* Read half word #3 of a gpr register. */
990static __inline__ IRExpr *
991get_gpr_hw3(UInt archreg)
992{
993 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
994}
995
996/* Return the guest state offset of byte #7 of a gpr register. */
997static __inline__ UInt
998gpr_b7_offset(UInt archreg)
999{
1000 return gpr_offset(archreg) + 7;
1001}
1002
1003/* Write byte #7 of a gpr to the guest state. */
1004static __inline__ void
1005put_gpr_b7(UInt archreg, IRExpr *expr)
1006{
1007 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1008
1009 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1010}
1011
1012/* Read byte #7 of a gpr register. */
1013static __inline__ IRExpr *
1014get_gpr_b7(UInt archreg)
1015{
1016 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1017}
1018
1019/* Return the guest state offset of half word #0 of a gpr register. */
1020static __inline__ UInt
1021gpr_hw0_offset(UInt archreg)
1022{
1023 return gpr_offset(archreg) + 0;
1024}
1025
1026/* Write half word #0 of a gpr to the guest state. */
1027static __inline__ void
1028put_gpr_hw0(UInt archreg, IRExpr *expr)
1029{
1030 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1031
1032 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1033}
1034
1035/* Read half word #0 of a gpr register. */
1036static __inline__ IRExpr *
1037get_gpr_hw0(UInt archreg)
1038{
1039 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1040}
1041
1042/* Return the guest state offset of byte #4 of a gpr register. */
1043static __inline__ UInt
1044gpr_b4_offset(UInt archreg)
1045{
1046 return gpr_offset(archreg) + 4;
1047}
1048
1049/* Write byte #4 of a gpr to the guest state. */
1050static __inline__ void
1051put_gpr_b4(UInt archreg, IRExpr *expr)
1052{
1053 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1054
1055 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1056}
1057
1058/* Read byte #4 of a gpr register. */
1059static __inline__ IRExpr *
1060get_gpr_b4(UInt archreg)
1061{
1062 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1063}
1064
1065/* Return the guest state offset of byte #1 of a gpr register. */
1066static __inline__ UInt
1067gpr_b1_offset(UInt archreg)
1068{
1069 return gpr_offset(archreg) + 1;
1070}
1071
1072/* Write byte #1 of a gpr to the guest state. */
1073static __inline__ void
1074put_gpr_b1(UInt archreg, IRExpr *expr)
1075{
1076 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1077
1078 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1079}
1080
1081/* Read byte #1 of a gpr register. */
1082static __inline__ IRExpr *
1083get_gpr_b1(UInt archreg)
1084{
1085 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1086}
1087
1088/* Return the guest state offset of half word #2 of a gpr register. */
1089static __inline__ UInt
1090gpr_hw2_offset(UInt archreg)
1091{
1092 return gpr_offset(archreg) + 4;
1093}
1094
1095/* Write half word #2 of a gpr to the guest state. */
1096static __inline__ void
1097put_gpr_hw2(UInt archreg, IRExpr *expr)
1098{
1099 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1100
1101 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1102}
1103
1104/* Read half word #2 of a gpr register. */
1105static __inline__ IRExpr *
1106get_gpr_hw2(UInt archreg)
1107{
1108 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1109}
1110
1111/* Return the guest state offset of byte #5 of a gpr register. */
1112static __inline__ UInt
1113gpr_b5_offset(UInt archreg)
1114{
1115 return gpr_offset(archreg) + 5;
1116}
1117
1118/* Write byte #5 of a gpr to the guest state. */
1119static __inline__ void
1120put_gpr_b5(UInt archreg, IRExpr *expr)
1121{
1122 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1123
1124 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1125}
1126
1127/* Read byte #5 of a gpr register. */
1128static __inline__ IRExpr *
1129get_gpr_b5(UInt archreg)
1130{
1131 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1132}
1133
1134/* Return the guest state offset of byte #2 of a gpr register. */
1135static __inline__ UInt
1136gpr_b2_offset(UInt archreg)
1137{
1138 return gpr_offset(archreg) + 2;
1139}
1140
1141/* Write byte #2 of a gpr to the guest state. */
1142static __inline__ void
1143put_gpr_b2(UInt archreg, IRExpr *expr)
1144{
1145 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1146
1147 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1148}
1149
1150/* Read byte #2 of a gpr register. */
1151static __inline__ IRExpr *
1152get_gpr_b2(UInt archreg)
1153{
1154 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1155}
1156
1157/* Return the guest state offset of the counter register. */
1158static UInt
1159counter_offset(void)
1160{
1161 return offsetof(VexGuestS390XState, guest_counter);
1162}
1163
1164/* Return the guest state offset of double word #0 of the counter register. */
1165static __inline__ UInt
1166counter_dw0_offset(void)
1167{
1168 return counter_offset() + 0;
1169}
1170
1171/* Write double word #0 of the counter to the guest state. */
1172static __inline__ void
1173put_counter_dw0(IRExpr *expr)
1174{
1175 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1176
1177 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1178}
1179
1180/* Read double word #0 of the counter register. */
1181static __inline__ IRExpr *
1182get_counter_dw0(void)
1183{
1184 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1185}
1186
1187/* Return the guest state offset of word #0 of the counter register. */
1188static __inline__ UInt
1189counter_w0_offset(void)
1190{
1191 return counter_offset() + 0;
1192}
1193
1194/* Return the guest state offset of word #1 of the counter register. */
1195static __inline__ UInt
1196counter_w1_offset(void)
1197{
1198 return counter_offset() + 4;
1199}
1200
1201/* Write word #0 of the counter to the guest state. */
1202static __inline__ void
1203put_counter_w0(IRExpr *expr)
1204{
1205 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1206
1207 stmt(IRStmt_Put(counter_w0_offset(), expr));
1208}
1209
1210/* Read word #0 of the counter register. */
1211static __inline__ IRExpr *
1212get_counter_w0(void)
1213{
1214 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1215}
1216
1217/* Write word #1 of the counter to the guest state. */
1218static __inline__ void
1219put_counter_w1(IRExpr *expr)
1220{
1221 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1222
1223 stmt(IRStmt_Put(counter_w1_offset(), expr));
1224}
1225
1226/* Read word #1 of the counter register. */
1227static __inline__ IRExpr *
1228get_counter_w1(void)
1229{
1230 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1231}
1232
1233/* Return the guest state offset of the fpc register. */
1234static UInt
1235fpc_offset(void)
1236{
1237 return offsetof(VexGuestS390XState, guest_fpc);
1238}
1239
1240/* Return the guest state offset of word #0 of the fpc register. */
1241static __inline__ UInt
1242fpc_w0_offset(void)
1243{
1244 return fpc_offset() + 0;
1245}
1246
1247/* Write word #0 of the fpc to the guest state. */
1248static __inline__ void
1249put_fpc_w0(IRExpr *expr)
1250{
1251 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1252
1253 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1254}
1255
1256/* Read word #0 of the fpc register. */
1257static __inline__ IRExpr *
1258get_fpc_w0(void)
1259{
1260 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1261}
1262
1263
1264/*------------------------------------------------------------*/
1265/*--- Build IR for formats ---*/
1266/*------------------------------------------------------------*/
1267static void
1268s390_format_I(HChar *(*irgen)(UChar i),
1269 UChar i)
1270{
1271 HChar *mnm = irgen(i);
1272
1273 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1274 s390_disasm(ENC2(MNM, UINT), mnm, i);
1275}
1276
1277static void
1278s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1279 UChar r1, UShort i2)
1280{
1281 irgen(r1, i2);
1282}
1283
1284static void
1285s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1286 UChar r1, UShort i2)
1287{
1288 HChar *mnm = irgen(r1, i2);
1289
1290 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1291 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1292}
1293
1294static void
1295s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1296 UChar r1, UShort i2)
1297{
1298 HChar *mnm = irgen(r1, i2);
1299
1300 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1301 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1302}
1303
1304static void
1305s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1306 UChar r1, UShort i2)
1307{
1308 HChar *mnm = irgen(r1, i2);
1309
1310 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1311 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1312}
1313
1314static void
1315s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1316 UChar r1, UChar r3, UShort i2)
1317{
1318 HChar *mnm = irgen(r1, r3, i2);
1319
1320 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1321 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1322}
1323
1324static void
1325s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1326 UChar r1, UChar r3, UShort i2)
1327{
1328 HChar *mnm = irgen(r1, r3, i2);
1329
1330 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1331 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1332}
1333
1334static void
1335s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1336 UChar i5),
1337 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1338{
1339 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1340
1341 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1342 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1343 i5);
1344}
1345
1346static void
1347s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1348 UChar r1, UChar r2, UShort i4, UChar m3)
1349{
1350 HChar *mnm = irgen(r1, r2, i4, m3);
1351
1352 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1353 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1354 r2, m3, (Int)(Short)i4);
1355}
1356
1357static void
1358s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1359 UChar r1, UChar m3, UShort i4, UChar i2)
1360{
1361 HChar *mnm = irgen(r1, m3, i4, i2);
1362
1363 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1364 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1365 r1, i2, m3, (Int)(Short)i4);
1366}
1367
1368static void
1369s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1370 UChar r1, UChar m3, UShort i4, UChar i2)
1371{
1372 HChar *mnm = irgen(r1, m3, i4, i2);
1373
1374 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1375 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1376 (Int)(Char)i2, m3, (Int)(Short)i4);
1377}
1378
1379static void
1380s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1381 UChar r1, UInt i2)
1382{
1383 irgen(r1, i2);
1384}
1385
1386static void
1387s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1388 UChar r1, UInt i2)
1389{
1390 HChar *mnm = irgen(r1, i2);
1391
1392 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1393 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1394}
1395
1396static void
1397s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1398 UChar r1, UInt i2)
1399{
1400 HChar *mnm = irgen(r1, i2);
1401
1402 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1403 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1404}
1405
1406static void
1407s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1408 UChar r1, UInt i2)
1409{
1410 HChar *mnm = irgen(r1, i2);
1411
1412 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1413 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1414}
1415
1416static void
1417s390_format_RIL_UP(HChar *(*irgen)(void),
1418 UChar r1, UInt i2)
1419{
1420 HChar *mnm = irgen();
1421
1422 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1423 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1424}
1425
1426static void
1427s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1428 IRTemp op4addr),
1429 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1430{
1431 HChar *mnm;
1432 IRTemp op4addr = newTemp(Ity_I64);
1433
1434 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1435 mkU64(0)));
1436
1437 mnm = irgen(r1, m3, i2, op4addr);
1438
1439 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1440 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1441 (Int)(Char)i2, m3, d4, 0, b4);
1442}
1443
1444static void
1445s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1446 IRTemp op4addr),
1447 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1448{
1449 HChar *mnm;
1450 IRTemp op4addr = newTemp(Ity_I64);
1451
1452 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1453 mkU64(0)));
1454
1455 mnm = irgen(r1, m3, i2, op4addr);
1456
1457 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1458 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1459 i2, m3, d4, 0, b4);
1460}
1461
1462static void
1463s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1464 UChar r1, UChar r2)
1465{
1466 irgen(r1, r2);
1467}
1468
1469static void
1470s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1471 UChar r1, UChar r2)
1472{
1473 HChar *mnm = irgen(r1, r2);
1474
1475 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1476 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1477}
1478
1479static void
1480s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1481 UChar r1, UChar r2)
1482{
1483 HChar *mnm = irgen(r1, r2);
1484
1485 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1486 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1487}
1488
1489static void
1490s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1491 UChar r1, UChar r2)
1492{
1493 irgen(r1, r2);
1494}
1495
1496static void
1497s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1498 UChar r1, UChar r2)
1499{
1500 HChar *mnm = irgen(r1, r2);
1501
1502 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1503 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1504}
1505
1506static void
1507s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1508 UChar r1, UChar r2)
1509{
1510 HChar *mnm = irgen(r1, r2);
1511
1512 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1513 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1514}
1515
1516static void
1517s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1518 UChar r1, UChar r2)
1519{
1520 HChar *mnm = irgen(r1, r2);
1521
1522 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1523 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1524}
1525
1526static void
1527s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1528 UChar r1, UChar r2)
1529{
1530 HChar *mnm = irgen(r1, r2);
1531
1532 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1533 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1534}
1535
1536static void
1537s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1538 UChar r1)
1539{
1540 HChar *mnm = irgen(r1);
1541
1542 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1543 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1544}
1545
1546static void
1547s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1548 UChar r1)
1549{
1550 HChar *mnm = irgen(r1);
1551
1552 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1553 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1554}
1555
1556static void
1557s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1558 UChar r1, UChar r3, UChar r2)
1559{
1560 HChar *mnm = irgen(r1, r3, r2);
1561
1562 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1563 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1564}
1565
1566static void
1567s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1568 UChar r3, UChar r1, UChar r2)
1569{
1570 HChar *mnm = irgen(r3, r1, r2);
1571
1572 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1573 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1574}
1575
1576static void
1577s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1578 UChar r3, UChar r1, UChar r2)
1579{
1580 HChar *mnm = irgen(r3, r1, r2);
1581
1582 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1583 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1584}
1585
1586static void
1587s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1588 UChar r3, UChar r1, UChar r2)
1589{
1590 HChar *mnm = irgen(r3, r1, r2);
1591
1592 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1593 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1594}
1595
1596static void
1597s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1598 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1599{
1600 HChar *mnm;
1601 IRTemp op4addr = newTemp(Ity_I64);
1602
1603 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1604 mkU64(0)));
1605
1606 mnm = irgen(r1, r2, m3, op4addr);
1607
1608 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1609 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1610 r2, m3, d4, 0, b4);
1611}
1612
1613static void
1614s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1615 UChar r1, UChar b2, UShort d2)
1616{
1617 HChar *mnm;
1618 IRTemp op2addr = newTemp(Ity_I64);
1619
1620 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1621 mkU64(0)));
1622
1623 mnm = irgen(r1, op2addr);
1624
1625 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1626 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1627}
1628
1629static void
1630s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1631 UChar r1, UChar r3, UChar b2, UShort d2)
1632{
1633 HChar *mnm;
1634 IRTemp op2addr = newTemp(Ity_I64);
1635
1636 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1637 mkU64(0)));
1638
1639 mnm = irgen(r1, r3, op2addr);
1640
1641 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1642 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1643}
1644
1645static void
1646s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1647 UChar r1, UChar r3, UChar b2, UShort d2)
1648{
1649 HChar *mnm;
1650 IRTemp op2addr = newTemp(Ity_I64);
1651
1652 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1653 mkU64(0)));
1654
1655 mnm = irgen(r1, r3, op2addr);
1656
1657 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1658 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1659}
1660
1661static void
1662s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1663 UChar r1, UChar r3, UChar b2, UShort d2)
1664{
1665 HChar *mnm;
1666 IRTemp op2addr = newTemp(Ity_I64);
1667
1668 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1669 mkU64(0)));
1670
1671 mnm = irgen(r1, r3, op2addr);
1672
1673 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1674 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1675}
1676
1677static void
1678s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1679 UChar r1, UChar r3, UShort i2)
1680{
1681 HChar *mnm = irgen(r1, r3, i2);
1682
1683 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1684 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1685}
1686
1687static void
1688s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1689 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1690{
1691 HChar *mnm;
1692 IRTemp op2addr = newTemp(Ity_I64);
1693 IRTemp d2 = newTemp(Ity_I64);
1694
1695 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1696 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1697 mkU64(0)));
1698
1699 mnm = irgen(r1, r3, op2addr);
1700
1701 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1702 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1703}
1704
1705static void
1706s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1707 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1708{
1709 HChar *mnm;
1710 IRTemp op2addr = newTemp(Ity_I64);
1711 IRTemp d2 = newTemp(Ity_I64);
1712
1713 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1714 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1715 mkU64(0)));
1716
1717 mnm = irgen(r1, r3, op2addr);
1718
1719 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1720 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1721}
1722
1723static void
1724s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1725 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1726{
1727 HChar *mnm;
1728 IRTemp op2addr = newTemp(Ity_I64);
1729 IRTemp d2 = newTemp(Ity_I64);
1730
1731 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1732 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1733 mkU64(0)));
1734
1735 mnm = irgen(r1, r3, op2addr);
1736
1737 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1738 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1739}
1740
1741static void
1742s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1743 IRTemp op2addr),
1744 UChar r1, UChar x2, UChar b2, UShort d2)
1745{
1746 IRTemp op2addr = newTemp(Ity_I64);
1747
1748 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1749 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1750 mkU64(0)));
1751
1752 irgen(r1, x2, b2, d2, op2addr);
1753}
1754
1755static void
1756s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1757 UChar r1, UChar x2, UChar b2, UShort d2)
1758{
1759 HChar *mnm;
1760 IRTemp op2addr = newTemp(Ity_I64);
1761
1762 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1763 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1764 mkU64(0)));
1765
1766 mnm = irgen(r1, op2addr);
1767
1768 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1769 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1770}
1771
1772static void
1773s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1774 UChar r1, UChar x2, UChar b2, UShort d2)
1775{
1776 HChar *mnm;
1777 IRTemp op2addr = newTemp(Ity_I64);
1778
1779 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1780 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1781 mkU64(0)));
1782
1783 mnm = irgen(r1, op2addr);
1784
1785 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1786 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1787}
1788
1789static void
1790s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1791 UChar r1, UChar x2, UChar b2, UShort d2)
1792{
1793 HChar *mnm;
1794 IRTemp op2addr = newTemp(Ity_I64);
1795
1796 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1797 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1798 mkU64(0)));
1799
1800 mnm = irgen(r1, op2addr);
1801
1802 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1803 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1804}
1805
1806static void
1807s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1808 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1809{
1810 HChar *mnm;
1811 IRTemp op2addr = newTemp(Ity_I64);
1812
1813 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1814 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1815 mkU64(0)));
1816
1817 mnm = irgen(r3, op2addr, r1);
1818
1819 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1820 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1821}
1822
1823static void
1824s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1825 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1826{
1827 HChar *mnm;
1828 IRTemp op2addr = newTemp(Ity_I64);
1829 IRTemp d2 = newTemp(Ity_I64);
1830
1831 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1832 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1833 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1834 mkU64(0)));
1835
1836 mnm = irgen(r1, op2addr);
1837
1838 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1839 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1840}
1841
1842static void
1843s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1844 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1845{
1846 HChar *mnm;
1847 IRTemp op2addr = newTemp(Ity_I64);
1848 IRTemp d2 = newTemp(Ity_I64);
1849
1850 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1851 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1852 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1853 mkU64(0)));
1854
1855 mnm = irgen(r1, op2addr);
1856
1857 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1858 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1859}
1860
1861static void
1862s390_format_RXY_URRD(HChar *(*irgen)(void),
1863 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1864{
1865 HChar *mnm;
1866 IRTemp op2addr = newTemp(Ity_I64);
1867 IRTemp d2 = newTemp(Ity_I64);
1868
1869 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1870 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1871 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1872 mkU64(0)));
1873
1874 mnm = irgen();
1875
1876 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1877 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1878}
1879
1880static void
1881s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1882 UChar b2, UShort d2)
1883{
1884 HChar *mnm;
1885 IRTemp op2addr = newTemp(Ity_I64);
1886
1887 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1888 mkU64(0)));
1889
1890 mnm = irgen(op2addr);
1891
1892 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1893 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1894}
1895
1896static void
1897s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1898 UChar i2, UChar b1, UShort d1)
1899{
1900 HChar *mnm;
1901 IRTemp op1addr = newTemp(Ity_I64);
1902
1903 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1904 mkU64(0)));
1905
1906 mnm = irgen(i2, op1addr);
1907
1908 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1909 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1910}
1911
1912static void
1913s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1914 UChar i2, UChar b1, UShort dl1, UChar dh1)
1915{
1916 HChar *mnm;
1917 IRTemp op1addr = newTemp(Ity_I64);
1918 IRTemp d1 = newTemp(Ity_I64);
1919
1920 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1921 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1922 mkU64(0)));
1923
1924 mnm = irgen(i2, op1addr);
1925
1926 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1927 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1928}
1929
1930static void
1931s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1932 UChar i2, UChar b1, UShort dl1, UChar dh1)
1933{
1934 HChar *mnm;
1935 IRTemp op1addr = newTemp(Ity_I64);
1936 IRTemp d1 = newTemp(Ity_I64);
1937
1938 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1939 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1940 mkU64(0)));
1941
1942 mnm = irgen(i2, op1addr);
1943
1944 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1945 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
1946}
1947
1948static void
1949s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
1950 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
1951{
1952 HChar *mnm;
1953 IRTemp op1addr = newTemp(Ity_I64);
1954 IRTemp op2addr = newTemp(Ity_I64);
1955
1956 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1957 mkU64(0)));
1958 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1959 mkU64(0)));
1960
1961 mnm = irgen(l, op1addr, op2addr);
1962
1963 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1964 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
1965}
1966
1967static void
1968s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
1969 UChar b1, UShort d1, UShort i2)
1970{
1971 HChar *mnm;
1972 IRTemp op1addr = newTemp(Ity_I64);
1973
1974 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1975 mkU64(0)));
1976
1977 mnm = irgen(i2, op1addr);
1978
1979 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1980 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
1981}
1982
1983static void
1984s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
1985 UChar b1, UShort d1, UShort i2)
1986{
1987 HChar *mnm;
1988 IRTemp op1addr = newTemp(Ity_I64);
1989
1990 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1991 mkU64(0)));
1992
1993 mnm = irgen(i2, op1addr);
1994
1995 if (unlikely(vex_traceflags & VEX_TRACE_FE))
1996 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1997}
1998
1999
2000
2001/*------------------------------------------------------------*/
2002/*--- Build IR for opcodes ---*/
2003/*------------------------------------------------------------*/
2004
2005static HChar *
2006s390_irgen_AR(UChar r1, UChar r2)
2007{
2008 IRTemp op1 = newTemp(Ity_I32);
2009 IRTemp op2 = newTemp(Ity_I32);
2010 IRTemp result = newTemp(Ity_I32);
2011
2012 assign(op1, get_gpr_w1(r1));
2013 assign(op2, get_gpr_w1(r2));
2014 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2015 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2016 put_gpr_w1(r1, mkexpr(result));
2017
2018 return "ar";
2019}
2020
2021static HChar *
2022s390_irgen_AGR(UChar r1, UChar r2)
2023{
2024 IRTemp op1 = newTemp(Ity_I64);
2025 IRTemp op2 = newTemp(Ity_I64);
2026 IRTemp result = newTemp(Ity_I64);
2027
2028 assign(op1, get_gpr_dw0(r1));
2029 assign(op2, get_gpr_dw0(r2));
2030 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2031 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2032 put_gpr_dw0(r1, mkexpr(result));
2033
2034 return "agr";
2035}
2036
2037static HChar *
2038s390_irgen_AGFR(UChar r1, UChar r2)
2039{
2040 IRTemp op1 = newTemp(Ity_I64);
2041 IRTemp op2 = newTemp(Ity_I64);
2042 IRTemp result = newTemp(Ity_I64);
2043
2044 assign(op1, get_gpr_dw0(r1));
2045 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2046 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2047 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2048 put_gpr_dw0(r1, mkexpr(result));
2049
2050 return "agfr";
2051}
2052
2053static HChar *
2054s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2055{
2056 IRTemp op2 = newTemp(Ity_I32);
2057 IRTemp op3 = newTemp(Ity_I32);
2058 IRTemp result = newTemp(Ity_I32);
2059
2060 assign(op2, get_gpr_w1(r2));
2061 assign(op3, get_gpr_w1(r3));
2062 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2063 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2064 put_gpr_w1(r1, mkexpr(result));
2065
2066 return "ark";
2067}
2068
2069static HChar *
2070s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2071{
2072 IRTemp op2 = newTemp(Ity_I64);
2073 IRTemp op3 = newTemp(Ity_I64);
2074 IRTemp result = newTemp(Ity_I64);
2075
2076 assign(op2, get_gpr_dw0(r2));
2077 assign(op3, get_gpr_dw0(r3));
2078 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2079 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2080 put_gpr_dw0(r1, mkexpr(result));
2081
2082 return "agrk";
2083}
2084
2085static HChar *
2086s390_irgen_A(UChar r1, IRTemp op2addr)
2087{
2088 IRTemp op1 = newTemp(Ity_I32);
2089 IRTemp op2 = newTemp(Ity_I32);
2090 IRTemp result = newTemp(Ity_I32);
2091
2092 assign(op1, get_gpr_w1(r1));
2093 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2094 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2095 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2096 put_gpr_w1(r1, mkexpr(result));
2097
2098 return "a";
2099}
2100
2101static HChar *
2102s390_irgen_AY(UChar r1, IRTemp op2addr)
2103{
2104 IRTemp op1 = newTemp(Ity_I32);
2105 IRTemp op2 = newTemp(Ity_I32);
2106 IRTemp result = newTemp(Ity_I32);
2107
2108 assign(op1, get_gpr_w1(r1));
2109 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2110 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2111 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2112 put_gpr_w1(r1, mkexpr(result));
2113
2114 return "ay";
2115}
2116
2117static HChar *
2118s390_irgen_AG(UChar r1, IRTemp op2addr)
2119{
2120 IRTemp op1 = newTemp(Ity_I64);
2121 IRTemp op2 = newTemp(Ity_I64);
2122 IRTemp result = newTemp(Ity_I64);
2123
2124 assign(op1, get_gpr_dw0(r1));
2125 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2126 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2127 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2128 put_gpr_dw0(r1, mkexpr(result));
2129
2130 return "ag";
2131}
2132
2133static HChar *
2134s390_irgen_AGF(UChar r1, IRTemp op2addr)
2135{
2136 IRTemp op1 = newTemp(Ity_I64);
2137 IRTemp op2 = newTemp(Ity_I64);
2138 IRTemp result = newTemp(Ity_I64);
2139
2140 assign(op1, get_gpr_dw0(r1));
2141 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2142 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2143 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2144 put_gpr_dw0(r1, mkexpr(result));
2145
2146 return "agf";
2147}
2148
2149static HChar *
2150s390_irgen_AFI(UChar r1, UInt i2)
2151{
2152 IRTemp op1 = newTemp(Ity_I32);
2153 Int op2;
2154 IRTemp result = newTemp(Ity_I32);
2155
2156 assign(op1, get_gpr_w1(r1));
2157 op2 = (Int)i2;
2158 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2159 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2160 mkU32((UInt)op2)));
2161 put_gpr_w1(r1, mkexpr(result));
2162
2163 return "afi";
2164}
2165
2166static HChar *
2167s390_irgen_AGFI(UChar r1, UInt i2)
2168{
2169 IRTemp op1 = newTemp(Ity_I64);
2170 Long op2;
2171 IRTemp result = newTemp(Ity_I64);
2172
2173 assign(op1, get_gpr_dw0(r1));
2174 op2 = (Long)(Int)i2;
2175 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2176 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2177 mkU64((ULong)op2)));
2178 put_gpr_dw0(r1, mkexpr(result));
2179
2180 return "agfi";
2181}
2182
2183static HChar *
2184s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2185{
2186 Int op2;
2187 IRTemp op3 = newTemp(Ity_I32);
2188 IRTemp result = newTemp(Ity_I32);
2189
2190 op2 = (Int)(Short)i2;
2191 assign(op3, get_gpr_w1(r3));
2192 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2193 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2194 op2)), op3);
2195 put_gpr_w1(r1, mkexpr(result));
2196
2197 return "ahik";
2198}
2199
2200static HChar *
2201s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2202{
2203 Long op2;
2204 IRTemp op3 = newTemp(Ity_I64);
2205 IRTemp result = newTemp(Ity_I64);
2206
2207 op2 = (Long)(Short)i2;
2208 assign(op3, get_gpr_dw0(r3));
2209 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2210 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2211 op2)), op3);
2212 put_gpr_dw0(r1, mkexpr(result));
2213
2214 return "aghik";
2215}
2216
2217static HChar *
2218s390_irgen_ASI(UChar i2, IRTemp op1addr)
2219{
2220 IRTemp op1 = newTemp(Ity_I32);
2221 Int op2;
2222 IRTemp result = newTemp(Ity_I32);
2223
2224 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2225 op2 = (Int)(Char)i2;
2226 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2227 store(mkexpr(op1addr), mkexpr(result));
2228 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2229 mkU32((UInt)op2)));
2230
2231 return "asi";
2232}
2233
2234static HChar *
2235s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2236{
2237 IRTemp op1 = newTemp(Ity_I64);
2238 Long op2;
2239 IRTemp result = newTemp(Ity_I64);
2240
2241 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2242 op2 = (Long)(Char)i2;
2243 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2244 store(mkexpr(op1addr), mkexpr(result));
2245 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2246 mkU64((ULong)op2)));
2247
2248 return "agsi";
2249}
2250
2251static HChar *
2252s390_irgen_AH(UChar r1, IRTemp op2addr)
2253{
2254 IRTemp op1 = newTemp(Ity_I32);
2255 IRTemp op2 = newTemp(Ity_I32);
2256 IRTemp result = newTemp(Ity_I32);
2257
2258 assign(op1, get_gpr_w1(r1));
2259 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2260 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2261 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2262 put_gpr_w1(r1, mkexpr(result));
2263
2264 return "ah";
2265}
2266
2267static HChar *
2268s390_irgen_AHY(UChar r1, IRTemp op2addr)
2269{
2270 IRTemp op1 = newTemp(Ity_I32);
2271 IRTemp op2 = newTemp(Ity_I32);
2272 IRTemp result = newTemp(Ity_I32);
2273
2274 assign(op1, get_gpr_w1(r1));
2275 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2276 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2277 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2278 put_gpr_w1(r1, mkexpr(result));
2279
2280 return "ahy";
2281}
2282
2283static HChar *
2284s390_irgen_AHI(UChar r1, UShort i2)
2285{
2286 IRTemp op1 = newTemp(Ity_I32);
2287 Int op2;
2288 IRTemp result = newTemp(Ity_I32);
2289
2290 assign(op1, get_gpr_w1(r1));
2291 op2 = (Int)(Short)i2;
2292 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2293 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2294 mkU32((UInt)op2)));
2295 put_gpr_w1(r1, mkexpr(result));
2296
2297 return "ahi";
2298}
2299
2300static HChar *
2301s390_irgen_AGHI(UChar r1, UShort i2)
2302{
2303 IRTemp op1 = newTemp(Ity_I64);
2304 Long op2;
2305 IRTemp result = newTemp(Ity_I64);
2306
2307 assign(op1, get_gpr_dw0(r1));
2308 op2 = (Long)(Short)i2;
2309 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2310 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2311 mkU64((ULong)op2)));
2312 put_gpr_dw0(r1, mkexpr(result));
2313
2314 return "aghi";
2315}
2316
2317static HChar *
2318s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2319{
2320 IRTemp op2 = newTemp(Ity_I32);
2321 IRTemp op3 = newTemp(Ity_I32);
2322 IRTemp result = newTemp(Ity_I32);
2323
2324 assign(op2, get_gpr_w0(r2));
2325 assign(op3, get_gpr_w0(r3));
2326 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2327 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2328 put_gpr_w0(r1, mkexpr(result));
2329
2330 return "ahhhr";
2331}
2332
2333static HChar *
2334s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2335{
2336 IRTemp op2 = newTemp(Ity_I32);
2337 IRTemp op3 = newTemp(Ity_I32);
2338 IRTemp result = newTemp(Ity_I32);
2339
2340 assign(op2, get_gpr_w0(r2));
2341 assign(op3, get_gpr_w1(r3));
2342 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2343 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2344 put_gpr_w0(r1, mkexpr(result));
2345
2346 return "ahhlr";
2347}
2348
2349static HChar *
2350s390_irgen_AIH(UChar r1, UInt i2)
2351{
2352 IRTemp op1 = newTemp(Ity_I32);
2353 Int op2;
2354 IRTemp result = newTemp(Ity_I32);
2355
2356 assign(op1, get_gpr_w0(r1));
2357 op2 = (Int)i2;
2358 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2359 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2360 mkU32((UInt)op2)));
2361 put_gpr_w0(r1, mkexpr(result));
2362
2363 return "aih";
2364}
2365
2366static HChar *
2367s390_irgen_ALR(UChar r1, UChar r2)
2368{
2369 IRTemp op1 = newTemp(Ity_I32);
2370 IRTemp op2 = newTemp(Ity_I32);
2371 IRTemp result = newTemp(Ity_I32);
2372
2373 assign(op1, get_gpr_w1(r1));
2374 assign(op2, get_gpr_w1(r2));
2375 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2376 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2377 put_gpr_w1(r1, mkexpr(result));
2378
2379 return "alr";
2380}
2381
2382static HChar *
2383s390_irgen_ALGR(UChar r1, UChar r2)
2384{
2385 IRTemp op1 = newTemp(Ity_I64);
2386 IRTemp op2 = newTemp(Ity_I64);
2387 IRTemp result = newTemp(Ity_I64);
2388
2389 assign(op1, get_gpr_dw0(r1));
2390 assign(op2, get_gpr_dw0(r2));
2391 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2392 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2393 put_gpr_dw0(r1, mkexpr(result));
2394
2395 return "algr";
2396}
2397
2398static HChar *
2399s390_irgen_ALGFR(UChar r1, UChar r2)
2400{
2401 IRTemp op1 = newTemp(Ity_I64);
2402 IRTemp op2 = newTemp(Ity_I64);
2403 IRTemp result = newTemp(Ity_I64);
2404
2405 assign(op1, get_gpr_dw0(r1));
2406 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2407 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2408 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2409 put_gpr_dw0(r1, mkexpr(result));
2410
2411 return "algfr";
2412}
2413
2414static HChar *
2415s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2416{
2417 IRTemp op2 = newTemp(Ity_I32);
2418 IRTemp op3 = newTemp(Ity_I32);
2419 IRTemp result = newTemp(Ity_I32);
2420
2421 assign(op2, get_gpr_w1(r2));
2422 assign(op3, get_gpr_w1(r3));
2423 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2424 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2425 put_gpr_w1(r1, mkexpr(result));
2426
2427 return "alrk";
2428}
2429
2430static HChar *
2431s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2432{
2433 IRTemp op2 = newTemp(Ity_I64);
2434 IRTemp op3 = newTemp(Ity_I64);
2435 IRTemp result = newTemp(Ity_I64);
2436
2437 assign(op2, get_gpr_dw0(r2));
2438 assign(op3, get_gpr_dw0(r3));
2439 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2440 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2441 put_gpr_dw0(r1, mkexpr(result));
2442
2443 return "algrk";
2444}
2445
2446static HChar *
2447s390_irgen_AL(UChar r1, IRTemp op2addr)
2448{
2449 IRTemp op1 = newTemp(Ity_I32);
2450 IRTemp op2 = newTemp(Ity_I32);
2451 IRTemp result = newTemp(Ity_I32);
2452
2453 assign(op1, get_gpr_w1(r1));
2454 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2455 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2456 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2457 put_gpr_w1(r1, mkexpr(result));
2458
2459 return "al";
2460}
2461
2462static HChar *
2463s390_irgen_ALY(UChar r1, IRTemp op2addr)
2464{
2465 IRTemp op1 = newTemp(Ity_I32);
2466 IRTemp op2 = newTemp(Ity_I32);
2467 IRTemp result = newTemp(Ity_I32);
2468
2469 assign(op1, get_gpr_w1(r1));
2470 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2471 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2472 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2473 put_gpr_w1(r1, mkexpr(result));
2474
2475 return "aly";
2476}
2477
2478static HChar *
2479s390_irgen_ALG(UChar r1, IRTemp op2addr)
2480{
2481 IRTemp op1 = newTemp(Ity_I64);
2482 IRTemp op2 = newTemp(Ity_I64);
2483 IRTemp result = newTemp(Ity_I64);
2484
2485 assign(op1, get_gpr_dw0(r1));
2486 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2487 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2488 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2489 put_gpr_dw0(r1, mkexpr(result));
2490
2491 return "alg";
2492}
2493
2494static HChar *
2495s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2496{
2497 IRTemp op1 = newTemp(Ity_I64);
2498 IRTemp op2 = newTemp(Ity_I64);
2499 IRTemp result = newTemp(Ity_I64);
2500
2501 assign(op1, get_gpr_dw0(r1));
2502 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2503 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2504 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2505 put_gpr_dw0(r1, mkexpr(result));
2506
2507 return "algf";
2508}
2509
2510static HChar *
2511s390_irgen_ALFI(UChar r1, UInt i2)
2512{
2513 IRTemp op1 = newTemp(Ity_I32);
2514 UInt op2;
2515 IRTemp result = newTemp(Ity_I32);
2516
2517 assign(op1, get_gpr_w1(r1));
2518 op2 = i2;
2519 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2520 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2521 mkU32(op2)));
2522 put_gpr_w1(r1, mkexpr(result));
2523
2524 return "alfi";
2525}
2526
2527static HChar *
2528s390_irgen_ALGFI(UChar r1, UInt i2)
2529{
2530 IRTemp op1 = newTemp(Ity_I64);
2531 ULong op2;
2532 IRTemp result = newTemp(Ity_I64);
2533
2534 assign(op1, get_gpr_dw0(r1));
2535 op2 = (ULong)i2;
2536 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2537 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2538 mkU64(op2)));
2539 put_gpr_dw0(r1, mkexpr(result));
2540
2541 return "algfi";
2542}
2543
2544static HChar *
2545s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2546{
2547 IRTemp op2 = newTemp(Ity_I32);
2548 IRTemp op3 = newTemp(Ity_I32);
2549 IRTemp result = newTemp(Ity_I32);
2550
2551 assign(op2, get_gpr_w0(r2));
2552 assign(op3, get_gpr_w0(r3));
2553 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2554 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2555 put_gpr_w0(r1, mkexpr(result));
2556
2557 return "alhhhr";
2558}
2559
2560static HChar *
2561s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2562{
2563 IRTemp op2 = newTemp(Ity_I32);
2564 IRTemp op3 = newTemp(Ity_I32);
2565 IRTemp result = newTemp(Ity_I32);
2566
2567 assign(op2, get_gpr_w0(r2));
2568 assign(op3, get_gpr_w1(r3));
2569 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2570 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2571 put_gpr_w0(r1, mkexpr(result));
2572
2573 return "alhhlr";
2574}
2575
2576static HChar *
2577s390_irgen_ALCR(UChar r1, UChar r2)
2578{
2579 IRTemp op1 = newTemp(Ity_I32);
2580 IRTemp op2 = newTemp(Ity_I32);
2581 IRTemp result = newTemp(Ity_I32);
2582 IRTemp carry_in = newTemp(Ity_I32);
2583
2584 assign(op1, get_gpr_w1(r1));
2585 assign(op2, get_gpr_w1(r2));
2586 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2587 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2588 mkexpr(carry_in)));
2589 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2590 put_gpr_w1(r1, mkexpr(result));
2591
2592 return "alcr";
2593}
2594
2595static HChar *
2596s390_irgen_ALCGR(UChar r1, UChar r2)
2597{
2598 IRTemp op1 = newTemp(Ity_I64);
2599 IRTemp op2 = newTemp(Ity_I64);
2600 IRTemp result = newTemp(Ity_I64);
2601 IRTemp carry_in = newTemp(Ity_I64);
2602
2603 assign(op1, get_gpr_dw0(r1));
2604 assign(op2, get_gpr_dw0(r2));
2605 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2606 mkU8(1))));
2607 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2608 mkexpr(carry_in)));
2609 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2610 put_gpr_dw0(r1, mkexpr(result));
2611
2612 return "alcgr";
2613}
2614
2615static HChar *
2616s390_irgen_ALC(UChar r1, IRTemp op2addr)
2617{
2618 IRTemp op1 = newTemp(Ity_I32);
2619 IRTemp op2 = newTemp(Ity_I32);
2620 IRTemp result = newTemp(Ity_I32);
2621 IRTemp carry_in = newTemp(Ity_I32);
2622
2623 assign(op1, get_gpr_w1(r1));
2624 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2625 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2626 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2627 mkexpr(carry_in)));
2628 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2629 put_gpr_w1(r1, mkexpr(result));
2630
2631 return "alc";
2632}
2633
2634static HChar *
2635s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2636{
2637 IRTemp op1 = newTemp(Ity_I64);
2638 IRTemp op2 = newTemp(Ity_I64);
2639 IRTemp result = newTemp(Ity_I64);
2640 IRTemp carry_in = newTemp(Ity_I64);
2641
2642 assign(op1, get_gpr_dw0(r1));
2643 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2644 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2645 mkU8(1))));
2646 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2647 mkexpr(carry_in)));
2648 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2649 put_gpr_dw0(r1, mkexpr(result));
2650
2651 return "alcg";
2652}
2653
2654static HChar *
2655s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2656{
2657 IRTemp op1 = newTemp(Ity_I32);
2658 UInt op2;
2659 IRTemp result = newTemp(Ity_I32);
2660
2661 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2662 op2 = (UInt)(Int)(Char)i2;
2663 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2664 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2665 mkU32(op2)));
2666 store(mkexpr(op1addr), mkexpr(result));
2667
2668 return "alsi";
2669}
2670
2671static HChar *
2672s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2673{
2674 IRTemp op1 = newTemp(Ity_I64);
2675 ULong op2;
2676 IRTemp result = newTemp(Ity_I64);
2677
2678 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2679 op2 = (ULong)(Long)(Char)i2;
2680 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2681 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2682 mkU64(op2)));
2683 store(mkexpr(op1addr), mkexpr(result));
2684
2685 return "algsi";
2686}
2687
2688static HChar *
2689s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2690{
2691 UInt op2;
2692 IRTemp op3 = newTemp(Ity_I32);
2693 IRTemp result = newTemp(Ity_I32);
2694
2695 op2 = (UInt)(Int)(Short)i2;
2696 assign(op3, get_gpr_w1(r3));
2697 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2698 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2699 op3);
2700 put_gpr_w1(r1, mkexpr(result));
2701
2702 return "alhsik";
2703}
2704
2705static HChar *
2706s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2707{
2708 ULong op2;
2709 IRTemp op3 = newTemp(Ity_I64);
2710 IRTemp result = newTemp(Ity_I64);
2711
2712 op2 = (ULong)(Long)(Short)i2;
2713 assign(op3, get_gpr_dw0(r3));
2714 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2715 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2716 op3);
2717 put_gpr_dw0(r1, mkexpr(result));
2718
2719 return "alghsik";
2720}
2721
2722static HChar *
2723s390_irgen_ALSIH(UChar r1, UInt i2)
2724{
2725 IRTemp op1 = newTemp(Ity_I32);
2726 UInt op2;
2727 IRTemp result = newTemp(Ity_I32);
2728
2729 assign(op1, get_gpr_w0(r1));
2730 op2 = i2;
2731 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2732 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2733 mkU32(op2)));
2734 put_gpr_w0(r1, mkexpr(result));
2735
2736 return "alsih";
2737}
2738
2739static HChar *
2740s390_irgen_ALSIHN(UChar r1, UInt i2)
2741{
2742 IRTemp op1 = newTemp(Ity_I32);
2743 UInt op2;
2744 IRTemp result = newTemp(Ity_I32);
2745
2746 assign(op1, get_gpr_w0(r1));
2747 op2 = i2;
2748 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2749 put_gpr_w0(r1, mkexpr(result));
2750
2751 return "alsihn";
2752}
2753
2754static HChar *
2755s390_irgen_NR(UChar r1, UChar r2)
2756{
2757 IRTemp op1 = newTemp(Ity_I32);
2758 IRTemp op2 = newTemp(Ity_I32);
2759 IRTemp result = newTemp(Ity_I32);
2760
2761 assign(op1, get_gpr_w1(r1));
2762 assign(op2, get_gpr_w1(r2));
2763 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2764 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2765 put_gpr_w1(r1, mkexpr(result));
2766
2767 return "nr";
2768}
2769
2770static HChar *
2771s390_irgen_NGR(UChar r1, UChar r2)
2772{
2773 IRTemp op1 = newTemp(Ity_I64);
2774 IRTemp op2 = newTemp(Ity_I64);
2775 IRTemp result = newTemp(Ity_I64);
2776
2777 assign(op1, get_gpr_dw0(r1));
2778 assign(op2, get_gpr_dw0(r2));
2779 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2780 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2781 put_gpr_dw0(r1, mkexpr(result));
2782
2783 return "ngr";
2784}
2785
2786static HChar *
2787s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2788{
2789 IRTemp op2 = newTemp(Ity_I32);
2790 IRTemp op3 = newTemp(Ity_I32);
2791 IRTemp result = newTemp(Ity_I32);
2792
2793 assign(op2, get_gpr_w1(r2));
2794 assign(op3, get_gpr_w1(r3));
2795 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2796 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2797 put_gpr_w1(r1, mkexpr(result));
2798
2799 return "nrk";
2800}
2801
2802static HChar *
2803s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2804{
2805 IRTemp op2 = newTemp(Ity_I64);
2806 IRTemp op3 = newTemp(Ity_I64);
2807 IRTemp result = newTemp(Ity_I64);
2808
2809 assign(op2, get_gpr_dw0(r2));
2810 assign(op3, get_gpr_dw0(r3));
2811 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2812 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2813 put_gpr_dw0(r1, mkexpr(result));
2814
2815 return "ngrk";
2816}
2817
2818static HChar *
2819s390_irgen_N(UChar r1, IRTemp op2addr)
2820{
2821 IRTemp op1 = newTemp(Ity_I32);
2822 IRTemp op2 = newTemp(Ity_I32);
2823 IRTemp result = newTemp(Ity_I32);
2824
2825 assign(op1, get_gpr_w1(r1));
2826 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2827 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2828 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2829 put_gpr_w1(r1, mkexpr(result));
2830
2831 return "n";
2832}
2833
2834static HChar *
2835s390_irgen_NY(UChar r1, IRTemp op2addr)
2836{
2837 IRTemp op1 = newTemp(Ity_I32);
2838 IRTemp op2 = newTemp(Ity_I32);
2839 IRTemp result = newTemp(Ity_I32);
2840
2841 assign(op1, get_gpr_w1(r1));
2842 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2843 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2844 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2845 put_gpr_w1(r1, mkexpr(result));
2846
2847 return "ny";
2848}
2849
2850static HChar *
2851s390_irgen_NG(UChar r1, IRTemp op2addr)
2852{
2853 IRTemp op1 = newTemp(Ity_I64);
2854 IRTemp op2 = newTemp(Ity_I64);
2855 IRTemp result = newTemp(Ity_I64);
2856
2857 assign(op1, get_gpr_dw0(r1));
2858 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2859 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2860 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2861 put_gpr_dw0(r1, mkexpr(result));
2862
2863 return "ng";
2864}
2865
2866static HChar *
2867s390_irgen_NI(UChar i2, IRTemp op1addr)
2868{
2869 IRTemp op1 = newTemp(Ity_I8);
2870 UChar op2;
2871 IRTemp result = newTemp(Ity_I8);
2872
2873 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2874 op2 = i2;
2875 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2876 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2877 store(mkexpr(op1addr), mkexpr(result));
2878
2879 return "ni";
2880}
2881
2882static HChar *
2883s390_irgen_NIY(UChar i2, IRTemp op1addr)
2884{
2885 IRTemp op1 = newTemp(Ity_I8);
2886 UChar op2;
2887 IRTemp result = newTemp(Ity_I8);
2888
2889 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2890 op2 = i2;
2891 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2892 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2893 store(mkexpr(op1addr), mkexpr(result));
2894
2895 return "niy";
2896}
2897
2898static HChar *
2899s390_irgen_NIHF(UChar r1, UInt i2)
2900{
2901 IRTemp op1 = newTemp(Ity_I32);
2902 UInt op2;
2903 IRTemp result = newTemp(Ity_I32);
2904
2905 assign(op1, get_gpr_w0(r1));
2906 op2 = i2;
2907 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2908 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2909 put_gpr_w0(r1, mkexpr(result));
2910
2911 return "nihf";
2912}
2913
2914static HChar *
2915s390_irgen_NIHH(UChar r1, UShort i2)
2916{
2917 IRTemp op1 = newTemp(Ity_I16);
2918 UShort op2;
2919 IRTemp result = newTemp(Ity_I16);
2920
2921 assign(op1, get_gpr_hw0(r1));
2922 op2 = i2;
2923 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2924 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2925 put_gpr_hw0(r1, mkexpr(result));
2926
2927 return "nihh";
2928}
2929
2930static HChar *
2931s390_irgen_NIHL(UChar r1, UShort i2)
2932{
2933 IRTemp op1 = newTemp(Ity_I16);
2934 UShort op2;
2935 IRTemp result = newTemp(Ity_I16);
2936
2937 assign(op1, get_gpr_hw1(r1));
2938 op2 = i2;
2939 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2940 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2941 put_gpr_hw1(r1, mkexpr(result));
2942
2943 return "nihl";
2944}
2945
2946static HChar *
2947s390_irgen_NILF(UChar r1, UInt i2)
2948{
2949 IRTemp op1 = newTemp(Ity_I32);
2950 UInt op2;
2951 IRTemp result = newTemp(Ity_I32);
2952
2953 assign(op1, get_gpr_w1(r1));
2954 op2 = i2;
2955 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2956 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2957 put_gpr_w1(r1, mkexpr(result));
2958
2959 return "nilf";
2960}
2961
2962static HChar *
2963s390_irgen_NILH(UChar r1, UShort i2)
2964{
2965 IRTemp op1 = newTemp(Ity_I16);
2966 UShort op2;
2967 IRTemp result = newTemp(Ity_I16);
2968
2969 assign(op1, get_gpr_hw2(r1));
2970 op2 = i2;
2971 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2972 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2973 put_gpr_hw2(r1, mkexpr(result));
2974
2975 return "nilh";
2976}
2977
2978static HChar *
2979s390_irgen_NILL(UChar r1, UShort i2)
2980{
2981 IRTemp op1 = newTemp(Ity_I16);
2982 UShort op2;
2983 IRTemp result = newTemp(Ity_I16);
2984
2985 assign(op1, get_gpr_hw3(r1));
2986 op2 = i2;
2987 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2988 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2989 put_gpr_hw3(r1, mkexpr(result));
2990
2991 return "nill";
2992}
2993
2994static HChar *
2995s390_irgen_BASR(UChar r1, UChar r2)
2996{
2997 IRTemp target = newTemp(Ity_I64);
2998
2999 if (r2 == 0) {
3000 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3001 } else {
3002 if (r1 != r2) {
3003 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3004 call_function(get_gpr_dw0(r2));
3005 } else {
3006 assign(target, get_gpr_dw0(r2));
3007 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3008 call_function(mkexpr(target));
3009 }
3010 }
3011
3012 return "basr";
3013}
3014
3015static HChar *
3016s390_irgen_BAS(UChar r1, IRTemp op2addr)
3017{
3018 IRTemp target = newTemp(Ity_I64);
3019
3020 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3021 assign(target, mkexpr(op2addr));
3022 call_function(mkexpr(target));
3023
3024 return "bas";
3025}
3026
3027static HChar *
3028s390_irgen_BCR(UChar r1, UChar r2)
3029{
3030 IRTemp cond = newTemp(Ity_I32);
3031
3032 if ((r2 == 0) || (r1 == 0)) {
3033 } else {
3034 if (r1 == 15) {
3035 return_from_function(get_gpr_dw0(r2));
3036 } else {
3037 assign(cond, s390_call_calculate_cond(r1));
3038 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3039 mkU32(0)), get_gpr_dw0(r2));
3040 }
3041 }
3042 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3043 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3044
3045 return "bcr";
3046}
3047
3048static HChar *
3049s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3050{
3051 IRTemp cond = newTemp(Ity_I32);
3052
3053 if (r1 == 0) {
3054 } else {
3055 if (r1 == 15) {
3056 always_goto(mkexpr(op2addr));
3057 } else {
3058 assign(cond, s390_call_calculate_cond(r1));
3059 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3060 mkU32(0)), mkexpr(op2addr));
3061 }
3062 }
3063 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3064 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3065
3066 return "bc";
3067}
3068
3069static HChar *
3070s390_irgen_BCTR(UChar r1, UChar r2)
3071{
3072 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3073 if (r2 != 0) {
3074 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3075 ), get_gpr_dw0(r2));
3076 }
3077
3078 return "bctr";
3079}
3080
3081static HChar *
3082s390_irgen_BCTGR(UChar r1, UChar r2)
3083{
3084 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3085 if (r2 != 0) {
3086 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3087 mkU64(0)), get_gpr_dw0(r2));
3088 }
3089
3090 return "bctgr";
3091}
3092
3093static HChar *
3094s390_irgen_BCT(UChar r1, IRTemp op2addr)
3095{
3096 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3097 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3098 mkexpr(op2addr));
3099
3100 return "bct";
3101}
3102
3103static HChar *
3104s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3105{
3106 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3107 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3108 mkexpr(op2addr));
3109
3110 return "bctg";
3111}
3112
3113static HChar *
3114s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3115{
3116 IRTemp value = newTemp(Ity_I32);
3117
3118 assign(value, get_gpr_w1(r3 | 1));
3119 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3120 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3121 mkexpr(value)), mkexpr(op2addr));
3122
3123 return "bxh";
3124}
3125
3126static HChar *
3127s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3128{
3129 IRTemp value = newTemp(Ity_I64);
3130
3131 assign(value, get_gpr_dw0(r3 | 1));
3132 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3133 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3134 mkexpr(value)), mkexpr(op2addr));
3135
3136 return "bxhg";
3137}
3138
3139static HChar *
3140s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3141{
3142 IRTemp value = newTemp(Ity_I32);
3143
3144 assign(value, get_gpr_w1(r3 | 1));
3145 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3146 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3147 get_gpr_w1(r1)), mkexpr(op2addr));
3148
3149 return "bxle";
3150}
3151
3152static HChar *
3153s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3154{
3155 IRTemp value = newTemp(Ity_I64);
3156
3157 assign(value, get_gpr_dw0(r3 | 1));
3158 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3159 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3160 get_gpr_dw0(r1)), mkexpr(op2addr));
3161
3162 return "bxleg";
3163}
3164
3165static HChar *
3166s390_irgen_BRAS(UChar r1, UShort i2)
3167{
3168 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3169 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)));
3170
3171 return "bras";
3172}
3173
3174static HChar *
3175s390_irgen_BRASL(UChar r1, UInt i2)
3176{
3177 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
3178 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3179
3180 return "brasl";
3181}
3182
3183static HChar *
3184s390_irgen_BRC(UChar r1, UShort i2)
3185{
3186 IRTemp cond = newTemp(Ity_I32);
3187
3188 if (r1 == 0) {
3189 } else {
3190 if (r1 == 15) {
3191 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1))
3192 );
3193 } else {
3194 assign(cond, s390_call_calculate_cond(r1));
3195 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3196 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3197
3198 }
3199 }
3200 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3201 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3202
3203 return "brc";
3204}
3205
3206static HChar *
3207s390_irgen_BRCL(UChar r1, UInt i2)
3208{
3209 IRTemp cond = newTemp(Ity_I32);
3210
3211 if (r1 == 0) {
3212 } else {
3213 if (r1 == 15) {
3214 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3215 } else {
3216 assign(cond, s390_call_calculate_cond(r1));
3217 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3218 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3219 }
3220 }
3221 if (unlikely(vex_traceflags & VEX_TRACE_FE))
3222 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3223
3224 return "brcl";
3225}
3226
3227static HChar *
3228s390_irgen_BRCT(UChar r1, UShort i2)
3229{
3230 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3231 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3232 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3233
3234 return "brct";
3235}
3236
3237static HChar *
3238s390_irgen_BRCTG(UChar r1, UShort i2)
3239{
3240 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3241 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3242 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3243
3244 return "brctg";
3245}
3246
3247static HChar *
3248s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3249{
3250 IRTemp value = newTemp(Ity_I32);
3251
3252 assign(value, get_gpr_w1(r3 | 1));
3253 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3254 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3255 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3256
3257 return "brxh";
3258}
3259
3260static HChar *
3261s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3262{
3263 IRTemp value = newTemp(Ity_I64);
3264
3265 assign(value, get_gpr_dw0(r3 | 1));
3266 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3267 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3268 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3269
3270 return "brxhg";
3271}
3272
3273static HChar *
3274s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3275{
3276 IRTemp value = newTemp(Ity_I32);
3277
3278 assign(value, get_gpr_w1(r3 | 1));
3279 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3280 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3281 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3282
3283 return "brxle";
3284}
3285
3286static HChar *
3287s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3288{
3289 IRTemp value = newTemp(Ity_I64);
3290
3291 assign(value, get_gpr_dw0(r3 | 1));
3292 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3293 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3294 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3295
3296 return "brxlg";
3297}
3298
3299static HChar *
3300s390_irgen_CR(UChar r1, UChar r2)
3301{
3302 IRTemp op1 = newTemp(Ity_I32);
3303 IRTemp op2 = newTemp(Ity_I32);
3304
3305 assign(op1, get_gpr_w1(r1));
3306 assign(op2, get_gpr_w1(r2));
3307 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3308
3309 return "cr";
3310}
3311
3312static HChar *
3313s390_irgen_CGR(UChar r1, UChar r2)
3314{
3315 IRTemp op1 = newTemp(Ity_I64);
3316 IRTemp op2 = newTemp(Ity_I64);
3317
3318 assign(op1, get_gpr_dw0(r1));
3319 assign(op2, get_gpr_dw0(r2));
3320 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3321
3322 return "cgr";
3323}
3324
3325static HChar *
3326s390_irgen_CGFR(UChar r1, UChar r2)
3327{
3328 IRTemp op1 = newTemp(Ity_I64);
3329 IRTemp op2 = newTemp(Ity_I64);
3330
3331 assign(op1, get_gpr_dw0(r1));
3332 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3333 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3334
3335 return "cgfr";
3336}
3337
3338static HChar *
3339s390_irgen_C(UChar r1, IRTemp op2addr)
3340{
3341 IRTemp op1 = newTemp(Ity_I32);
3342 IRTemp op2 = newTemp(Ity_I32);
3343
3344 assign(op1, get_gpr_w1(r1));
3345 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3346 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3347
3348 return "c";
3349}
3350
3351static HChar *
3352s390_irgen_CY(UChar r1, IRTemp op2addr)
3353{
3354 IRTemp op1 = newTemp(Ity_I32);
3355 IRTemp op2 = newTemp(Ity_I32);
3356
3357 assign(op1, get_gpr_w1(r1));
3358 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3359 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3360
3361 return "cy";
3362}
3363
3364static HChar *
3365s390_irgen_CG(UChar r1, IRTemp op2addr)
3366{
3367 IRTemp op1 = newTemp(Ity_I64);
3368 IRTemp op2 = newTemp(Ity_I64);
3369
3370 assign(op1, get_gpr_dw0(r1));
3371 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3372 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3373
3374 return "cg";
3375}
3376
3377static HChar *
3378s390_irgen_CGF(UChar r1, IRTemp op2addr)
3379{
3380 IRTemp op1 = newTemp(Ity_I64);
3381 IRTemp op2 = newTemp(Ity_I64);
3382
3383 assign(op1, get_gpr_dw0(r1));
3384 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3385 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3386
3387 return "cgf";
3388}
3389
3390static HChar *
3391s390_irgen_CFI(UChar r1, UInt i2)
3392{
3393 IRTemp op1 = newTemp(Ity_I32);
3394 Int op2;
3395
3396 assign(op1, get_gpr_w1(r1));
3397 op2 = (Int)i2;
3398 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3399 mkU32((UInt)op2)));
3400
3401 return "cfi";
3402}
3403
3404static HChar *
3405s390_irgen_CGFI(UChar r1, UInt i2)
3406{
3407 IRTemp op1 = newTemp(Ity_I64);
3408 Long op2;
3409
3410 assign(op1, get_gpr_dw0(r1));
3411 op2 = (Long)(Int)i2;
3412 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3413 mkU64((ULong)op2)));
3414
3415 return "cgfi";
3416}
3417
3418static HChar *
3419s390_irgen_CRL(UChar r1, UInt i2)
3420{
3421 IRTemp op1 = newTemp(Ity_I32);
3422 IRTemp op2 = newTemp(Ity_I32);
3423
3424 assign(op1, get_gpr_w1(r1));
3425 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3426 i2 << 1))));
3427 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3428
3429 return "crl";
3430}
3431
3432static HChar *
3433s390_irgen_CGRL(UChar r1, UInt i2)
3434{
3435 IRTemp op1 = newTemp(Ity_I64);
3436 IRTemp op2 = newTemp(Ity_I64);
3437
3438 assign(op1, get_gpr_dw0(r1));
3439 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3440 i2 << 1))));
3441 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3442
3443 return "cgrl";
3444}
3445
3446static HChar *
3447s390_irgen_CGFRL(UChar r1, UInt i2)
3448{
3449 IRTemp op1 = newTemp(Ity_I64);
3450 IRTemp op2 = newTemp(Ity_I64);
3451
3452 assign(op1, get_gpr_dw0(r1));
3453 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3454 ((ULong)(Long)(Int)i2 << 1)))));
3455 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3456
3457 return "cgfrl";
3458}
3459
3460static HChar *
3461s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3462{
3463 IRTemp op1 = newTemp(Ity_I32);
3464 IRTemp op2 = newTemp(Ity_I32);
3465 IRTemp icc = newTemp(Ity_I32);
3466 IRTemp cond = newTemp(Ity_I32);
3467
3468 if (m3 == 0) {
3469 } else {
3470 if (m3 == 14) {
3471 always_goto(mkexpr(op4addr));
3472 } else {
3473 assign(op1, get_gpr_w1(r1));
3474 assign(op2, get_gpr_w1(r2));
3475 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3476 op2));
3477 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3478 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3479 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3480 mkU32(0)), mkexpr(op4addr));
3481 }
3482 }
3483
3484 return "crb";
3485}
3486
3487static HChar *
3488s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3489{
3490 IRTemp op1 = newTemp(Ity_I64);
3491 IRTemp op2 = newTemp(Ity_I64);
3492 IRTemp icc = newTemp(Ity_I32);
3493 IRTemp cond = newTemp(Ity_I32);
3494
3495 if (m3 == 0) {
3496 } else {
3497 if (m3 == 14) {
3498 always_goto(mkexpr(op4addr));
3499 } else {
3500 assign(op1, get_gpr_dw0(r1));
3501 assign(op2, get_gpr_dw0(r2));
3502 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3503 op2));
3504 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3505 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3506 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3507 mkU32(0)), mkexpr(op4addr));
3508 }
3509 }
3510
3511 return "cgrb";
3512}
3513
3514static HChar *
3515s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3516{
3517 IRTemp op1 = newTemp(Ity_I32);
3518 IRTemp op2 = newTemp(Ity_I32);
3519 IRTemp icc = newTemp(Ity_I32);
3520 IRTemp cond = newTemp(Ity_I32);
3521
3522 if (m3 == 0) {
3523 } else {
3524 if (m3 == 14) {
3525 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3526 );
3527 } else {
3528 assign(op1, get_gpr_w1(r1));
3529 assign(op2, get_gpr_w1(r2));
3530 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3531 op2));
3532 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3533 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3534 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3535 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3536
3537 }
3538 }
3539
3540 return "crj";
3541}
3542
3543static HChar *
3544s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3545{
3546 IRTemp op1 = newTemp(Ity_I64);
3547 IRTemp op2 = newTemp(Ity_I64);
3548 IRTemp icc = newTemp(Ity_I32);
3549 IRTemp cond = newTemp(Ity_I32);
3550
3551 if (m3 == 0) {
3552 } else {
3553 if (m3 == 14) {
3554 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3555 );
3556 } else {
3557 assign(op1, get_gpr_dw0(r1));
3558 assign(op2, get_gpr_dw0(r2));
3559 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3560 op2));
3561 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3562 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3563 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3564 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3565
3566 }
3567 }
3568
3569 return "cgrj";
3570}
3571
3572static HChar *
3573s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3574{
3575 IRTemp op1 = newTemp(Ity_I32);
3576 Int op2;
3577 IRTemp icc = newTemp(Ity_I32);
3578 IRTemp cond = newTemp(Ity_I32);
3579
3580 if (m3 == 0) {
3581 } else {
3582 if (m3 == 14) {
3583 always_goto(mkexpr(op4addr));
3584 } else {
3585 assign(op1, get_gpr_w1(r1));
3586 op2 = (Int)(Char)i2;
3587 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3588 mktemp(Ity_I32, mkU32((UInt)op2))));
3589 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3590 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3591 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3592 mkU32(0)), mkexpr(op4addr));
3593 }
3594 }
3595
3596 return "cib";
3597}
3598
3599static HChar *
3600s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3601{
3602 IRTemp op1 = newTemp(Ity_I64);
3603 Long op2;
3604 IRTemp icc = newTemp(Ity_I32);
3605 IRTemp cond = newTemp(Ity_I32);
3606
3607 if (m3 == 0) {
3608 } else {
3609 if (m3 == 14) {
3610 always_goto(mkexpr(op4addr));
3611 } else {
3612 assign(op1, get_gpr_dw0(r1));
3613 op2 = (Long)(Char)i2;
3614 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3615 mktemp(Ity_I64, mkU64((ULong)op2))));
3616 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3617 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3618 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3619 mkU32(0)), mkexpr(op4addr));
3620 }
3621 }
3622
3623 return "cgib";
3624}
3625
3626static HChar *
3627s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3628{
3629 IRTemp op1 = newTemp(Ity_I32);
3630 Int op2;
3631 IRTemp icc = newTemp(Ity_I32);
3632 IRTemp cond = newTemp(Ity_I32);
3633
3634 if (m3 == 0) {
3635 } else {
3636 if (m3 == 14) {
3637 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3638 );
3639 } else {
3640 assign(op1, get_gpr_w1(r1));
3641 op2 = (Int)(Char)i2;
3642 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3643 mktemp(Ity_I32, mkU32((UInt)op2))));
3644 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3645 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3646 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3647 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3648
3649 }
3650 }
3651
3652 return "cij";
3653}
3654
3655static HChar *
3656s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3657{
3658 IRTemp op1 = newTemp(Ity_I64);
3659 Long op2;
3660 IRTemp icc = newTemp(Ity_I32);
3661 IRTemp cond = newTemp(Ity_I32);
3662
3663 if (m3 == 0) {
3664 } else {
3665 if (m3 == 14) {
3666 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3667 );
3668 } else {
3669 assign(op1, get_gpr_dw0(r1));
3670 op2 = (Long)(Char)i2;
3671 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3672 mktemp(Ity_I64, mkU64((ULong)op2))));
3673 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3674 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3675 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3676 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3677
3678 }
3679 }
3680
3681 return "cgij";
3682}
3683
3684static HChar *
3685s390_irgen_CH(UChar r1, IRTemp op2addr)
3686{
3687 IRTemp op1 = newTemp(Ity_I32);
3688 IRTemp op2 = newTemp(Ity_I32);
3689
3690 assign(op1, get_gpr_w1(r1));
3691 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3692 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3693
3694 return "ch";
3695}
3696
3697static HChar *
3698s390_irgen_CHY(UChar r1, IRTemp op2addr)
3699{
3700 IRTemp op1 = newTemp(Ity_I32);
3701 IRTemp op2 = newTemp(Ity_I32);
3702
3703 assign(op1, get_gpr_w1(r1));
3704 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3705 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3706
3707 return "chy";
3708}
3709
3710static HChar *
3711s390_irgen_CGH(UChar r1, IRTemp op2addr)
3712{
3713 IRTemp op1 = newTemp(Ity_I64);
3714 IRTemp op2 = newTemp(Ity_I64);
3715
3716 assign(op1, get_gpr_dw0(r1));
3717 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3718 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3719
3720 return "cgh";
3721}
3722
3723static HChar *
3724s390_irgen_CHI(UChar r1, UShort i2)
3725{
3726 IRTemp op1 = newTemp(Ity_I32);
3727 Int op2;
3728
3729 assign(op1, get_gpr_w1(r1));
3730 op2 = (Int)(Short)i2;
3731 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3732 mkU32((UInt)op2)));
3733
3734 return "chi";
3735}
3736
3737static HChar *
3738s390_irgen_CGHI(UChar r1, UShort i2)
3739{
3740 IRTemp op1 = newTemp(Ity_I64);
3741 Long op2;
3742
3743 assign(op1, get_gpr_dw0(r1));
3744 op2 = (Long)(Short)i2;
3745 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3746 mkU64((ULong)op2)));
3747
3748 return "cghi";
3749}
3750
3751static HChar *
3752s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3753{
3754 IRTemp op1 = newTemp(Ity_I16);
3755 Short op2;
3756
3757 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3758 op2 = (Short)i2;
3759 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3760 mkU16((UShort)op2)));
3761
3762 return "chhsi";
3763}
3764
3765static HChar *
3766s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3767{
3768 IRTemp op1 = newTemp(Ity_I32);
3769 Int op2;
3770
3771 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3772 op2 = (Int)(Short)i2;
3773 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3774 mkU32((UInt)op2)));
3775
3776 return "chsi";
3777}
3778
3779static HChar *
3780s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3781{
3782 IRTemp op1 = newTemp(Ity_I64);
3783 Long op2;
3784
3785 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3786 op2 = (Long)(Short)i2;
3787 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3788 mkU64((ULong)op2)));
3789
3790 return "cghsi";
3791}
3792
3793static HChar *
3794s390_irgen_CHRL(UChar r1, UInt i2)
3795{
3796 IRTemp op1 = newTemp(Ity_I32);
3797 IRTemp op2 = newTemp(Ity_I32);
3798
3799 assign(op1, get_gpr_w1(r1));
3800 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3801 ((ULong)(Long)(Int)i2 << 1)))));
3802 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3803
3804 return "chrl";
3805}
3806
3807static HChar *
3808s390_irgen_CGHRL(UChar r1, UInt i2)
3809{
3810 IRTemp op1 = newTemp(Ity_I64);
3811 IRTemp op2 = newTemp(Ity_I64);
3812
3813 assign(op1, get_gpr_dw0(r1));
3814 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3815 ((ULong)(Long)(Int)i2 << 1)))));
3816 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3817
3818 return "cghrl";
3819}
3820
3821static HChar *
3822s390_irgen_CHHR(UChar r1, UChar r2)
3823{
3824 IRTemp op1 = newTemp(Ity_I32);
3825 IRTemp op2 = newTemp(Ity_I32);
3826
3827 assign(op1, get_gpr_w0(r1));
3828 assign(op2, get_gpr_w0(r2));
3829 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3830
3831 return "chhr";
3832}
3833
3834static HChar *
3835s390_irgen_CHLR(UChar r1, UChar r2)
3836{
3837 IRTemp op1 = newTemp(Ity_I32);
3838 IRTemp op2 = newTemp(Ity_I32);
3839
3840 assign(op1, get_gpr_w0(r1));
3841 assign(op2, get_gpr_w1(r2));
3842 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3843
3844 return "chlr";
3845}
3846
3847static HChar *
3848s390_irgen_CHF(UChar r1, IRTemp op2addr)
3849{
3850 IRTemp op1 = newTemp(Ity_I32);
3851 IRTemp op2 = newTemp(Ity_I32);
3852
3853 assign(op1, get_gpr_w0(r1));
3854 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3855 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3856
3857 return "chf";
3858}
3859
3860static HChar *
3861s390_irgen_CIH(UChar r1, UInt i2)
3862{
3863 IRTemp op1 = newTemp(Ity_I32);
3864 Int op2;
3865
3866 assign(op1, get_gpr_w0(r1));
3867 op2 = (Int)i2;
3868 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3869 mkU32((UInt)op2)));
3870
3871 return "cih";
3872}
3873
3874static HChar *
3875s390_irgen_CLR(UChar r1, UChar r2)
3876{
3877 IRTemp op1 = newTemp(Ity_I32);
3878 IRTemp op2 = newTemp(Ity_I32);
3879
3880 assign(op1, get_gpr_w1(r1));
3881 assign(op2, get_gpr_w1(r2));
3882 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3883
3884 return "clr";
3885}
3886
3887static HChar *
3888s390_irgen_CLGR(UChar r1, UChar r2)
3889{
3890 IRTemp op1 = newTemp(Ity_I64);
3891 IRTemp op2 = newTemp(Ity_I64);
3892
3893 assign(op1, get_gpr_dw0(r1));
3894 assign(op2, get_gpr_dw0(r2));
3895 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3896
3897 return "clgr";
3898}
3899
3900static HChar *
3901s390_irgen_CLGFR(UChar r1, UChar r2)
3902{
3903 IRTemp op1 = newTemp(Ity_I64);
3904 IRTemp op2 = newTemp(Ity_I64);
3905
3906 assign(op1, get_gpr_dw0(r1));
3907 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3908 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3909
3910 return "clgfr";
3911}
3912
3913static HChar *
3914s390_irgen_CL(UChar r1, IRTemp op2addr)
3915{
3916 IRTemp op1 = newTemp(Ity_I32);
3917 IRTemp op2 = newTemp(Ity_I32);
3918
3919 assign(op1, get_gpr_w1(r1));
3920 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3921 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3922
3923 return "cl";
3924}
3925
3926static HChar *
3927s390_irgen_CLY(UChar r1, IRTemp op2addr)
3928{
3929 IRTemp op1 = newTemp(Ity_I32);
3930 IRTemp op2 = newTemp(Ity_I32);
3931
3932 assign(op1, get_gpr_w1(r1));
3933 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3934 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3935
3936 return "cly";
3937}
3938
3939static HChar *
3940s390_irgen_CLG(UChar r1, IRTemp op2addr)
3941{
3942 IRTemp op1 = newTemp(Ity_I64);
3943 IRTemp op2 = newTemp(Ity_I64);
3944
3945 assign(op1, get_gpr_dw0(r1));
3946 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3947 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3948
3949 return "clg";
3950}
3951
3952static HChar *
3953s390_irgen_CLGF(UChar r1, IRTemp op2addr)
3954{
3955 IRTemp op1 = newTemp(Ity_I64);
3956 IRTemp op2 = newTemp(Ity_I64);
3957
3958 assign(op1, get_gpr_dw0(r1));
3959 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
3960 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3961
3962 return "clgf";
3963}
3964
3965static HChar *
3966s390_irgen_CLFI(UChar r1, UInt i2)
3967{
3968 IRTemp op1 = newTemp(Ity_I32);
3969 UInt op2;
3970
3971 assign(op1, get_gpr_w1(r1));
3972 op2 = i2;
3973 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
3974 mkU32(op2)));
3975
3976 return "clfi";
3977}
3978
3979static HChar *
3980s390_irgen_CLGFI(UChar r1, UInt i2)
3981{
3982 IRTemp op1 = newTemp(Ity_I64);
3983 ULong op2;
3984
3985 assign(op1, get_gpr_dw0(r1));
3986 op2 = (ULong)i2;
3987 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
3988 mkU64(op2)));
3989
3990 return "clgfi";
3991}
3992
3993static HChar *
3994s390_irgen_CLI(UChar i2, IRTemp op1addr)
3995{
3996 IRTemp op1 = newTemp(Ity_I8);
3997 UChar op2;
3998
3999 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4000 op2 = i2;
4001 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4002 mkU8(op2)));
4003
4004 return "cli";
4005}
4006
4007static HChar *
4008s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4009{
4010 IRTemp op1 = newTemp(Ity_I8);
4011 UChar op2;
4012
4013 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4014 op2 = i2;
4015 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4016 mkU8(op2)));
4017
4018 return "cliy";
4019}
4020
4021static HChar *
4022s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4023{
4024 IRTemp op1 = newTemp(Ity_I32);
4025 UInt op2;
4026
4027 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4028 op2 = (UInt)i2;
4029 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4030 mkU32(op2)));
4031
4032 return "clfhsi";
4033}
4034
4035static HChar *
4036s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4037{
4038 IRTemp op1 = newTemp(Ity_I64);
4039 ULong op2;
4040
4041 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4042 op2 = (ULong)i2;
4043 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4044 mkU64(op2)));
4045
4046 return "clghsi";
4047}
4048
4049static HChar *
4050s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4051{
4052 IRTemp op1 = newTemp(Ity_I16);
4053 UShort op2;
4054
4055 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4056 op2 = i2;
4057 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4058 mkU16(op2)));
4059
4060 return "clhhsi";
4061}
4062
4063static HChar *
4064s390_irgen_CLRL(UChar r1, UInt i2)
4065{
4066 IRTemp op1 = newTemp(Ity_I32);
4067 IRTemp op2 = newTemp(Ity_I32);
4068
4069 assign(op1, get_gpr_w1(r1));
4070 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4071 i2 << 1))));
4072 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4073
4074 return "clrl";
4075}
4076
4077static HChar *
4078s390_irgen_CLGRL(UChar r1, UInt i2)
4079{
4080 IRTemp op1 = newTemp(Ity_I64);
4081 IRTemp op2 = newTemp(Ity_I64);
4082
4083 assign(op1, get_gpr_dw0(r1));
4084 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4085 i2 << 1))));
4086 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4087
4088 return "clgrl";
4089}
4090
4091static HChar *
4092s390_irgen_CLGFRL(UChar r1, UInt i2)
4093{
4094 IRTemp op1 = newTemp(Ity_I64);
4095 IRTemp op2 = newTemp(Ity_I64);
4096
4097 assign(op1, get_gpr_dw0(r1));
4098 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4099 ((ULong)(Long)(Int)i2 << 1)))));
4100 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4101
4102 return "clgfrl";
4103}
4104
4105static HChar *
4106s390_irgen_CLHRL(UChar r1, UInt i2)
4107{
4108 IRTemp op1 = newTemp(Ity_I32);
4109 IRTemp op2 = newTemp(Ity_I32);
4110
4111 assign(op1, get_gpr_w1(r1));
4112 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4113 ((ULong)(Long)(Int)i2 << 1)))));
4114 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4115
4116 return "clhrl";
4117}
4118
4119static HChar *
4120s390_irgen_CLGHRL(UChar r1, UInt i2)
4121{
4122 IRTemp op1 = newTemp(Ity_I64);
4123 IRTemp op2 = newTemp(Ity_I64);
4124
4125 assign(op1, get_gpr_dw0(r1));
4126 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4127 ((ULong)(Long)(Int)i2 << 1)))));
4128 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4129
4130 return "clghrl";
4131}
4132
4133static HChar *
4134s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4135{
4136 IRTemp op1 = newTemp(Ity_I32);
4137 IRTemp op2 = newTemp(Ity_I32);
4138 IRTemp icc = newTemp(Ity_I32);
4139 IRTemp cond = newTemp(Ity_I32);
4140
4141 if (m3 == 0) {
4142 } else {
4143 if (m3 == 14) {
4144 always_goto(mkexpr(op4addr));
4145 } else {
4146 assign(op1, get_gpr_w1(r1));
4147 assign(op2, get_gpr_w1(r2));
4148 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4149 op2));
4150 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4151 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4152 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4153 mkU32(0)), mkexpr(op4addr));
4154 }
4155 }
4156
4157 return "clrb";
4158}
4159
4160static HChar *
4161s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4162{
4163 IRTemp op1 = newTemp(Ity_I64);
4164 IRTemp op2 = newTemp(Ity_I64);
4165 IRTemp icc = newTemp(Ity_I32);
4166 IRTemp cond = newTemp(Ity_I32);
4167
4168 if (m3 == 0) {
4169 } else {
4170 if (m3 == 14) {
4171 always_goto(mkexpr(op4addr));
4172 } else {
4173 assign(op1, get_gpr_dw0(r1));
4174 assign(op2, get_gpr_dw0(r2));
4175 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4176 op2));
4177 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4178 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4179 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4180 mkU32(0)), mkexpr(op4addr));
4181 }
4182 }
4183
4184 return "clgrb";
4185}
4186
4187static HChar *
4188s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4189{
4190 IRTemp op1 = newTemp(Ity_I32);
4191 IRTemp op2 = newTemp(Ity_I32);
4192 IRTemp icc = newTemp(Ity_I32);
4193 IRTemp cond = newTemp(Ity_I32);
4194
4195 if (m3 == 0) {
4196 } else {
4197 if (m3 == 14) {
4198 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4199 );
4200 } else {
4201 assign(op1, get_gpr_w1(r1));
4202 assign(op2, get_gpr_w1(r2));
4203 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4204 op2));
4205 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4206 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4207 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4208 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4209
4210 }
4211 }
4212
4213 return "clrj";
4214}
4215
4216static HChar *
4217s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4218{
4219 IRTemp op1 = newTemp(Ity_I64);
4220 IRTemp op2 = newTemp(Ity_I64);
4221 IRTemp icc = newTemp(Ity_I32);
4222 IRTemp cond = newTemp(Ity_I32);
4223
4224 if (m3 == 0) {
4225 } else {
4226 if (m3 == 14) {
4227 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4228 );
4229 } else {
4230 assign(op1, get_gpr_dw0(r1));
4231 assign(op2, get_gpr_dw0(r2));
4232 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4233 op2));
4234 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4235 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4236 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4237 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4238
4239 }
4240 }
4241
4242 return "clgrj";
4243}
4244
4245static HChar *
4246s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4247{
4248 IRTemp op1 = newTemp(Ity_I32);
4249 UInt op2;
4250 IRTemp icc = newTemp(Ity_I32);
4251 IRTemp cond = newTemp(Ity_I32);
4252
4253 if (m3 == 0) {
4254 } else {
4255 if (m3 == 14) {
4256 always_goto(mkexpr(op4addr));
4257 } else {
4258 assign(op1, get_gpr_w1(r1));
4259 op2 = (UInt)i2;
4260 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4261 mktemp(Ity_I32, mkU32(op2))));
4262 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4263 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4264 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4265 mkU32(0)), mkexpr(op4addr));
4266 }
4267 }
4268
4269 return "clib";
4270}
4271
4272static HChar *
4273s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4274{
4275 IRTemp op1 = newTemp(Ity_I64);
4276 ULong op2;
4277 IRTemp icc = newTemp(Ity_I32);
4278 IRTemp cond = newTemp(Ity_I32);
4279
4280 if (m3 == 0) {
4281 } else {
4282 if (m3 == 14) {
4283 always_goto(mkexpr(op4addr));
4284 } else {
4285 assign(op1, get_gpr_dw0(r1));
4286 op2 = (ULong)i2;
4287 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4288 mktemp(Ity_I64, mkU64(op2))));
4289 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4290 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4291 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4292 mkU32(0)), mkexpr(op4addr));
4293 }
4294 }
4295
4296 return "clgib";
4297}
4298
4299static HChar *
4300s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4301{
4302 IRTemp op1 = newTemp(Ity_I32);
4303 UInt op2;
4304 IRTemp icc = newTemp(Ity_I32);
4305 IRTemp cond = newTemp(Ity_I32);
4306
4307 if (m3 == 0) {
4308 } else {
4309 if (m3 == 14) {
4310 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4311 );
4312 } else {
4313 assign(op1, get_gpr_w1(r1));
4314 op2 = (UInt)i2;
4315 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4316 mktemp(Ity_I32, mkU32(op2))));
4317 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4318 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4319 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4320 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4321
4322 }
4323 }
4324
4325 return "clij";
4326}
4327
4328static HChar *
4329s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4330{
4331 IRTemp op1 = newTemp(Ity_I64);
4332 ULong op2;
4333 IRTemp icc = newTemp(Ity_I32);
4334 IRTemp cond = newTemp(Ity_I32);
4335
4336 if (m3 == 0) {
4337 } else {
4338 if (m3 == 14) {
4339 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4340 );
4341 } else {
4342 assign(op1, get_gpr_dw0(r1));
4343 op2 = (ULong)i2;
4344 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4345 mktemp(Ity_I64, mkU64(op2))));
4346 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4347 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4348 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4349 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4350
4351 }
4352 }
4353
4354 return "clgij";
4355}
4356
4357static HChar *
4358s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4359{
4360 IRTemp op1 = newTemp(Ity_I32);
4361 IRTemp op2 = newTemp(Ity_I32);
4362 IRTemp b0 = newTemp(Ity_I32);
4363 IRTemp b1 = newTemp(Ity_I32);
4364 IRTemp b2 = newTemp(Ity_I32);
4365 IRTemp b3 = newTemp(Ity_I32);
4366 IRTemp c0 = newTemp(Ity_I32);
4367 IRTemp c1 = newTemp(Ity_I32);
4368 IRTemp c2 = newTemp(Ity_I32);
4369 IRTemp c3 = newTemp(Ity_I32);
4370 UChar n;
4371
4372 n = 0;
4373 if ((r3 & 8) != 0) {
4374 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4375 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4376 n = n + 1;
4377 } else {
4378 assign(b0, mkU32(0));
4379 assign(c0, mkU32(0));
4380 }
4381 if ((r3 & 4) != 0) {
4382 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4383 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4384 mkU64(n)))));
4385 n = n + 1;
4386 } else {
4387 assign(b1, mkU32(0));
4388 assign(c1, mkU32(0));
4389 }
4390 if ((r3 & 2) != 0) {
4391 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4392 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4393 mkU64(n)))));
4394 n = n + 1;
4395 } else {
4396 assign(b2, mkU32(0));
4397 assign(c2, mkU32(0));
4398 }
4399 if ((r3 & 1) != 0) {
4400 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4401 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4402 mkU64(n)))));
4403 n = n + 1;
4404 } else {
4405 assign(b3, mkU32(0));
4406 assign(c3, mkU32(0));
4407 }
4408 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4409 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4410 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4411 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4412 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4413 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4414 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4415
4416 return "clm";
4417}
4418
4419static HChar *
4420s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4421{
4422 IRTemp op1 = newTemp(Ity_I32);
4423 IRTemp op2 = newTemp(Ity_I32);
4424 IRTemp b0 = newTemp(Ity_I32);
4425 IRTemp b1 = newTemp(Ity_I32);
4426 IRTemp b2 = newTemp(Ity_I32);
4427 IRTemp b3 = newTemp(Ity_I32);
4428 IRTemp c0 = newTemp(Ity_I32);
4429 IRTemp c1 = newTemp(Ity_I32);
4430 IRTemp c2 = newTemp(Ity_I32);
4431 IRTemp c3 = newTemp(Ity_I32);
4432 UChar n;
4433
4434 n = 0;
4435 if ((r3 & 8) != 0) {
4436 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4437 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4438 n = n + 1;
4439 } else {
4440 assign(b0, mkU32(0));
4441 assign(c0, mkU32(0));
4442 }
4443 if ((r3 & 4) != 0) {
4444 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4445 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4446 mkU64(n)))));
4447 n = n + 1;
4448 } else {
4449 assign(b1, mkU32(0));
4450 assign(c1, mkU32(0));
4451 }
4452 if ((r3 & 2) != 0) {
4453 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4454 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4455 mkU64(n)))));
4456 n = n + 1;
4457 } else {
4458 assign(b2, mkU32(0));
4459 assign(c2, mkU32(0));
4460 }
4461 if ((r3 & 1) != 0) {
4462 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4463 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4464 mkU64(n)))));
4465 n = n + 1;
4466 } else {
4467 assign(b3, mkU32(0));
4468 assign(c3, mkU32(0));
4469 }
4470 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4471 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4472 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4473 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4474 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4475 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4476 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4477
4478 return "clmy";
4479}
4480
4481static HChar *
4482s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4483{
4484 IRTemp op1 = newTemp(Ity_I32);
4485 IRTemp op2 = newTemp(Ity_I32);
4486 IRTemp b0 = newTemp(Ity_I32);
4487 IRTemp b1 = newTemp(Ity_I32);
4488 IRTemp b2 = newTemp(Ity_I32);
4489 IRTemp b3 = newTemp(Ity_I32);
4490 IRTemp c0 = newTemp(Ity_I32);
4491 IRTemp c1 = newTemp(Ity_I32);
4492 IRTemp c2 = newTemp(Ity_I32);
4493 IRTemp c3 = newTemp(Ity_I32);
4494 UChar n;
4495
4496 n = 0;
4497 if ((r3 & 8) != 0) {
4498 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4499 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4500 n = n + 1;
4501 } else {
4502 assign(b0, mkU32(0));
4503 assign(c0, mkU32(0));
4504 }
4505 if ((r3 & 4) != 0) {
4506 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4507 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4508 mkU64(n)))));
4509 n = n + 1;
4510 } else {
4511 assign(b1, mkU32(0));
4512 assign(c1, mkU32(0));
4513 }
4514 if ((r3 & 2) != 0) {
4515 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4516 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4517 mkU64(n)))));
4518 n = n + 1;
4519 } else {
4520 assign(b2, mkU32(0));
4521 assign(c2, mkU32(0));
4522 }
4523 if ((r3 & 1) != 0) {
4524 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4525 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4526 mkU64(n)))));
4527 n = n + 1;
4528 } else {
4529 assign(b3, mkU32(0));
4530 assign(c3, mkU32(0));
4531 }
4532 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4533 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4534 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4535 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4536 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4537 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4538 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4539
4540 return "clmh";
4541}
4542
4543static HChar *
4544s390_irgen_CLHHR(UChar r1, UChar r2)
4545{
4546 IRTemp op1 = newTemp(Ity_I32);
4547 IRTemp op2 = newTemp(Ity_I32);
4548
4549 assign(op1, get_gpr_w0(r1));
4550 assign(op2, get_gpr_w0(r2));
4551 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4552
4553 return "clhhr";
4554}
4555
4556static HChar *
4557s390_irgen_CLHLR(UChar r1, UChar r2)
4558{
4559 IRTemp op1 = newTemp(Ity_I32);
4560 IRTemp op2 = newTemp(Ity_I32);
4561
4562 assign(op1, get_gpr_w0(r1));
4563 assign(op2, get_gpr_w1(r2));
4564 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4565
4566 return "clhlr";
4567}
4568
4569static HChar *
4570s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4571{
4572 IRTemp op1 = newTemp(Ity_I32);
4573 IRTemp op2 = newTemp(Ity_I32);
4574
4575 assign(op1, get_gpr_w0(r1));
4576 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4577 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4578
4579 return "clhf";
4580}
4581
4582static HChar *
4583s390_irgen_CLIH(UChar r1, UInt i2)
4584{
4585 IRTemp op1 = newTemp(Ity_I32);
4586 UInt op2;
4587
4588 assign(op1, get_gpr_w0(r1));
4589 op2 = i2;
4590 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4591 mkU32(op2)));
4592
4593 return "clih";
4594}
4595
4596static HChar *
4597s390_irgen_CPYA(UChar r1, UChar r2)
4598{
4599 put_ar_w0(r1, get_ar_w0(r2));
4600 if (unlikely(vex_traceflags & VEX_TRACE_FE))
4601 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4602
4603 return "cpya";
4604}
4605
4606static HChar *
4607s390_irgen_XR(UChar r1, UChar r2)
4608{
4609 IRTemp op1 = newTemp(Ity_I32);
4610 IRTemp op2 = newTemp(Ity_I32);
4611 IRTemp result = newTemp(Ity_I32);
4612
4613 if (r1 == r2) {
4614 assign(result, mkU32(0));
4615 } else {
4616 assign(op1, get_gpr_w1(r1));
4617 assign(op2, get_gpr_w1(r2));
4618 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4619 }
4620 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4621 put_gpr_w1(r1, mkexpr(result));
4622
4623 return "xr";
4624}
4625
4626static HChar *
4627s390_irgen_XGR(UChar r1, UChar r2)
4628{
4629 IRTemp op1 = newTemp(Ity_I64);
4630 IRTemp op2 = newTemp(Ity_I64);
4631 IRTemp result = newTemp(Ity_I64);
4632
4633 if (r1 == r2) {
4634 assign(result, mkU64(0));
4635 } else {
4636 assign(op1, get_gpr_dw0(r1));
4637 assign(op2, get_gpr_dw0(r2));
4638 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4639 }
4640 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4641 put_gpr_dw0(r1, mkexpr(result));
4642
4643 return "xgr";
4644}
4645
4646static HChar *
4647s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4648{
4649 IRTemp op2 = newTemp(Ity_I32);
4650 IRTemp op3 = newTemp(Ity_I32);
4651 IRTemp result = newTemp(Ity_I32);
4652
4653 assign(op2, get_gpr_w1(r2));
4654 assign(op3, get_gpr_w1(r3));
4655 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4656 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4657 put_gpr_w1(r1, mkexpr(result));
4658
4659 return "xrk";
4660}
4661
4662static HChar *
4663s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4664{
4665 IRTemp op2 = newTemp(Ity_I64);
4666 IRTemp op3 = newTemp(Ity_I64);
4667 IRTemp result = newTemp(Ity_I64);
4668
4669 assign(op2, get_gpr_dw0(r2));
4670 assign(op3, get_gpr_dw0(r3));
4671 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4672 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4673 put_gpr_dw0(r1, mkexpr(result));
4674
4675 return "xgrk";
4676}
4677
4678static HChar *
4679s390_irgen_X(UChar r1, IRTemp op2addr)
4680{
4681 IRTemp op1 = newTemp(Ity_I32);
4682 IRTemp op2 = newTemp(Ity_I32);
4683 IRTemp result = newTemp(Ity_I32);
4684
4685 assign(op1, get_gpr_w1(r1));
4686 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4687 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4688 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4689 put_gpr_w1(r1, mkexpr(result));
4690
4691 return "x";
4692}
4693
4694static HChar *
4695s390_irgen_XY(UChar r1, IRTemp op2addr)
4696{
4697 IRTemp op1 = newTemp(Ity_I32);
4698 IRTemp op2 = newTemp(Ity_I32);
4699 IRTemp result = newTemp(Ity_I32);
4700
4701 assign(op1, get_gpr_w1(r1));
4702 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4703 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4704 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4705 put_gpr_w1(r1, mkexpr(result));
4706
4707 return "xy";
4708}
4709
4710static HChar *
4711s390_irgen_XG(UChar r1, IRTemp op2addr)
4712{
4713 IRTemp op1 = newTemp(Ity_I64);
4714 IRTemp op2 = newTemp(Ity_I64);
4715 IRTemp result = newTemp(Ity_I64);
4716
4717 assign(op1, get_gpr_dw0(r1));
4718 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4719 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4720 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4721 put_gpr_dw0(r1, mkexpr(result));
4722
4723 return "xg";
4724}
4725
4726static HChar *
4727s390_irgen_XI(UChar i2, IRTemp op1addr)
4728{
4729 IRTemp op1 = newTemp(Ity_I8);
4730 UChar op2;
4731 IRTemp result = newTemp(Ity_I8);
4732
4733 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4734 op2 = i2;
4735 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4736 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4737 store(mkexpr(op1addr), mkexpr(result));
4738
4739 return "xi";
4740}
4741
4742static HChar *
4743s390_irgen_XIY(UChar i2, IRTemp op1addr)
4744{
4745 IRTemp op1 = newTemp(Ity_I8);
4746 UChar op2;
4747 IRTemp result = newTemp(Ity_I8);
4748
4749 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4750 op2 = i2;
4751 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4752 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4753 store(mkexpr(op1addr), mkexpr(result));
4754
4755 return "xiy";
4756}
4757
4758static HChar *
4759s390_irgen_XIHF(UChar r1, UInt i2)
4760{
4761 IRTemp op1 = newTemp(Ity_I32);
4762 UInt op2;
4763 IRTemp result = newTemp(Ity_I32);
4764
4765 assign(op1, get_gpr_w0(r1));
4766 op2 = i2;
4767 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4768 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4769 put_gpr_w0(r1, mkexpr(result));
4770
4771 return "xihf";
4772}
4773
4774static HChar *
4775s390_irgen_XILF(UChar r1, UInt i2)
4776{
4777 IRTemp op1 = newTemp(Ity_I32);
4778 UInt op2;
4779 IRTemp result = newTemp(Ity_I32);
4780
4781 assign(op1, get_gpr_w1(r1));
4782 op2 = i2;
4783 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4784 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4785 put_gpr_w1(r1, mkexpr(result));
4786
4787 return "xilf";
4788}
4789
4790static HChar *
4791s390_irgen_EAR(UChar r1, UChar r2)
4792{
4793 put_gpr_w1(r1, get_ar_w0(r2));
4794 if (unlikely(vex_traceflags & VEX_TRACE_FE))
4795 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4796
4797 return "ear";
4798}
4799
4800static HChar *
4801s390_irgen_IC(UChar r1, IRTemp op2addr)
4802{
4803 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4804
4805 return "ic";
4806}
4807
4808static HChar *
4809s390_irgen_ICY(UChar r1, IRTemp op2addr)
4810{
4811 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4812
4813 return "icy";
4814}
4815
4816static HChar *
4817s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4818{
4819 UChar n;
4820 IRTemp result = newTemp(Ity_I32);
4821 UInt mask;
4822
4823 n = 0;
4824 mask = (UInt)r3;
4825 if ((mask & 8) != 0) {
4826 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4827 n = n + 1;
4828 }
4829 if ((mask & 4) != 0) {
4830 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4831
4832 n = n + 1;
4833 }
4834 if ((mask & 2) != 0) {
4835 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4836
4837 n = n + 1;
4838 }
4839 if ((mask & 1) != 0) {
4840 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4841
4842 n = n + 1;
4843 }
4844 assign(result, get_gpr_w1(r1));
4845 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4846 mkU32(mask)));
4847
4848 return "icm";
4849}
4850
4851static HChar *
4852s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4853{
4854 UChar n;
4855 IRTemp result = newTemp(Ity_I32);
4856 UInt mask;
4857
4858 n = 0;
4859 mask = (UInt)r3;
4860 if ((mask & 8) != 0) {
4861 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4862 n = n + 1;
4863 }
4864 if ((mask & 4) != 0) {
4865 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4866
4867 n = n + 1;
4868 }
4869 if ((mask & 2) != 0) {
4870 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4871
4872 n = n + 1;
4873 }
4874 if ((mask & 1) != 0) {
4875 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4876
4877 n = n + 1;
4878 }
4879 assign(result, get_gpr_w1(r1));
4880 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4881 mkU32(mask)));
4882
4883 return "icmy";
4884}
4885
4886static HChar *
4887s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4888{
4889 UChar n;
4890 IRTemp result = newTemp(Ity_I32);
4891 UInt mask;
4892
4893 n = 0;
4894 mask = (UInt)r3;
4895 if ((mask & 8) != 0) {
4896 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4897 n = n + 1;
4898 }
4899 if ((mask & 4) != 0) {
4900 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4901
4902 n = n + 1;
4903 }
4904 if ((mask & 2) != 0) {
4905 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4906
4907 n = n + 1;
4908 }
4909 if ((mask & 1) != 0) {
4910 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4911
4912 n = n + 1;
4913 }
4914 assign(result, get_gpr_w0(r1));
4915 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4916 mkU32(mask)));
4917
4918 return "icmh";
4919}
4920
4921static HChar *
4922s390_irgen_IIHF(UChar r1, UInt i2)
4923{
4924 put_gpr_w0(r1, mkU32(i2));
4925
4926 return "iihf";
4927}
4928
4929static HChar *
4930s390_irgen_IIHH(UChar r1, UShort i2)
4931{
4932 put_gpr_hw0(r1, mkU16(i2));
4933
4934 return "iihh";
4935}
4936
4937static HChar *
4938s390_irgen_IIHL(UChar r1, UShort i2)
4939{
4940 put_gpr_hw1(r1, mkU16(i2));
4941
4942 return "iihl";
4943}
4944
4945static HChar *
4946s390_irgen_IILF(UChar r1, UInt i2)
4947{
4948 put_gpr_w1(r1, mkU32(i2));
4949
4950 return "iilf";
4951}
4952
4953static HChar *
4954s390_irgen_IILH(UChar r1, UShort i2)
4955{
4956 put_gpr_hw2(r1, mkU16(i2));
4957
4958 return "iilh";
4959}
4960
4961static HChar *
4962s390_irgen_IILL(UChar r1, UShort i2)
4963{
4964 put_gpr_hw3(r1, mkU16(i2));
4965
4966 return "iill";
4967}
4968
4969static HChar *
4970s390_irgen_LR(UChar r1, UChar r2)
4971{
4972 put_gpr_w1(r1, get_gpr_w1(r2));
4973
4974 return "lr";
4975}
4976
4977static HChar *
4978s390_irgen_LGR(UChar r1, UChar r2)
4979{
4980 put_gpr_dw0(r1, get_gpr_dw0(r2));
4981
4982 return "lgr";
4983}
4984
4985static HChar *
4986s390_irgen_LGFR(UChar r1, UChar r2)
4987{
4988 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
4989
4990 return "lgfr";
4991}
4992
4993static HChar *
4994s390_irgen_L(UChar r1, IRTemp op2addr)
4995{
4996 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
4997
4998 return "l";
4999}
5000
5001static HChar *
5002s390_irgen_LY(UChar r1, IRTemp op2addr)
5003{
5004 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5005
5006 return "ly";
5007}
5008
5009static HChar *
5010s390_irgen_LG(UChar r1, IRTemp op2addr)
5011{
5012 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5013
5014 return "lg";
5015}
5016
5017static HChar *
5018s390_irgen_LGF(UChar r1, IRTemp op2addr)
5019{
5020 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5021
5022 return "lgf";
5023}
5024
5025static HChar *
5026s390_irgen_LGFI(UChar r1, UInt i2)
5027{
5028 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5029
5030 return "lgfi";
5031}
5032
5033static HChar *
5034s390_irgen_LRL(UChar r1, UInt i2)
5035{
5036 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5037 i2 << 1))));
5038
5039 return "lrl";
5040}
5041
5042static HChar *
5043s390_irgen_LGRL(UChar r1, UInt i2)
5044{
5045 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5046 i2 << 1))));
5047
5048 return "lgrl";
5049}
5050
5051static HChar *
5052s390_irgen_LGFRL(UChar r1, UInt i2)
5053{
5054 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5055 ((ULong)(Long)(Int)i2 << 1)))));
5056
5057 return "lgfrl";
5058}
5059
5060static HChar *
5061s390_irgen_LA(UChar r1, IRTemp op2addr)
5062{
5063 put_gpr_dw0(r1, mkexpr(op2addr));
5064
5065 return "la";
5066}
5067
5068static HChar *
5069s390_irgen_LAY(UChar r1, IRTemp op2addr)
5070{
5071 put_gpr_dw0(r1, mkexpr(op2addr));
5072
5073 return "lay";
5074}
5075
5076static HChar *
5077s390_irgen_LAE(UChar r1, IRTemp op2addr)
5078{
5079 put_gpr_dw0(r1, mkexpr(op2addr));
5080
5081 return "lae";
5082}
5083
5084static HChar *
5085s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5086{
5087 put_gpr_dw0(r1, mkexpr(op2addr));
5088
5089 return "laey";
5090}
5091
5092static HChar *
5093s390_irgen_LARL(UChar r1, UInt i2)
5094{
5095 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5096
5097 return "larl";
5098}
5099
5100static HChar *
5101s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5102{
5103 IRTemp op2 = newTemp(Ity_I32);
5104 IRTemp op3 = newTemp(Ity_I32);
5105 IRTemp result = newTemp(Ity_I32);
5106
5107 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5108 assign(op3, get_gpr_w1(r3));
5109 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5110 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5111 store(mkexpr(op2addr), mkexpr(result));
5112 put_gpr_w1(r1, mkexpr(op2));
5113
5114 return "laa";
5115}
5116
5117static HChar *
5118s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5119{
5120 IRTemp op2 = newTemp(Ity_I64);
5121 IRTemp op3 = newTemp(Ity_I64);
5122 IRTemp result = newTemp(Ity_I64);
5123
5124 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5125 assign(op3, get_gpr_dw0(r3));
5126 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5127 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5128 store(mkexpr(op2addr), mkexpr(result));
5129 put_gpr_dw0(r1, mkexpr(op2));
5130
5131 return "laag";
5132}
5133
5134static HChar *
5135s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5136{
5137 IRTemp op2 = newTemp(Ity_I32);
5138 IRTemp op3 = newTemp(Ity_I32);
5139 IRTemp result = newTemp(Ity_I32);
5140
5141 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5142 assign(op3, get_gpr_w1(r3));
5143 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5144 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5145 store(mkexpr(op2addr), mkexpr(result));
5146 put_gpr_w1(r1, mkexpr(op2));
5147
5148 return "laal";
5149}
5150
5151static HChar *
5152s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5153{
5154 IRTemp op2 = newTemp(Ity_I64);
5155 IRTemp op3 = newTemp(Ity_I64);
5156 IRTemp result = newTemp(Ity_I64);
5157
5158 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5159 assign(op3, get_gpr_dw0(r3));
5160 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5161 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5162 store(mkexpr(op2addr), mkexpr(result));
5163 put_gpr_dw0(r1, mkexpr(op2));
5164
5165 return "laalg";
5166}
5167
5168static HChar *
5169s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5170{
5171 IRTemp op2 = newTemp(Ity_I32);
5172 IRTemp op3 = newTemp(Ity_I32);
5173 IRTemp result = newTemp(Ity_I32);
5174
5175 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5176 assign(op3, get_gpr_w1(r3));
5177 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5178 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5179 store(mkexpr(op2addr), mkexpr(result));
5180 put_gpr_w1(r1, mkexpr(op2));
5181
5182 return "lan";
5183}
5184
5185static HChar *
5186s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5187{
5188 IRTemp op2 = newTemp(Ity_I64);
5189 IRTemp op3 = newTemp(Ity_I64);
5190 IRTemp result = newTemp(Ity_I64);
5191
5192 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5193 assign(op3, get_gpr_dw0(r3));
5194 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5195 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5196 store(mkexpr(op2addr), mkexpr(result));
5197 put_gpr_dw0(r1, mkexpr(op2));
5198
5199 return "lang";
5200}
5201
5202static HChar *
5203s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5204{
5205 IRTemp op2 = newTemp(Ity_I32);
5206 IRTemp op3 = newTemp(Ity_I32);
5207 IRTemp result = newTemp(Ity_I32);
5208
5209 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5210 assign(op3, get_gpr_w1(r3));
5211 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5212 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5213 store(mkexpr(op2addr), mkexpr(result));
5214 put_gpr_w1(r1, mkexpr(op2));
5215
5216 return "lax";
5217}
5218
5219static HChar *
5220s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5221{
5222 IRTemp op2 = newTemp(Ity_I64);
5223 IRTemp op3 = newTemp(Ity_I64);
5224 IRTemp result = newTemp(Ity_I64);
5225
5226 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5227 assign(op3, get_gpr_dw0(r3));
5228 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5229 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5230 store(mkexpr(op2addr), mkexpr(result));
5231 put_gpr_dw0(r1, mkexpr(op2));
5232
5233 return "laxg";
5234}
5235
5236static HChar *
5237s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5238{
5239 IRTemp op2 = newTemp(Ity_I32);
5240 IRTemp op3 = newTemp(Ity_I32);
5241 IRTemp result = newTemp(Ity_I32);
5242
5243 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5244 assign(op3, get_gpr_w1(r3));
5245 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5246 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5247 store(mkexpr(op2addr), mkexpr(result));
5248 put_gpr_w1(r1, mkexpr(op2));
5249
5250 return "lao";
5251}
5252
5253static HChar *
5254s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5255{
5256 IRTemp op2 = newTemp(Ity_I64);
5257 IRTemp op3 = newTemp(Ity_I64);
5258 IRTemp result = newTemp(Ity_I64);
5259
5260 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5261 assign(op3, get_gpr_dw0(r3));
5262 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5263 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5264 store(mkexpr(op2addr), mkexpr(result));
5265 put_gpr_dw0(r1, mkexpr(op2));
5266
5267 return "laog";
5268}
5269
5270static HChar *
5271s390_irgen_LTR(UChar r1, UChar r2)
5272{
5273 IRTemp op2 = newTemp(Ity_I32);
5274
5275 assign(op2, get_gpr_w1(r2));
5276 put_gpr_w1(r1, mkexpr(op2));
5277 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5278
5279 return "ltr";
5280}
5281
5282static HChar *
5283s390_irgen_LTGR(UChar r1, UChar r2)
5284{
5285 IRTemp op2 = newTemp(Ity_I64);
5286
5287 assign(op2, get_gpr_dw0(r2));
5288 put_gpr_dw0(r1, mkexpr(op2));
5289 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5290
5291 return "ltgr";
5292}
5293
5294static HChar *
5295s390_irgen_LTGFR(UChar r1, UChar r2)
5296{
5297 IRTemp op2 = newTemp(Ity_I64);
5298
5299 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5300 put_gpr_dw0(r1, mkexpr(op2));
5301 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5302
5303 return "ltgfr";
5304}
5305
5306static HChar *
5307s390_irgen_LT(UChar r1, IRTemp op2addr)
5308{
5309 IRTemp op2 = newTemp(Ity_I32);
5310
5311 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5312 put_gpr_w1(r1, mkexpr(op2));
5313 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5314
5315 return "lt";
5316}
5317
5318static HChar *
5319s390_irgen_LTG(UChar r1, IRTemp op2addr)
5320{
5321 IRTemp op2 = newTemp(Ity_I64);
5322
5323 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5324 put_gpr_dw0(r1, mkexpr(op2));
5325 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5326
5327 return "ltg";
5328}
5329
5330static HChar *
5331s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5332{
5333 IRTemp op2 = newTemp(Ity_I64);
5334
5335 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5336 put_gpr_dw0(r1, mkexpr(op2));
5337 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5338
5339 return "ltgf";
5340}
5341
5342static HChar *
5343s390_irgen_LBR(UChar r1, UChar r2)
5344{
5345 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5346
5347 return "lbr";
5348}
5349
5350static HChar *
5351s390_irgen_LGBR(UChar r1, UChar r2)
5352{
5353 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5354
5355 return "lgbr";
5356}
5357
5358static HChar *
5359s390_irgen_LB(UChar r1, IRTemp op2addr)
5360{
5361 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5362
5363 return "lb";
5364}
5365
5366static HChar *
5367s390_irgen_LGB(UChar r1, IRTemp op2addr)
5368{
5369 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5370
5371 return "lgb";
5372}
5373
5374static HChar *
5375s390_irgen_LBH(UChar r1, IRTemp op2addr)
5376{
5377 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5378
5379 return "lbh";
5380}
5381
5382static HChar *
5383s390_irgen_LCR(UChar r1, UChar r2)
5384{
5385 Int op1;
5386 IRTemp op2 = newTemp(Ity_I32);
5387 IRTemp result = newTemp(Ity_I32);
5388
5389 op1 = 0;
5390 assign(op2, get_gpr_w1(r2));
5391 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5392 put_gpr_w1(r1, mkexpr(result));
5393 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5394 op1)), op2);
5395
5396 return "lcr";
5397}
5398
5399static HChar *
5400s390_irgen_LCGR(UChar r1, UChar r2)
5401{
5402 Long op1;
5403 IRTemp op2 = newTemp(Ity_I64);
5404 IRTemp result = newTemp(Ity_I64);
5405
5406 op1 = 0ULL;
5407 assign(op2, get_gpr_dw0(r2));
5408 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5409 put_gpr_dw0(r1, mkexpr(result));
5410 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5411 op1)), op2);
5412
5413 return "lcgr";
5414}
5415
5416static HChar *
5417s390_irgen_LCGFR(UChar r1, UChar r2)
5418{
5419 Long op1;
5420 IRTemp op2 = newTemp(Ity_I64);
5421 IRTemp result = newTemp(Ity_I64);
5422
5423 op1 = 0ULL;
5424 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5425 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5426 put_gpr_dw0(r1, mkexpr(result));
5427 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5428 op1)), op2);
5429
5430 return "lcgfr";
5431}
5432
5433static HChar *
5434s390_irgen_LHR(UChar r1, UChar r2)
5435{
5436 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5437
5438 return "lhr";
5439}
5440
5441static HChar *
5442s390_irgen_LGHR(UChar r1, UChar r2)
5443{
5444 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5445
5446 return "lghr";
5447}
5448
5449static HChar *
5450s390_irgen_LH(UChar r1, IRTemp op2addr)
5451{
5452 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5453
5454 return "lh";
5455}
5456
5457static HChar *
5458s390_irgen_LHY(UChar r1, IRTemp op2addr)
5459{
5460 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5461
5462 return "lhy";
5463}
5464
5465static HChar *
5466s390_irgen_LGH(UChar r1, IRTemp op2addr)
5467{
5468 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5469
5470 return "lgh";
5471}
5472
5473static HChar *
5474s390_irgen_LHI(UChar r1, UShort i2)
5475{
5476 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5477
5478 return "lhi";
5479}
5480
5481static HChar *
5482s390_irgen_LGHI(UChar r1, UShort i2)
5483{
5484 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5485
5486 return "lghi";
5487}
5488
5489static HChar *
5490s390_irgen_LHRL(UChar r1, UInt i2)
5491{
5492 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5493 ((ULong)(Long)(Int)i2 << 1)))));
5494
5495 return "lhrl";
5496}
5497
5498static HChar *
5499s390_irgen_LGHRL(UChar r1, UInt i2)
5500{
5501 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5502 ((ULong)(Long)(Int)i2 << 1)))));
5503
5504 return "lghrl";
5505}
5506
5507static HChar *
5508s390_irgen_LHH(UChar r1, IRTemp op2addr)
5509{
5510 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5511
5512 return "lhh";
5513}
5514
5515static HChar *
5516s390_irgen_LFH(UChar r1, IRTemp op2addr)
5517{
5518 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5519
5520 return "lfh";
5521}
5522
5523static HChar *
5524s390_irgen_LLGFR(UChar r1, UChar r2)
5525{
5526 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5527
5528 return "llgfr";
5529}
5530
5531static HChar *
5532s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5533{
5534 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5535
5536 return "llgf";
5537}
5538
5539static HChar *
5540s390_irgen_LLGFRL(UChar r1, UInt i2)
5541{
5542 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5543 ((ULong)(Long)(Int)i2 << 1)))));
5544
5545 return "llgfrl";
5546}
5547
5548static HChar *
5549s390_irgen_LLCR(UChar r1, UChar r2)
5550{
5551 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5552
5553 return "llcr";
5554}
5555
5556static HChar *
5557s390_irgen_LLGCR(UChar r1, UChar r2)
5558{
5559 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5560
5561 return "llgcr";
5562}
5563
5564static HChar *
5565s390_irgen_LLC(UChar r1, IRTemp op2addr)
5566{
5567 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5568
5569 return "llc";
5570}
5571
5572static HChar *
5573s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5574{
5575 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5576
5577 return "llgc";
5578}
5579
5580static HChar *
5581s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5582{
5583 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5584
5585 return "llch";
5586}
5587
5588static HChar *
5589s390_irgen_LLHR(UChar r1, UChar r2)
5590{
5591 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5592
5593 return "llhr";
5594}
5595
5596static HChar *
5597s390_irgen_LLGHR(UChar r1, UChar r2)
5598{
5599 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5600
5601 return "llghr";
5602}
5603
5604static HChar *
5605s390_irgen_LLH(UChar r1, IRTemp op2addr)
5606{
5607 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5608
5609 return "llh";
5610}
5611
5612static HChar *
5613s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5614{
5615 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5616
5617 return "llgh";
5618}
5619
5620static HChar *
5621s390_irgen_LLHRL(UChar r1, UInt i2)
5622{
5623 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5624 ((ULong)(Long)(Int)i2 << 1)))));
5625
5626 return "llhrl";
5627}
5628
5629static HChar *
5630s390_irgen_LLGHRL(UChar r1, UInt i2)
5631{
5632 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5633 ((ULong)(Long)(Int)i2 << 1)))));
5634
5635 return "llghrl";
5636}
5637
5638static HChar *
5639s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5640{
5641 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5642
5643 return "llhh";
5644}
5645
5646static HChar *
5647s390_irgen_LLIHF(UChar r1, UInt i2)
5648{
5649 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5650
5651 return "llihf";
5652}
5653
5654static HChar *
5655s390_irgen_LLIHH(UChar r1, UShort i2)
5656{
5657 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5658
5659 return "llihh";
5660}
5661
5662static HChar *
5663s390_irgen_LLIHL(UChar r1, UShort i2)
5664{
5665 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5666
5667 return "llihl";
5668}
5669
5670static HChar *
5671s390_irgen_LLILF(UChar r1, UInt i2)
5672{
5673 put_gpr_dw0(r1, mkU64(i2));
5674
5675 return "llilf";
5676}
5677
5678static HChar *
5679s390_irgen_LLILH(UChar r1, UShort i2)
5680{
5681 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5682
5683 return "llilh";
5684}
5685
5686static HChar *
5687s390_irgen_LLILL(UChar r1, UShort i2)
5688{
5689 put_gpr_dw0(r1, mkU64(i2));
5690
5691 return "llill";
5692}
5693
5694static HChar *
5695s390_irgen_LLGTR(UChar r1, UChar r2)
5696{
5697 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5698 mkU32(2147483647))));
5699
5700 return "llgtr";
5701}
5702
5703static HChar *
5704s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5705{
5706 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5707 mkexpr(op2addr)), mkU32(2147483647))));
5708
5709 return "llgt";
5710}
5711
5712static HChar *
5713s390_irgen_LNR(UChar r1, UChar r2)
5714{
5715 IRTemp op2 = newTemp(Ity_I32);
5716 IRTemp result = newTemp(Ity_I32);
5717
5718 assign(op2, get_gpr_w1(r2));
5719 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5720 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5721 put_gpr_w1(r1, mkexpr(result));
5722 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5723
5724 return "lnr";
5725}
5726
5727static HChar *
5728s390_irgen_LNGR(UChar r1, UChar r2)
5729{
5730 IRTemp op2 = newTemp(Ity_I64);
5731 IRTemp result = newTemp(Ity_I64);
5732
5733 assign(op2, get_gpr_dw0(r2));
5734 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5735 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5736 put_gpr_dw0(r1, mkexpr(result));
5737 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5738
5739 return "lngr";
5740}
5741
5742static HChar *
5743s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5744{
5745 IRTemp op2 = newTemp(Ity_I64);
5746 IRTemp result = newTemp(Ity_I64);
5747
5748 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5749 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5750 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5751 put_gpr_dw0(r1, mkexpr(result));
5752 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5753
5754 return "lngfr";
5755}
5756
5757static HChar *
5758s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5759{
5760 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5761 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5762 ));
5763
5764 return "lpq";
5765}
5766
5767static HChar *
5768s390_irgen_LPR(UChar r1, UChar r2)
5769{
5770 IRTemp op2 = newTemp(Ity_I32);
5771 IRTemp result = newTemp(Ity_I32);
5772
5773 assign(op2, get_gpr_w1(r2));
5774 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5775 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5776 put_gpr_w1(r1, mkexpr(result));
5777 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5778
5779 return "lpr";
5780}
5781
5782static HChar *
5783s390_irgen_LPGR(UChar r1, UChar r2)
5784{
5785 IRTemp op2 = newTemp(Ity_I64);
5786 IRTemp result = newTemp(Ity_I64);
5787
5788 assign(op2, get_gpr_dw0(r2));
5789 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5790 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5791 put_gpr_dw0(r1, mkexpr(result));
5792 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5793
5794 return "lpgr";
5795}
5796
5797static HChar *
5798s390_irgen_LPGFR(UChar r1, UChar r2)
5799{
5800 IRTemp op2 = newTemp(Ity_I64);
5801 IRTemp result = newTemp(Ity_I64);
5802
5803 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5804 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5805 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5806 put_gpr_dw0(r1, mkexpr(result));
5807 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5808
5809 return "lpgfr";
5810}
5811
5812static HChar *
5813s390_irgen_LRVR(UChar r1, UChar r2)
5814{
5815 IRTemp b0 = newTemp(Ity_I8);
5816 IRTemp b1 = newTemp(Ity_I8);
5817 IRTemp b2 = newTemp(Ity_I8);
5818 IRTemp b3 = newTemp(Ity_I8);
5819
5820 assign(b3, get_gpr_b7(r2));
5821 assign(b2, get_gpr_b6(r2));
5822 assign(b1, get_gpr_b5(r2));
5823 assign(b0, get_gpr_b4(r2));
5824 put_gpr_b4(r1, mkexpr(b3));
5825 put_gpr_b5(r1, mkexpr(b2));
5826 put_gpr_b6(r1, mkexpr(b1));
5827 put_gpr_b7(r1, mkexpr(b0));
5828
5829 return "lrvr";
5830}
5831
5832static HChar *
5833s390_irgen_LRVGR(UChar r1, UChar r2)
5834{
5835 IRTemp b0 = newTemp(Ity_I8);
5836 IRTemp b1 = newTemp(Ity_I8);
5837 IRTemp b2 = newTemp(Ity_I8);
5838 IRTemp b3 = newTemp(Ity_I8);
5839 IRTemp b4 = newTemp(Ity_I8);
5840 IRTemp b5 = newTemp(Ity_I8);
5841 IRTemp b6 = newTemp(Ity_I8);
5842 IRTemp b7 = newTemp(Ity_I8);
5843
5844 assign(b7, get_gpr_b7(r2));
5845 assign(b6, get_gpr_b6(r2));
5846 assign(b5, get_gpr_b5(r2));
5847 assign(b4, get_gpr_b4(r2));
5848 assign(b3, get_gpr_b3(r2));
5849 assign(b2, get_gpr_b2(r2));
5850 assign(b1, get_gpr_b1(r2));
5851 assign(b0, get_gpr_b0(r2));
5852 put_gpr_b0(r1, mkexpr(b7));
5853 put_gpr_b1(r1, mkexpr(b6));
5854 put_gpr_b2(r1, mkexpr(b5));
5855 put_gpr_b3(r1, mkexpr(b4));
5856 put_gpr_b4(r1, mkexpr(b3));
5857 put_gpr_b5(r1, mkexpr(b2));
5858 put_gpr_b6(r1, mkexpr(b1));
5859 put_gpr_b7(r1, mkexpr(b0));
5860
5861 return "lrvgr";
5862}
5863
5864static HChar *
5865s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5866{
5867 IRTemp op2 = newTemp(Ity_I16);
5868
5869 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5870 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5871 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5872
5873 return "lrvh";
5874}
5875
5876static HChar *
5877s390_irgen_LRV(UChar r1, IRTemp op2addr)
5878{
5879 IRTemp op2 = newTemp(Ity_I32);
5880
5881 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5882 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
5883 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5884 mkU8(8)), mkU32(255))));
5885 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5886 mkU8(16)), mkU32(255))));
5887 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5888 mkU8(24)), mkU32(255))));
5889
5890 return "lrv";
5891}
5892
5893static HChar *
5894s390_irgen_LRVG(UChar r1, IRTemp op2addr)
5895{
5896 IRTemp op2 = newTemp(Ity_I64);
5897
5898 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5899 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
5900 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5901 mkU8(8)), mkU64(255))));
5902 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5903 mkU8(16)), mkU64(255))));
5904 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5905 mkU8(24)), mkU64(255))));
5906 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5907 mkU8(32)), mkU64(255))));
5908 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5909 mkU8(40)), mkU64(255))));
5910 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5911 mkU8(48)), mkU64(255))));
5912 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5913 mkU8(56)), mkU64(255))));
5914
5915 return "lrvg";
5916}
5917
5918static HChar *
5919s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
5920{
5921 store(mkexpr(op1addr), mkU16(i2));
5922
5923 return "mvhhi";
5924}
5925
5926static HChar *
5927s390_irgen_MVHI(UShort i2, IRTemp op1addr)
5928{
5929 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
5930
5931 return "mvhi";
5932}
5933
5934static HChar *
5935s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
5936{
5937 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
5938
5939 return "mvghi";
5940}
5941
5942static HChar *
5943s390_irgen_MVI(UChar i2, IRTemp op1addr)
5944{
5945 store(mkexpr(op1addr), mkU8(i2));
5946
5947 return "mvi";
5948}
5949
5950static HChar *
5951s390_irgen_MVIY(UChar i2, IRTemp op1addr)
5952{
5953 store(mkexpr(op1addr), mkU8(i2));
5954
5955 return "mviy";
5956}
5957
5958static HChar *
5959s390_irgen_MR(UChar r1, UChar r2)
5960{
5961 IRTemp op1 = newTemp(Ity_I32);
5962 IRTemp op2 = newTemp(Ity_I32);
5963 IRTemp result = newTemp(Ity_I64);
5964
5965 assign(op1, get_gpr_w1(r1 + 1));
5966 assign(op2, get_gpr_w1(r2));
5967 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
5968 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
5969 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
5970
5971 return "mr";
5972}
5973
5974static HChar *
5975s390_irgen_M(UChar r1, IRTemp op2addr)
5976{
5977 IRTemp op1 = newTemp(Ity_I32);
5978 IRTemp op2 = newTemp(Ity_I32);
5979 IRTemp result = newTemp(Ity_I64);
5980
5981 assign(op1, get_gpr_w1(r1 + 1));
5982 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5983 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
5984 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
5985 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
5986
5987 return "m";
5988}
5989
5990static HChar *
5991s390_irgen_MFY(UChar r1, IRTemp op2addr)
5992{
5993 IRTemp op1 = newTemp(Ity_I32);
5994 IRTemp op2 = newTemp(Ity_I32);
5995 IRTemp result = newTemp(Ity_I64);
5996
5997 assign(op1, get_gpr_w1(r1 + 1));
5998 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5999 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6000 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6001 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6002
6003 return "mfy";
6004}
6005
6006static HChar *
6007s390_irgen_MH(UChar r1, IRTemp op2addr)
6008{
6009 IRTemp op1 = newTemp(Ity_I32);
6010 IRTemp op2 = newTemp(Ity_I16);
6011 IRTemp result = newTemp(Ity_I64);
6012
6013 assign(op1, get_gpr_w1(r1));
6014 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6015 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6016 ));
6017 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6018
6019 return "mh";
6020}
6021
6022static HChar *
6023s390_irgen_MHY(UChar r1, IRTemp op2addr)
6024{
6025 IRTemp op1 = newTemp(Ity_I32);
6026 IRTemp op2 = newTemp(Ity_I16);
6027 IRTemp result = newTemp(Ity_I64);
6028
6029 assign(op1, get_gpr_w1(r1));
6030 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6031 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6032 ));
6033 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6034
6035 return "mhy";
6036}
6037
6038static HChar *
6039s390_irgen_MHI(UChar r1, UShort i2)
6040{
6041 IRTemp op1 = newTemp(Ity_I32);
6042 Short op2;
6043 IRTemp result = newTemp(Ity_I64);
6044
6045 assign(op1, get_gpr_w1(r1));
6046 op2 = (Short)i2;
6047 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6048 mkU16((UShort)op2))));
6049 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6050
6051 return "mhi";
6052}
6053
6054static HChar *
6055s390_irgen_MGHI(UChar r1, UShort i2)
6056{
6057 IRTemp op1 = newTemp(Ity_I64);
6058 Short op2;
6059 IRTemp result = newTemp(Ity_I128);
6060
6061 assign(op1, get_gpr_dw0(r1));
6062 op2 = (Short)i2;
6063 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6064 mkU16((UShort)op2))));
6065 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6066
6067 return "mghi";
6068}
6069
6070static HChar *
6071s390_irgen_MLR(UChar r1, UChar r2)
6072{
6073 IRTemp op1 = newTemp(Ity_I32);
6074 IRTemp op2 = newTemp(Ity_I32);
6075 IRTemp result = newTemp(Ity_I64);
6076
6077 assign(op1, get_gpr_w1(r1 + 1));
6078 assign(op2, get_gpr_w1(r2));
6079 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6080 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6081 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6082
6083 return "mlr";
6084}
6085
6086static HChar *
6087s390_irgen_MLGR(UChar r1, UChar r2)
6088{
6089 IRTemp op1 = newTemp(Ity_I64);
6090 IRTemp op2 = newTemp(Ity_I64);
6091 IRTemp result = newTemp(Ity_I128);
6092
6093 assign(op1, get_gpr_dw0(r1 + 1));
6094 assign(op2, get_gpr_dw0(r2));
6095 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6096 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6097 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6098
6099 return "mlgr";
6100}
6101
6102static HChar *
6103s390_irgen_ML(UChar r1, IRTemp op2addr)
6104{
6105 IRTemp op1 = newTemp(Ity_I32);
6106 IRTemp op2 = newTemp(Ity_I32);
6107 IRTemp result = newTemp(Ity_I64);
6108
6109 assign(op1, get_gpr_w1(r1 + 1));
6110 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6111 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6112 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6113 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6114
6115 return "ml";
6116}
6117
6118static HChar *
6119s390_irgen_MLG(UChar r1, IRTemp op2addr)
6120{
6121 IRTemp op1 = newTemp(Ity_I64);
6122 IRTemp op2 = newTemp(Ity_I64);
6123 IRTemp result = newTemp(Ity_I128);
6124
6125 assign(op1, get_gpr_dw0(r1 + 1));
6126 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6127 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6128 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6129 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6130
6131 return "mlg";
6132}
6133
6134static HChar *
6135s390_irgen_MSR(UChar r1, UChar r2)
6136{
6137 IRTemp op1 = newTemp(Ity_I32);
6138 IRTemp op2 = newTemp(Ity_I32);
6139 IRTemp result = newTemp(Ity_I64);
6140
6141 assign(op1, get_gpr_w1(r1));
6142 assign(op2, get_gpr_w1(r2));
6143 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6144 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6145
6146 return "msr";
6147}
6148
6149static HChar *
6150s390_irgen_MSGR(UChar r1, UChar r2)
6151{
6152 IRTemp op1 = newTemp(Ity_I64);
6153 IRTemp op2 = newTemp(Ity_I64);
6154 IRTemp result = newTemp(Ity_I128);
6155
6156 assign(op1, get_gpr_dw0(r1));
6157 assign(op2, get_gpr_dw0(r2));
6158 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6159 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6160
6161 return "msgr";
6162}
6163
6164static HChar *
6165s390_irgen_MSGFR(UChar r1, UChar r2)
6166{
6167 IRTemp op1 = newTemp(Ity_I64);
6168 IRTemp op2 = newTemp(Ity_I32);
6169 IRTemp result = newTemp(Ity_I128);
6170
6171 assign(op1, get_gpr_dw0(r1));
6172 assign(op2, get_gpr_w1(r2));
6173 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6174 ));
6175 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6176
6177 return "msgfr";
6178}
6179
6180static HChar *
6181s390_irgen_MS(UChar r1, IRTemp op2addr)
6182{
6183 IRTemp op1 = newTemp(Ity_I32);
6184 IRTemp op2 = newTemp(Ity_I32);
6185 IRTemp result = newTemp(Ity_I64);
6186
6187 assign(op1, get_gpr_w1(r1));
6188 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6189 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6190 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6191
6192 return "ms";
6193}
6194
6195static HChar *
6196s390_irgen_MSY(UChar r1, IRTemp op2addr)
6197{
6198 IRTemp op1 = newTemp(Ity_I32);
6199 IRTemp op2 = newTemp(Ity_I32);
6200 IRTemp result = newTemp(Ity_I64);
6201
6202 assign(op1, get_gpr_w1(r1));
6203 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6204 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6205 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6206
6207 return "msy";
6208}
6209
6210static HChar *
6211s390_irgen_MSG(UChar r1, IRTemp op2addr)
6212{
6213 IRTemp op1 = newTemp(Ity_I64);
6214 IRTemp op2 = newTemp(Ity_I64);
6215 IRTemp result = newTemp(Ity_I128);
6216
6217 assign(op1, get_gpr_dw0(r1));
6218 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6219 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6220 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6221
6222 return "msg";
6223}
6224
6225static HChar *
6226s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6227{
6228 IRTemp op1 = newTemp(Ity_I64);
6229 IRTemp op2 = newTemp(Ity_I32);
6230 IRTemp result = newTemp(Ity_I128);
6231
6232 assign(op1, get_gpr_dw0(r1));
6233 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6234 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6235 ));
6236 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6237
6238 return "msgf";
6239}
6240
6241static HChar *
6242s390_irgen_MSFI(UChar r1, UInt i2)
6243{
6244 IRTemp op1 = newTemp(Ity_I32);
6245 Int op2;
6246 IRTemp result = newTemp(Ity_I64);
6247
6248 assign(op1, get_gpr_w1(r1));
6249 op2 = (Int)i2;
6250 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6251 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6252
6253 return "msfi";
6254}
6255
6256static HChar *
6257s390_irgen_MSGFI(UChar r1, UInt i2)
6258{
6259 IRTemp op1 = newTemp(Ity_I64);
6260 Int op2;
6261 IRTemp result = newTemp(Ity_I128);
6262
6263 assign(op1, get_gpr_dw0(r1));
6264 op2 = (Int)i2;
6265 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6266 op2))));
6267 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6268
6269 return "msgfi";
6270}
6271
6272static HChar *
6273s390_irgen_OR(UChar r1, UChar r2)
6274{
6275 IRTemp op1 = newTemp(Ity_I32);
6276 IRTemp op2 = newTemp(Ity_I32);
6277 IRTemp result = newTemp(Ity_I32);
6278
6279 assign(op1, get_gpr_w1(r1));
6280 assign(op2, get_gpr_w1(r2));
6281 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6282 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6283 put_gpr_w1(r1, mkexpr(result));
6284
6285 return "or";
6286}
6287
6288static HChar *
6289s390_irgen_OGR(UChar r1, UChar r2)
6290{
6291 IRTemp op1 = newTemp(Ity_I64);
6292 IRTemp op2 = newTemp(Ity_I64);
6293 IRTemp result = newTemp(Ity_I64);
6294
6295 assign(op1, get_gpr_dw0(r1));
6296 assign(op2, get_gpr_dw0(r2));
6297 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6298 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6299 put_gpr_dw0(r1, mkexpr(result));
6300
6301 return "ogr";
6302}
6303
6304static HChar *
6305s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6306{
6307 IRTemp op2 = newTemp(Ity_I32);
6308 IRTemp op3 = newTemp(Ity_I32);
6309 IRTemp result = newTemp(Ity_I32);
6310
6311 assign(op2, get_gpr_w1(r2));
6312 assign(op3, get_gpr_w1(r3));
6313 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6314 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6315 put_gpr_w1(r1, mkexpr(result));
6316
6317 return "ork";
6318}
6319
6320static HChar *
6321s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6322{
6323 IRTemp op2 = newTemp(Ity_I64);
6324 IRTemp op3 = newTemp(Ity_I64);
6325 IRTemp result = newTemp(Ity_I64);
6326
6327 assign(op2, get_gpr_dw0(r2));
6328 assign(op3, get_gpr_dw0(r3));
6329 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6330 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6331 put_gpr_dw0(r1, mkexpr(result));
6332
6333 return "ogrk";
6334}
6335
6336static HChar *
6337s390_irgen_O(UChar r1, IRTemp op2addr)
6338{
6339 IRTemp op1 = newTemp(Ity_I32);
6340 IRTemp op2 = newTemp(Ity_I32);
6341 IRTemp result = newTemp(Ity_I32);
6342
6343 assign(op1, get_gpr_w1(r1));
6344 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6345 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6346 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6347 put_gpr_w1(r1, mkexpr(result));
6348
6349 return "o";
6350}
6351
6352static HChar *
6353s390_irgen_OY(UChar r1, IRTemp op2addr)
6354{
6355 IRTemp op1 = newTemp(Ity_I32);
6356 IRTemp op2 = newTemp(Ity_I32);
6357 IRTemp result = newTemp(Ity_I32);
6358
6359 assign(op1, get_gpr_w1(r1));
6360 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6361 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6362 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6363 put_gpr_w1(r1, mkexpr(result));
6364
6365 return "oy";
6366}
6367
6368static HChar *
6369s390_irgen_OG(UChar r1, IRTemp op2addr)
6370{
6371 IRTemp op1 = newTemp(Ity_I64);
6372 IRTemp op2 = newTemp(Ity_I64);
6373 IRTemp result = newTemp(Ity_I64);
6374
6375 assign(op1, get_gpr_dw0(r1));
6376 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6377 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6378 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6379 put_gpr_dw0(r1, mkexpr(result));
6380
6381 return "og";
6382}
6383
6384static HChar *
6385s390_irgen_OI(UChar i2, IRTemp op1addr)
6386{
6387 IRTemp op1 = newTemp(Ity_I8);
6388 UChar op2;
6389 IRTemp result = newTemp(Ity_I8);
6390
6391 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6392 op2 = i2;
6393 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6394 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6395 store(mkexpr(op1addr), mkexpr(result));
6396
6397 return "oi";
6398}
6399
6400static HChar *
6401s390_irgen_OIY(UChar i2, IRTemp op1addr)
6402{
6403 IRTemp op1 = newTemp(Ity_I8);
6404 UChar op2;
6405 IRTemp result = newTemp(Ity_I8);
6406
6407 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6408 op2 = i2;
6409 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6410 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6411 store(mkexpr(op1addr), mkexpr(result));
6412
6413 return "oiy";
6414}
6415
6416static HChar *
6417s390_irgen_OIHF(UChar r1, UInt i2)
6418{
6419 IRTemp op1 = newTemp(Ity_I32);
6420 UInt op2;
6421 IRTemp result = newTemp(Ity_I32);
6422
6423 assign(op1, get_gpr_w0(r1));
6424 op2 = i2;
6425 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6426 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6427 put_gpr_w0(r1, mkexpr(result));
6428
6429 return "oihf";
6430}
6431
6432static HChar *
6433s390_irgen_OIHH(UChar r1, UShort i2)
6434{
6435 IRTemp op1 = newTemp(Ity_I16);
6436 UShort op2;
6437 IRTemp result = newTemp(Ity_I16);
6438
6439 assign(op1, get_gpr_hw0(r1));
6440 op2 = i2;
6441 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6442 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6443 put_gpr_hw0(r1, mkexpr(result));
6444
6445 return "oihh";
6446}
6447
6448static HChar *
6449s390_irgen_OIHL(UChar r1, UShort i2)
6450{
6451 IRTemp op1 = newTemp(Ity_I16);
6452 UShort op2;
6453 IRTemp result = newTemp(Ity_I16);
6454
6455 assign(op1, get_gpr_hw1(r1));
6456 op2 = i2;
6457 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6458 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6459 put_gpr_hw1(r1, mkexpr(result));
6460
6461 return "oihl";
6462}
6463
6464static HChar *
6465s390_irgen_OILF(UChar r1, UInt i2)
6466{
6467 IRTemp op1 = newTemp(Ity_I32);
6468 UInt op2;
6469 IRTemp result = newTemp(Ity_I32);
6470
6471 assign(op1, get_gpr_w1(r1));
6472 op2 = i2;
6473 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6474 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6475 put_gpr_w1(r1, mkexpr(result));
6476
6477 return "oilf";
6478}
6479
6480static HChar *
6481s390_irgen_OILH(UChar r1, UShort i2)
6482{
6483 IRTemp op1 = newTemp(Ity_I16);
6484 UShort op2;
6485 IRTemp result = newTemp(Ity_I16);
6486
6487 assign(op1, get_gpr_hw2(r1));
6488 op2 = i2;
6489 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6490 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6491 put_gpr_hw2(r1, mkexpr(result));
6492
6493 return "oilh";
6494}
6495
6496static HChar *
6497s390_irgen_OILL(UChar r1, UShort i2)
6498{
6499 IRTemp op1 = newTemp(Ity_I16);
6500 UShort op2;
6501 IRTemp result = newTemp(Ity_I16);
6502
6503 assign(op1, get_gpr_hw3(r1));
6504 op2 = i2;
6505 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6506 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6507 put_gpr_hw3(r1, mkexpr(result));
6508
6509 return "oill";
6510}
6511
6512static HChar *
6513s390_irgen_PFD(void)
6514{
6515
6516 return "pfd";
6517}
6518
6519static HChar *
6520s390_irgen_PFDRL(void)
6521{
6522
6523 return "pfdrl";
6524}
6525
6526static HChar *
6527s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6528{
6529 IRTemp amount = newTemp(Ity_I64);
6530 IRTemp op = newTemp(Ity_I32);
6531
6532 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6533 assign(op, get_gpr_w1(r3));
6534 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6535 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6536 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6537
6538 return "rll";
6539}
6540
6541static HChar *
6542s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6543{
6544 IRTemp amount = newTemp(Ity_I64);
6545 IRTemp op = newTemp(Ity_I64);
6546
6547 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6548 assign(op, get_gpr_dw0(r3));
6549 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6550 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6551 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6552
6553 return "rllg";
6554}
6555
6556static HChar *
6557s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6558{
6559 UChar from;
6560 UChar to;
6561 UChar rot;
6562 UChar t_bit;
6563 ULong mask;
6564 ULong maskc;
6565 IRTemp result = newTemp(Ity_I64);
6566 IRTemp op2 = newTemp(Ity_I64);
6567
6568 from = i3 & 63;
6569 to = i4 & 63;
6570 rot = i5 & 63;
6571 t_bit = i3 & 128;
6572 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6573 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6574 mkU8(64 - rot))));
6575 if (from <= to) {
6576 mask = ~0ULL;
6577 mask = (mask >> from) & (mask << (63 - to));
6578 maskc = ~mask;
6579 } else {
6580 maskc = ~0ULL;
6581 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6582 mask = ~maskc;
6583 }
6584 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6585 ), mkU64(mask)));
6586 if (t_bit == 0) {
6587 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6588 mkU64(maskc)), mkexpr(result)));
6589 }
6590 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6591
6592 return "rnsbg";
6593}
6594
6595static HChar *
6596s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6597{
6598 UChar from;
6599 UChar to;
6600 UChar rot;
6601 UChar t_bit;
6602 ULong mask;
6603 ULong maskc;
6604 IRTemp result = newTemp(Ity_I64);
6605 IRTemp op2 = newTemp(Ity_I64);
6606
6607 from = i3 & 63;
6608 to = i4 & 63;
6609 rot = i5 & 63;
6610 t_bit = i3 & 128;
6611 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6612 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6613 mkU8(64 - rot))));
6614 if (from <= to) {
6615 mask = ~0ULL;
6616 mask = (mask >> from) & (mask << (63 - to));
6617 maskc = ~mask;
6618 } else {
6619 maskc = ~0ULL;
6620 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6621 mask = ~maskc;
6622 }
6623 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6624 ), mkU64(mask)));
6625 if (t_bit == 0) {
6626 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6627 mkU64(maskc)), mkexpr(result)));
6628 }
6629 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6630
6631 return "rxsbg";
6632}
6633
6634static HChar *
6635s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6636{
6637 UChar from;
6638 UChar to;
6639 UChar rot;
6640 UChar t_bit;
6641 ULong mask;
6642 ULong maskc;
6643 IRTemp result = newTemp(Ity_I64);
6644 IRTemp op2 = newTemp(Ity_I64);
6645
6646 from = i3 & 63;
6647 to = i4 & 63;
6648 rot = i5 & 63;
6649 t_bit = i3 & 128;
6650 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6651 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6652 mkU8(64 - rot))));
6653 if (from <= to) {
6654 mask = ~0ULL;
6655 mask = (mask >> from) & (mask << (63 - to));
6656 maskc = ~mask;
6657 } else {
6658 maskc = ~0ULL;
6659 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6660 mask = ~maskc;
6661 }
6662 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6663 ), mkU64(mask)));
6664 if (t_bit == 0) {
6665 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6666 mkU64(maskc)), mkexpr(result)));
6667 }
6668 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6669
6670 return "rosbg";
6671}
6672
6673static HChar *
6674s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6675{
6676 UChar from;
6677 UChar to;
6678 UChar rot;
6679 UChar z_bit;
6680 ULong mask;
6681 ULong maskc;
6682 IRTemp op2 = newTemp(Ity_I64);
6683 IRTemp result = newTemp(Ity_I64);
6684
6685 from = i3 & 63;
6686 to = i4 & 63;
6687 rot = i5 & 63;
6688 z_bit = i4 & 128;
6689 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6690 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6691 mkU8(64 - rot))));
6692 if (from <= to) {
6693 mask = ~0ULL;
6694 mask = (mask >> from) & (mask << (63 - to));
6695 maskc = ~mask;
6696 } else {
6697 maskc = ~0ULL;
6698 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6699 mask = ~maskc;
6700 }
6701 if (z_bit == 0) {
6702 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6703 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6704 } else {
6705 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6706 }
6707 assign(result, get_gpr_dw0(r1));
6708 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6709
6710 return "risbg";
6711}
6712
6713static HChar *
6714s390_irgen_SAR(UChar r1, UChar r2)
6715{
6716 put_ar_w0(r1, get_gpr_w1(r2));
6717 if (unlikely(vex_traceflags & VEX_TRACE_FE))
6718 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6719
6720 return "sar";
6721}
6722
6723static HChar *
6724s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6725{
6726 IRTemp p1 = newTemp(Ity_I64);
6727 IRTemp p2 = newTemp(Ity_I64);
6728 IRTemp op = newTemp(Ity_I64);
6729 IRTemp result = newTemp(Ity_I64);
6730 Long sign_mask;
6731 IRTemp shift_amount = newTemp(Ity_I64);
6732
6733 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6734 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6735 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6736 ));
6737 sign_mask = 1ULL << 63;
6738 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6739 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6740 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6741 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6742 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6743 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6744 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6745
6746 return "slda";
6747}
6748
6749static HChar *
6750s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6751{
6752 IRTemp p1 = newTemp(Ity_I64);
6753 IRTemp p2 = newTemp(Ity_I64);
6754 IRTemp result = newTemp(Ity_I64);
6755
6756 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6757 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6758 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6759 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6760 mkexpr(op2addr), mkU64(63)))));
6761 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6762 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6763
6764 return "sldl";
6765}
6766
6767static HChar *
6768s390_irgen_SLA(UChar r1, IRTemp op2addr)
6769{
6770 IRTemp uop = newTemp(Ity_I32);
6771 IRTemp result = newTemp(Ity_I32);
6772 UInt sign_mask;
6773 IRTemp shift_amount = newTemp(Ity_I64);
6774 IRTemp op = newTemp(Ity_I32);
6775
6776 assign(op, get_gpr_w1(r1));
6777 assign(uop, get_gpr_w1(r1));
6778 sign_mask = 2147483648U;
6779 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6780 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6781 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6782 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6783 put_gpr_w1(r1, mkexpr(result));
6784 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6785
6786 return "sla";
6787}
6788
6789static HChar *
6790s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6791{
6792 IRTemp uop = newTemp(Ity_I32);
6793 IRTemp result = newTemp(Ity_I32);
6794 UInt sign_mask;
6795 IRTemp shift_amount = newTemp(Ity_I64);
6796 IRTemp op = newTemp(Ity_I32);
6797
6798 assign(op, get_gpr_w1(r3));
6799 assign(uop, get_gpr_w1(r3));
6800 sign_mask = 2147483648U;
6801 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6802 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6803 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6804 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6805 put_gpr_w1(r1, mkexpr(result));
6806 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6807
6808 return "slak";
6809}
6810
6811static HChar *
6812s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6813{
6814 IRTemp uop = newTemp(Ity_I64);
6815 IRTemp result = newTemp(Ity_I64);
6816 ULong sign_mask;
6817 IRTemp shift_amount = newTemp(Ity_I64);
6818 IRTemp op = newTemp(Ity_I64);
6819
6820 assign(op, get_gpr_dw0(r3));
6821 assign(uop, get_gpr_dw0(r3));
6822 sign_mask = 9223372036854775808ULL;
6823 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6824 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6825 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6826 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6827 put_gpr_dw0(r1, mkexpr(result));
6828 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6829
6830 return "slag";
6831}
6832
6833static HChar *
6834s390_irgen_SLL(UChar r1, IRTemp op2addr)
6835{
6836 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6837 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6838
6839 return "sll";
6840}
6841
6842static HChar *
6843s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6844{
6845 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6846 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6847
6848 return "sllk";
6849}
6850
6851static HChar *
6852s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6853{
6854 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6855 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6856
6857 return "sllg";
6858}
6859
6860static HChar *
6861s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6862{
6863 IRTemp p1 = newTemp(Ity_I64);
6864 IRTemp p2 = newTemp(Ity_I64);
6865 IRTemp result = newTemp(Ity_I64);
6866
6867 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6868 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6869 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6870 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6871 mkexpr(op2addr), mkU64(63)))));
6872 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6873 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6874 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6875
6876 return "srda";
6877}
6878
6879static HChar *
6880s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6881{
6882 IRTemp p1 = newTemp(Ity_I64);
6883 IRTemp p2 = newTemp(Ity_I64);
6884 IRTemp result = newTemp(Ity_I64);
6885
6886 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6887 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6888 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6889 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6890 mkexpr(op2addr), mkU64(63)))));
6891 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6892 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6893
6894 return "srdl";
6895}
6896
6897static HChar *
6898s390_irgen_SRA(UChar r1, IRTemp op2addr)
6899{
6900 IRTemp result = newTemp(Ity_I32);
6901 IRTemp op = newTemp(Ity_I32);
6902
6903 assign(op, get_gpr_w1(r1));
6904 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6905 mkexpr(op2addr), mkU64(63)))));
6906 put_gpr_w1(r1, mkexpr(result));
6907 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6908
6909 return "sra";
6910}
6911
6912static HChar *
6913s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
6914{
6915 IRTemp result = newTemp(Ity_I32);
6916 IRTemp op = newTemp(Ity_I32);
6917
6918 assign(op, get_gpr_w1(r3));
6919 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6920 mkexpr(op2addr), mkU64(63)))));
6921 put_gpr_w1(r1, mkexpr(result));
6922 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6923
6924 return "srak";
6925}
6926
6927static HChar *
6928s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
6929{
6930 IRTemp result = newTemp(Ity_I64);
6931 IRTemp op = newTemp(Ity_I64);
6932
6933 assign(op, get_gpr_dw0(r3));
6934 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6935 mkexpr(op2addr), mkU64(63)))));
6936 put_gpr_dw0(r1, mkexpr(result));
6937 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6938
6939 return "srag";
6940}
6941
6942static HChar *
6943s390_irgen_SRL(UChar r1, IRTemp op2addr)
6944{
6945 IRTemp op = newTemp(Ity_I32);
6946
6947 assign(op, get_gpr_w1(r1));
6948 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6949 mkexpr(op2addr), mkU64(63)))));
6950
6951 return "srl";
6952}
6953
6954static HChar *
6955s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
6956{
6957 IRTemp op = newTemp(Ity_I32);
6958
6959 assign(op, get_gpr_w1(r3));
6960 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6961 mkexpr(op2addr), mkU64(63)))));
6962
6963 return "srlk";
6964}
6965
6966static HChar *
6967s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
6968{
6969 IRTemp op = newTemp(Ity_I64);
6970
6971 assign(op, get_gpr_dw0(r3));
6972 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6973 mkexpr(op2addr), mkU64(63)))));
6974
6975 return "srlg";
6976}
6977
6978static HChar *
6979s390_irgen_ST(UChar r1, IRTemp op2addr)
6980{
6981 store(mkexpr(op2addr), get_gpr_w1(r1));
6982
6983 return "st";
6984}
6985
6986static HChar *
6987s390_irgen_STY(UChar r1, IRTemp op2addr)
6988{
6989 store(mkexpr(op2addr), get_gpr_w1(r1));
6990
6991 return "sty";
6992}
6993
6994static HChar *
6995s390_irgen_STG(UChar r1, IRTemp op2addr)
6996{
6997 store(mkexpr(op2addr), get_gpr_dw0(r1));
6998
6999 return "stg";
7000}
7001
7002static HChar *
7003s390_irgen_STRL(UChar r1, UInt i2)
7004{
7005 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7006 get_gpr_w1(r1));
7007
7008 return "strl";
7009}
7010
7011static HChar *
7012s390_irgen_STGRL(UChar r1, UInt i2)
7013{
7014 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7015 get_gpr_dw0(r1));
7016
7017 return "stgrl";
7018}
7019
7020static HChar *
7021s390_irgen_STC(UChar r1, IRTemp op2addr)
7022{
7023 store(mkexpr(op2addr), get_gpr_b7(r1));
7024
7025 return "stc";
7026}
7027
7028static HChar *
7029s390_irgen_STCY(UChar r1, IRTemp op2addr)
7030{
7031 store(mkexpr(op2addr), get_gpr_b7(r1));
7032
7033 return "stcy";
7034}
7035
7036static HChar *
7037s390_irgen_STCH(UChar r1, IRTemp op2addr)
7038{
7039 store(mkexpr(op2addr), get_gpr_b3(r1));
7040
7041 return "stch";
7042}
7043
7044static HChar *
7045s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7046{
7047 UChar mask;
7048 UChar n;
7049
7050 mask = (UChar)r3;
7051 n = 0;
7052 if ((mask & 8) != 0) {
7053 store(mkexpr(op2addr), get_gpr_b4(r1));
7054 n = n + 1;
7055 }
7056 if ((mask & 4) != 0) {
7057 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7058 n = n + 1;
7059 }
7060 if ((mask & 2) != 0) {
7061 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7062 n = n + 1;
7063 }
7064 if ((mask & 1) != 0) {
7065 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7066 }
7067
7068 return "stcm";
7069}
7070
7071static HChar *
7072s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7073{
7074 UChar mask;
7075 UChar n;
7076
7077 mask = (UChar)r3;
7078 n = 0;
7079 if ((mask & 8) != 0) {
7080 store(mkexpr(op2addr), get_gpr_b4(r1));
7081 n = n + 1;
7082 }
7083 if ((mask & 4) != 0) {
7084 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7085 n = n + 1;
7086 }
7087 if ((mask & 2) != 0) {
7088 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7089 n = n + 1;
7090 }
7091 if ((mask & 1) != 0) {
7092 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7093 }
7094
7095 return "stcmy";
7096}
7097
7098static HChar *
7099s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7100{
7101 UChar mask;
7102 UChar n;
7103
7104 mask = (UChar)r3;
7105 n = 0;
7106 if ((mask & 8) != 0) {
7107 store(mkexpr(op2addr), get_gpr_b0(r1));
7108 n = n + 1;
7109 }
7110 if ((mask & 4) != 0) {
7111 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7112 n = n + 1;
7113 }
7114 if ((mask & 2) != 0) {
7115 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7116 n = n + 1;
7117 }
7118 if ((mask & 1) != 0) {
7119 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7120 }
7121
7122 return "stcmh";
7123}
7124
7125static HChar *
7126s390_irgen_STH(UChar r1, IRTemp op2addr)
7127{
7128 store(mkexpr(op2addr), get_gpr_hw3(r1));
7129
7130 return "sth";
7131}
7132
7133static HChar *
7134s390_irgen_STHY(UChar r1, IRTemp op2addr)
7135{
7136 store(mkexpr(op2addr), get_gpr_hw3(r1));
7137
7138 return "sthy";
7139}
7140
7141static HChar *
7142s390_irgen_STHRL(UChar r1, UInt i2)
7143{
7144 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7145 get_gpr_hw3(r1));
7146
7147 return "sthrl";
7148}
7149
7150static HChar *
7151s390_irgen_STHH(UChar r1, IRTemp op2addr)
7152{
7153 store(mkexpr(op2addr), get_gpr_hw1(r1));
7154
7155 return "sthh";
7156}
7157
7158static HChar *
7159s390_irgen_STFH(UChar r1, IRTemp op2addr)
7160{
7161 store(mkexpr(op2addr), get_gpr_w0(r1));
7162
7163 return "stfh";
7164}
7165
7166static HChar *
7167s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7168{
7169 store(mkexpr(op2addr), get_gpr_dw0(r1));
7170 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7171
7172 return "stpq";
7173}
7174
7175static HChar *
7176s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7177{
7178 store(mkexpr(op2addr), get_gpr_b7(r1));
7179 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7180
7181 return "strvh";
7182}
7183
7184static HChar *
7185s390_irgen_STRV(UChar r1, IRTemp op2addr)
7186{
7187 store(mkexpr(op2addr), get_gpr_b7(r1));
7188 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7189 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7190 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7191
7192 return "strv";
7193}
7194
7195static HChar *
7196s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7197{
7198 store(mkexpr(op2addr), get_gpr_b7(r1));
7199 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7200 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7201 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7202 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7203 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7204 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7205 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7206
7207 return "strvg";
7208}
7209
7210static HChar *
7211s390_irgen_SR(UChar r1, UChar r2)
7212{
7213 IRTemp op1 = newTemp(Ity_I32);
7214 IRTemp op2 = newTemp(Ity_I32);
7215 IRTemp result = newTemp(Ity_I32);
7216
7217 assign(op1, get_gpr_w1(r1));
7218 assign(op2, get_gpr_w1(r2));
7219 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7220 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7221 put_gpr_w1(r1, mkexpr(result));
7222
7223 return "sr";
7224}
7225
7226static HChar *
7227s390_irgen_SGR(UChar r1, UChar r2)
7228{
7229 IRTemp op1 = newTemp(Ity_I64);
7230 IRTemp op2 = newTemp(Ity_I64);
7231 IRTemp result = newTemp(Ity_I64);
7232
7233 assign(op1, get_gpr_dw0(r1));
7234 assign(op2, get_gpr_dw0(r2));
7235 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7236 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7237 put_gpr_dw0(r1, mkexpr(result));
7238
7239 return "sgr";
7240}
7241
7242static HChar *
7243s390_irgen_SGFR(UChar r1, UChar r2)
7244{
7245 IRTemp op1 = newTemp(Ity_I64);
7246 IRTemp op2 = newTemp(Ity_I64);
7247 IRTemp result = newTemp(Ity_I64);
7248
7249 assign(op1, get_gpr_dw0(r1));
7250 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7251 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7252 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7253 put_gpr_dw0(r1, mkexpr(result));
7254
7255 return "sgfr";
7256}
7257
7258static HChar *
7259s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7260{
7261 IRTemp op2 = newTemp(Ity_I32);
7262 IRTemp op3 = newTemp(Ity_I32);
7263 IRTemp result = newTemp(Ity_I32);
7264
7265 assign(op2, get_gpr_w1(r2));
7266 assign(op3, get_gpr_w1(r3));
7267 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7268 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7269 put_gpr_w1(r1, mkexpr(result));
7270
7271 return "srk";
7272}
7273
7274static HChar *
7275s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7276{
7277 IRTemp op2 = newTemp(Ity_I64);
7278 IRTemp op3 = newTemp(Ity_I64);
7279 IRTemp result = newTemp(Ity_I64);
7280
7281 assign(op2, get_gpr_dw0(r2));
7282 assign(op3, get_gpr_dw0(r3));
7283 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7284 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7285 put_gpr_dw0(r1, mkexpr(result));
7286
7287 return "sgrk";
7288}
7289
7290static HChar *
7291s390_irgen_S(UChar r1, IRTemp op2addr)
7292{
7293 IRTemp op1 = newTemp(Ity_I32);
7294 IRTemp op2 = newTemp(Ity_I32);
7295 IRTemp result = newTemp(Ity_I32);
7296
7297 assign(op1, get_gpr_w1(r1));
7298 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7299 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7300 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7301 put_gpr_w1(r1, mkexpr(result));
7302
7303 return "s";
7304}
7305
7306static HChar *
7307s390_irgen_SY(UChar r1, IRTemp op2addr)
7308{
7309 IRTemp op1 = newTemp(Ity_I32);
7310 IRTemp op2 = newTemp(Ity_I32);
7311 IRTemp result = newTemp(Ity_I32);
7312
7313 assign(op1, get_gpr_w1(r1));
7314 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7315 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7316 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7317 put_gpr_w1(r1, mkexpr(result));
7318
7319 return "sy";
7320}
7321
7322static HChar *
7323s390_irgen_SG(UChar r1, IRTemp op2addr)
7324{
7325 IRTemp op1 = newTemp(Ity_I64);
7326 IRTemp op2 = newTemp(Ity_I64);
7327 IRTemp result = newTemp(Ity_I64);
7328
7329 assign(op1, get_gpr_dw0(r1));
7330 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7331 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7332 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7333 put_gpr_dw0(r1, mkexpr(result));
7334
7335 return "sg";
7336}
7337
7338static HChar *
7339s390_irgen_SGF(UChar r1, IRTemp op2addr)
7340{
7341 IRTemp op1 = newTemp(Ity_I64);
7342 IRTemp op2 = newTemp(Ity_I64);
7343 IRTemp result = newTemp(Ity_I64);
7344
7345 assign(op1, get_gpr_dw0(r1));
7346 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7347 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7348 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7349 put_gpr_dw0(r1, mkexpr(result));
7350
7351 return "sgf";
7352}
7353
7354static HChar *
7355s390_irgen_SH(UChar r1, IRTemp op2addr)
7356{
7357 IRTemp op1 = newTemp(Ity_I32);
7358 IRTemp op2 = newTemp(Ity_I32);
7359 IRTemp result = newTemp(Ity_I32);
7360
7361 assign(op1, get_gpr_w1(r1));
7362 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7363 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7364 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7365 put_gpr_w1(r1, mkexpr(result));
7366
7367 return "sh";
7368}
7369
7370static HChar *
7371s390_irgen_SHY(UChar r1, IRTemp op2addr)
7372{
7373 IRTemp op1 = newTemp(Ity_I32);
7374 IRTemp op2 = newTemp(Ity_I32);
7375 IRTemp result = newTemp(Ity_I32);
7376
7377 assign(op1, get_gpr_w1(r1));
7378 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7379 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7380 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7381 put_gpr_w1(r1, mkexpr(result));
7382
7383 return "shy";
7384}
7385
7386static HChar *
7387s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7388{
7389 IRTemp op2 = newTemp(Ity_I32);
7390 IRTemp op3 = newTemp(Ity_I32);
7391 IRTemp result = newTemp(Ity_I32);
7392
7393 assign(op2, get_gpr_w0(r1));
7394 assign(op3, get_gpr_w0(r2));
7395 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7396 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7397 put_gpr_w0(r1, mkexpr(result));
7398
7399 return "shhhr";
7400}
7401
7402static HChar *
7403s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7404{
7405 IRTemp op2 = newTemp(Ity_I32);
7406 IRTemp op3 = newTemp(Ity_I32);
7407 IRTemp result = newTemp(Ity_I32);
7408
7409 assign(op2, get_gpr_w0(r1));
7410 assign(op3, get_gpr_w1(r2));
7411 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7412 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7413 put_gpr_w0(r1, mkexpr(result));
7414
7415 return "shhlr";
7416}
7417
7418static HChar *
7419s390_irgen_SLR(UChar r1, UChar r2)
7420{
7421 IRTemp op1 = newTemp(Ity_I32);
7422 IRTemp op2 = newTemp(Ity_I32);
7423 IRTemp result = newTemp(Ity_I32);
7424
7425 assign(op1, get_gpr_w1(r1));
7426 assign(op2, get_gpr_w1(r2));
7427 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7428 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7429 put_gpr_w1(r1, mkexpr(result));
7430
7431 return "slr";
7432}
7433
7434static HChar *
7435s390_irgen_SLGR(UChar r1, UChar r2)
7436{
7437 IRTemp op1 = newTemp(Ity_I64);
7438 IRTemp op2 = newTemp(Ity_I64);
7439 IRTemp result = newTemp(Ity_I64);
7440
7441 assign(op1, get_gpr_dw0(r1));
7442 assign(op2, get_gpr_dw0(r2));
7443 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7444 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7445 put_gpr_dw0(r1, mkexpr(result));
7446
7447 return "slgr";
7448}
7449
7450static HChar *
7451s390_irgen_SLGFR(UChar r1, UChar r2)
7452{
7453 IRTemp op1 = newTemp(Ity_I64);
7454 IRTemp op2 = newTemp(Ity_I64);
7455 IRTemp result = newTemp(Ity_I64);
7456
7457 assign(op1, get_gpr_dw0(r1));
7458 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7459 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7460 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7461 put_gpr_dw0(r1, mkexpr(result));
7462
7463 return "slgfr";
7464}
7465
7466static HChar *
7467s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7468{
7469 IRTemp op2 = newTemp(Ity_I32);
7470 IRTemp op3 = newTemp(Ity_I32);
7471 IRTemp result = newTemp(Ity_I32);
7472
7473 assign(op2, get_gpr_w1(r2));
7474 assign(op3, get_gpr_w1(r3));
7475 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7476 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7477 put_gpr_w1(r1, mkexpr(result));
7478
7479 return "slrk";
7480}
7481
7482static HChar *
7483s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7484{
7485 IRTemp op2 = newTemp(Ity_I64);
7486 IRTemp op3 = newTemp(Ity_I64);
7487 IRTemp result = newTemp(Ity_I64);
7488
7489 assign(op2, get_gpr_dw0(r2));
7490 assign(op3, get_gpr_dw0(r3));
7491 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7492 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7493 put_gpr_dw0(r1, mkexpr(result));
7494
7495 return "slgrk";
7496}
7497
7498static HChar *
7499s390_irgen_SL(UChar r1, IRTemp op2addr)
7500{
7501 IRTemp op1 = newTemp(Ity_I32);
7502 IRTemp op2 = newTemp(Ity_I32);
7503 IRTemp result = newTemp(Ity_I32);
7504
7505 assign(op1, get_gpr_w1(r1));
7506 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7507 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7508 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7509 put_gpr_w1(r1, mkexpr(result));
7510
7511 return "sl";
7512}
7513
7514static HChar *
7515s390_irgen_SLY(UChar r1, IRTemp op2addr)
7516{
7517 IRTemp op1 = newTemp(Ity_I32);
7518 IRTemp op2 = newTemp(Ity_I32);
7519 IRTemp result = newTemp(Ity_I32);
7520
7521 assign(op1, get_gpr_w1(r1));
7522 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7523 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7524 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7525 put_gpr_w1(r1, mkexpr(result));
7526
7527 return "sly";
7528}
7529
7530static HChar *
7531s390_irgen_SLG(UChar r1, IRTemp op2addr)
7532{
7533 IRTemp op1 = newTemp(Ity_I64);
7534 IRTemp op2 = newTemp(Ity_I64);
7535 IRTemp result = newTemp(Ity_I64);
7536
7537 assign(op1, get_gpr_dw0(r1));
7538 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7539 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7540 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7541 put_gpr_dw0(r1, mkexpr(result));
7542
7543 return "slg";
7544}
7545
7546static HChar *
7547s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7548{
7549 IRTemp op1 = newTemp(Ity_I64);
7550 IRTemp op2 = newTemp(Ity_I64);
7551 IRTemp result = newTemp(Ity_I64);
7552
7553 assign(op1, get_gpr_dw0(r1));
7554 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7555 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7556 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7557 put_gpr_dw0(r1, mkexpr(result));
7558
7559 return "slgf";
7560}
7561
7562static HChar *
7563s390_irgen_SLFI(UChar r1, UInt i2)
7564{
7565 IRTemp op1 = newTemp(Ity_I32);
7566 UInt op2;
7567 IRTemp result = newTemp(Ity_I32);
7568
7569 assign(op1, get_gpr_w1(r1));
7570 op2 = i2;
7571 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7572 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7573 mkU32(op2)));
7574 put_gpr_w1(r1, mkexpr(result));
7575
7576 return "slfi";
7577}
7578
7579static HChar *
7580s390_irgen_SLGFI(UChar r1, UInt i2)
7581{
7582 IRTemp op1 = newTemp(Ity_I64);
7583 ULong op2;
7584 IRTemp result = newTemp(Ity_I64);
7585
7586 assign(op1, get_gpr_dw0(r1));
7587 op2 = (ULong)i2;
7588 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7589 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7590 mkU64(op2)));
7591 put_gpr_dw0(r1, mkexpr(result));
7592
7593 return "slgfi";
7594}
7595
7596static HChar *
7597s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7598{
7599 IRTemp op2 = newTemp(Ity_I32);
7600 IRTemp op3 = newTemp(Ity_I32);
7601 IRTemp result = newTemp(Ity_I32);
7602
7603 assign(op2, get_gpr_w0(r1));
7604 assign(op3, get_gpr_w0(r2));
7605 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7606 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7607 put_gpr_w0(r1, mkexpr(result));
7608
7609 return "slhhhr";
7610}
7611
7612static HChar *
7613s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7614{
7615 IRTemp op2 = newTemp(Ity_I32);
7616 IRTemp op3 = newTemp(Ity_I32);
7617 IRTemp result = newTemp(Ity_I32);
7618
7619 assign(op2, get_gpr_w0(r1));
7620 assign(op3, get_gpr_w1(r2));
7621 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7622 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7623 put_gpr_w0(r1, mkexpr(result));
7624
7625 return "slhhlr";
7626}
7627
7628static HChar *
7629s390_irgen_SLBR(UChar r1, UChar r2)
7630{
7631 IRTemp op1 = newTemp(Ity_I32);
7632 IRTemp op2 = newTemp(Ity_I32);
7633 IRTemp result = newTemp(Ity_I32);
7634 IRTemp borrow_in = newTemp(Ity_I32);
7635
7636 assign(op1, get_gpr_w1(r1));
7637 assign(op2, get_gpr_w1(r2));
7638 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7639 s390_call_calculate_cc(), mkU8(1))));
7640 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7641 mkexpr(borrow_in)));
7642 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7643 put_gpr_w1(r1, mkexpr(result));
7644
7645 return "slbr";
7646}
7647
7648static HChar *
7649s390_irgen_SLBGR(UChar r1, UChar r2)
7650{
7651 IRTemp op1 = newTemp(Ity_I64);
7652 IRTemp op2 = newTemp(Ity_I64);
7653 IRTemp result = newTemp(Ity_I64);
7654 IRTemp borrow_in = newTemp(Ity_I64);
7655
7656 assign(op1, get_gpr_dw0(r1));
7657 assign(op2, get_gpr_dw0(r2));
7658 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7659 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7660 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7661 mkexpr(borrow_in)));
7662 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7663 put_gpr_dw0(r1, mkexpr(result));
7664
7665 return "slbgr";
7666}
7667
7668static HChar *
7669s390_irgen_SLB(UChar r1, IRTemp op2addr)
7670{
7671 IRTemp op1 = newTemp(Ity_I32);
7672 IRTemp op2 = newTemp(Ity_I32);
7673 IRTemp result = newTemp(Ity_I32);
7674 IRTemp borrow_in = newTemp(Ity_I32);
7675
7676 assign(op1, get_gpr_w1(r1));
7677 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7678 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7679 s390_call_calculate_cc(), mkU8(1))));
7680 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7681 mkexpr(borrow_in)));
7682 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7683 put_gpr_w1(r1, mkexpr(result));
7684
7685 return "slb";
7686}
7687
7688static HChar *
7689s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7690{
7691 IRTemp op1 = newTemp(Ity_I64);
7692 IRTemp op2 = newTemp(Ity_I64);
7693 IRTemp result = newTemp(Ity_I64);
7694 IRTemp borrow_in = newTemp(Ity_I64);
7695
7696 assign(op1, get_gpr_dw0(r1));
7697 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7698 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7699 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7700 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7701 mkexpr(borrow_in)));
7702 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7703 put_gpr_dw0(r1, mkexpr(result));
7704
7705 return "slbg";
7706}
7707
7708static HChar *
7709s390_irgen_SVC(UChar i)
7710{
7711 IRTemp sysno = newTemp(Ity_I64);
7712
7713 if (i != 0) {
7714 assign(sysno, mkU64(i));
7715 } else {
7716 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7717 }
7718 system_call(mkexpr(sysno));
7719
7720 return "svc";
7721}
7722
7723static HChar *
7724s390_irgen_TS(IRTemp op2addr)
7725{
7726 IRTemp value = newTemp(Ity_I8);
7727
7728 assign(value, load(Ity_I8, mkexpr(op2addr)));
7729 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7730 store(mkexpr(op2addr), mkU8(255));
7731
7732 return "ts";
7733}
7734
7735static HChar *
7736s390_irgen_TM(UChar i2, IRTemp op1addr)
7737{
7738 UChar mask;
7739 IRTemp value = newTemp(Ity_I8);
7740
7741 mask = i2;
7742 assign(value, load(Ity_I8, mkexpr(op1addr)));
7743 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7744 mkU8(mask)));
7745
7746 return "tm";
7747}
7748
7749static HChar *
7750s390_irgen_TMY(UChar i2, IRTemp op1addr)
7751{
7752 UChar mask;
7753 IRTemp value = newTemp(Ity_I8);
7754
7755 mask = i2;
7756 assign(value, load(Ity_I8, mkexpr(op1addr)));
7757 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7758 mkU8(mask)));
7759
7760 return "tmy";
7761}
7762
7763static HChar *
7764s390_irgen_TMHH(UChar r1, UShort i2)
7765{
7766 UShort mask;
7767 IRTemp value = newTemp(Ity_I16);
7768
7769 mask = i2;
7770 assign(value, get_gpr_hw0(r1));
7771 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7772 mkU16(mask)));
7773
7774 return "tmhh";
7775}
7776
7777static HChar *
7778s390_irgen_TMHL(UChar r1, UShort i2)
7779{
7780 UShort mask;
7781 IRTemp value = newTemp(Ity_I16);
7782
7783 mask = i2;
7784 assign(value, get_gpr_hw1(r1));
7785 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7786 mkU16(mask)));
7787
7788 return "tmhl";
7789}
7790
7791static HChar *
7792s390_irgen_TMLH(UChar r1, UShort i2)
7793{
7794 UShort mask;
7795 IRTemp value = newTemp(Ity_I16);
7796
7797 mask = i2;
7798 assign(value, get_gpr_hw2(r1));
7799 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7800 mkU16(mask)));
7801
7802 return "tmlh";
7803}
7804
7805static HChar *
7806s390_irgen_TMLL(UChar r1, UShort i2)
7807{
7808 UShort mask;
7809 IRTemp value = newTemp(Ity_I16);
7810
7811 mask = i2;
7812 assign(value, get_gpr_hw3(r1));
7813 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7814 mkU16(mask)));
7815
7816 return "tmll";
7817}
7818
7819static HChar *
7820s390_irgen_EFPC(UChar r1)
7821{
7822 put_gpr_w1(r1, get_fpc_w0());
7823
7824 return "efpc";
7825}
7826
7827static HChar *
7828s390_irgen_LER(UChar r1, UChar r2)
7829{
7830 put_fpr_w0(r1, get_fpr_w0(r2));
7831
7832 return "ler";
7833}
7834
7835static HChar *
7836s390_irgen_LDR(UChar r1, UChar r2)
7837{
7838 put_fpr_dw0(r1, get_fpr_dw0(r2));
7839
7840 return "ldr";
7841}
7842
7843static HChar *
7844s390_irgen_LXR(UChar r1, UChar r2)
7845{
7846 put_fpr_dw0(r1, get_fpr_dw0(r2));
7847 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7848
7849 return "lxr";
7850}
7851
7852static HChar *
7853s390_irgen_LE(UChar r1, IRTemp op2addr)
7854{
7855 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7856
7857 return "le";
7858}
7859
7860static HChar *
7861s390_irgen_LD(UChar r1, IRTemp op2addr)
7862{
7863 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7864
7865 return "ld";
7866}
7867
7868static HChar *
7869s390_irgen_LEY(UChar r1, IRTemp op2addr)
7870{
7871 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7872
7873 return "ley";
7874}
7875
7876static HChar *
7877s390_irgen_LDY(UChar r1, IRTemp op2addr)
7878{
7879 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7880
7881 return "ldy";
7882}
7883
7884static HChar *
7885s390_irgen_LFPC(IRTemp op2addr)
7886{
7887 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
7888
7889 return "lfpc";
7890}
7891
7892static HChar *
7893s390_irgen_LZER(UChar r1)
7894{
7895 put_fpr_w0(r1, mkF32i(0x0));
7896
7897 return "lzer";
7898}
7899
7900static HChar *
7901s390_irgen_LZDR(UChar r1)
7902{
7903 put_fpr_dw0(r1, mkF64i(0x0));
7904
7905 return "lzdr";
7906}
7907
7908static HChar *
7909s390_irgen_LZXR(UChar r1)
7910{
7911 put_fpr_dw0(r1, mkF64i(0x0));
7912 put_fpr_dw0(r1 + 2, mkF64i(0x0));
7913
7914 return "lzxr";
7915}
7916
7917static HChar *
7918s390_irgen_SRNM(IRTemp op2addr)
7919{
7920 UInt mask;
7921
7922 mask = 3;
7923 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
7924 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
7925 );
7926
7927 return "srnm";
7928}
7929
7930static HChar *
7931s390_irgen_SFPC(UChar r1)
7932{
7933 put_fpc_w0(get_gpr_w1(r1));
7934
7935 return "sfpc";
7936}
7937
7938static HChar *
7939s390_irgen_STE(UChar r1, IRTemp op2addr)
7940{
7941 store(mkexpr(op2addr), get_fpr_w0(r1));
7942
7943 return "ste";
7944}
7945
7946static HChar *
7947s390_irgen_STD(UChar r1, IRTemp op2addr)
7948{
7949 store(mkexpr(op2addr), get_fpr_dw0(r1));
7950
7951 return "std";
7952}
7953
7954static HChar *
7955s390_irgen_STEY(UChar r1, IRTemp op2addr)
7956{
7957 store(mkexpr(op2addr), get_fpr_w0(r1));
7958
7959 return "stey";
7960}
7961
7962static HChar *
7963s390_irgen_STDY(UChar r1, IRTemp op2addr)
7964{
7965 store(mkexpr(op2addr), get_fpr_dw0(r1));
7966
7967 return "stdy";
7968}
7969
7970static HChar *
7971s390_irgen_STFPC(IRTemp op2addr)
7972{
7973 store(mkexpr(op2addr), get_fpc_w0());
7974
7975 return "stfpc";
7976}
7977
7978static HChar *
7979s390_irgen_AEBR(UChar r1, UChar r2)
7980{
7981 IRTemp op1 = newTemp(Ity_F32);
7982 IRTemp op2 = newTemp(Ity_F32);
7983 IRTemp result = newTemp(Ity_F32);
7984
7985 assign(op1, get_fpr_w0(r1));
7986 assign(op2, get_fpr_w0(r2));
7987 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
7988 mkexpr(op2)));
7989 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
7990 put_fpr_w0(r1, mkexpr(result));
7991
7992 return "aebr";
7993}
7994
7995static HChar *
7996s390_irgen_ADBR(UChar r1, UChar r2)
7997{
7998 IRTemp op1 = newTemp(Ity_F64);
7999 IRTemp op2 = newTemp(Ity_F64);
8000 IRTemp result = newTemp(Ity_F64);
8001
8002 assign(op1, get_fpr_dw0(r1));
8003 assign(op2, get_fpr_dw0(r2));
8004 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8005 mkexpr(op2)));
8006 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8007 put_fpr_dw0(r1, mkexpr(result));
8008
8009 return "adbr";
8010}
8011
8012static HChar *
8013s390_irgen_AEB(UChar r1, IRTemp op2addr)
8014{
8015 IRTemp op1 = newTemp(Ity_F32);
8016 IRTemp op2 = newTemp(Ity_F32);
8017 IRTemp result = newTemp(Ity_F32);
8018
8019 assign(op1, get_fpr_w0(r1));
8020 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8021 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8022 mkexpr(op2)));
8023 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8024 put_fpr_w0(r1, mkexpr(result));
8025
8026 return "aeb";
8027}
8028
8029static HChar *
8030s390_irgen_ADB(UChar r1, IRTemp op2addr)
8031{
8032 IRTemp op1 = newTemp(Ity_F64);
8033 IRTemp op2 = newTemp(Ity_F64);
8034 IRTemp result = newTemp(Ity_F64);
8035
8036 assign(op1, get_fpr_dw0(r1));
8037 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8038 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8039 mkexpr(op2)));
8040 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8041 put_fpr_dw0(r1, mkexpr(result));
8042
8043 return "adb";
8044}
8045
8046static HChar *
8047s390_irgen_CEFBR(UChar r1, UChar r2)
8048{
8049 IRTemp op2 = newTemp(Ity_I32);
8050
8051 assign(op2, get_gpr_w1(r2));
8052 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8053
8054 return "cefbr";
8055}
8056
8057static HChar *
8058s390_irgen_CDFBR(UChar r1, UChar r2)
8059{
8060 IRTemp op2 = newTemp(Ity_I32);
8061
8062 assign(op2, get_gpr_w1(r2));
8063 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8064
8065 return "cdfbr";
8066}
8067
8068static HChar *
8069s390_irgen_CEGBR(UChar r1, UChar r2)
8070{
8071 IRTemp op2 = newTemp(Ity_I64);
8072
8073 assign(op2, get_gpr_dw0(r2));
8074 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8075
8076 return "cegbr";
8077}
8078
8079static HChar *
8080s390_irgen_CDGBR(UChar r1, UChar r2)
8081{
8082 IRTemp op2 = newTemp(Ity_I64);
8083
8084 assign(op2, get_gpr_dw0(r2));
8085 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8086
8087 return "cdgbr";
8088}
8089
8090static HChar *
8091s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8092{
8093 IRTemp op = newTemp(Ity_F32);
8094 IRTemp result = newTemp(Ity_I32);
8095
8096 assign(op, get_fpr_w0(r2));
8097 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8098 mkexpr(op)));
8099 put_gpr_w1(r1, mkexpr(result));
8100 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8101
8102 return "cfebr";
8103}
8104
8105static HChar *
8106s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8107{
8108 IRTemp op = newTemp(Ity_F64);
8109 IRTemp result = newTemp(Ity_I32);
8110
8111 assign(op, get_fpr_dw0(r2));
8112 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8113 mkexpr(op)));
8114 put_gpr_w1(r1, mkexpr(result));
8115 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8116
8117 return "cfdbr";
8118}
8119
8120static HChar *
8121s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8122{
8123 IRTemp op = newTemp(Ity_F32);
8124 IRTemp result = newTemp(Ity_I64);
8125
8126 assign(op, get_fpr_w0(r2));
8127 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8128 mkexpr(op)));
8129 put_gpr_dw0(r1, mkexpr(result));
8130 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8131
8132 return "cgebr";
8133}
8134
8135static HChar *
8136s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8137{
8138 IRTemp op = newTemp(Ity_F64);
8139 IRTemp result = newTemp(Ity_I64);
8140
8141 assign(op, get_fpr_dw0(r2));
8142 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8143 mkexpr(op)));
8144 put_gpr_dw0(r1, mkexpr(result));
8145 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8146
8147 return "cgdbr";
8148}
8149
8150static HChar *
8151s390_irgen_DEBR(UChar r1, UChar r2)
8152{
8153 IRTemp op1 = newTemp(Ity_F32);
8154 IRTemp op2 = newTemp(Ity_F32);
8155 IRTemp result = newTemp(Ity_F32);
8156
8157 assign(op1, get_fpr_w0(r1));
8158 assign(op2, get_fpr_w0(r2));
8159 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8160 mkexpr(op2)));
8161 put_fpr_w0(r1, mkexpr(result));
8162
8163 return "debr";
8164}
8165
8166static HChar *
8167s390_irgen_DDBR(UChar r1, UChar r2)
8168{
8169 IRTemp op1 = newTemp(Ity_F64);
8170 IRTemp op2 = newTemp(Ity_F64);
8171 IRTemp result = newTemp(Ity_F64);
8172
8173 assign(op1, get_fpr_dw0(r1));
8174 assign(op2, get_fpr_dw0(r2));
8175 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8176 mkexpr(op2)));
8177 put_fpr_dw0(r1, mkexpr(result));
8178
8179 return "ddbr";
8180}
8181
8182static HChar *
8183s390_irgen_DEB(UChar r1, IRTemp op2addr)
8184{
8185 IRTemp op1 = newTemp(Ity_F32);
8186 IRTemp op2 = newTemp(Ity_F32);
8187 IRTemp result = newTemp(Ity_F32);
8188
8189 assign(op1, get_fpr_w0(r1));
8190 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8191 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8192 mkexpr(op2)));
8193 put_fpr_w0(r1, mkexpr(result));
8194
8195 return "deb";
8196}
8197
8198static HChar *
8199s390_irgen_DDB(UChar r1, IRTemp op2addr)
8200{
8201 IRTemp op1 = newTemp(Ity_F64);
8202 IRTemp op2 = newTemp(Ity_F64);
8203 IRTemp result = newTemp(Ity_F64);
8204
8205 assign(op1, get_fpr_dw0(r1));
8206 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8207 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8208 mkexpr(op2)));
8209 put_fpr_dw0(r1, mkexpr(result));
8210
8211 return "ddb";
8212}
8213
8214static HChar *
8215s390_irgen_LTEBR(UChar r1, UChar r2)
8216{
8217 IRTemp result = newTemp(Ity_F32);
8218
8219 assign(result, get_fpr_w0(r2));
8220 put_fpr_w0(r1, mkexpr(result));
8221 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8222
8223 return "ltebr";
8224}
8225
8226static HChar *
8227s390_irgen_LTDBR(UChar r1, UChar r2)
8228{
8229 IRTemp result = newTemp(Ity_F64);
8230
8231 assign(result, get_fpr_dw0(r2));
8232 put_fpr_dw0(r1, mkexpr(result));
8233 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8234
8235 return "ltdbr";
8236}
8237
8238static HChar *
8239s390_irgen_LCEBR(UChar r1, UChar r2)
8240{
8241 IRTemp result = newTemp(Ity_F32);
8242
8243 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8244 put_fpr_w0(r1, mkexpr(result));
8245 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8246
8247 return "lcebr";
8248}
8249
8250static HChar *
8251s390_irgen_LCDBR(UChar r1, UChar r2)
8252{
8253 IRTemp result = newTemp(Ity_F64);
8254
8255 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8256 put_fpr_dw0(r1, mkexpr(result));
8257 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8258
8259 return "lcdbr";
8260}
8261
8262static HChar *
8263s390_irgen_LDEBR(UChar r1, UChar r2)
8264{
8265 IRTemp op = newTemp(Ity_F32);
8266
8267 assign(op, get_fpr_w0(r2));
8268 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8269
8270 return "ldebr";
8271}
8272
8273static HChar *
8274s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8275{
8276 IRTemp op = newTemp(Ity_F32);
8277
8278 assign(op, load(Ity_F32, mkexpr(op2addr)));
8279 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8280
8281 return "ldeb";
8282}
8283
8284static HChar *
8285s390_irgen_LEDBR(UChar r1, UChar r2)
8286{
8287 IRTemp op = newTemp(Ity_F64);
8288
8289 assign(op, get_fpr_dw0(r2));
8290 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8291
8292 return "ledbr";
8293}
8294
8295static HChar *
8296s390_irgen_MEEBR(UChar r1, UChar r2)
8297{
8298 IRTemp op1 = newTemp(Ity_F32);
8299 IRTemp op2 = newTemp(Ity_F32);
8300 IRTemp result = newTemp(Ity_F32);
8301
8302 assign(op1, get_fpr_w0(r1));
8303 assign(op2, get_fpr_w0(r2));
8304 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8305 mkexpr(op2)));
8306 put_fpr_w0(r1, mkexpr(result));
8307
8308 return "meebr";
8309}
8310
8311static HChar *
8312s390_irgen_MDBR(UChar r1, UChar r2)
8313{
8314 IRTemp op1 = newTemp(Ity_F64);
8315 IRTemp op2 = newTemp(Ity_F64);
8316 IRTemp result = newTemp(Ity_F64);
8317
8318 assign(op1, get_fpr_dw0(r1));
8319 assign(op2, get_fpr_dw0(r2));
8320 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8321 mkexpr(op2)));
8322 put_fpr_dw0(r1, mkexpr(result));
8323
8324 return "mdbr";
8325}
8326
8327static HChar *
8328s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8329{
8330 IRTemp op1 = newTemp(Ity_F32);
8331 IRTemp op2 = newTemp(Ity_F32);
8332 IRTemp result = newTemp(Ity_F32);
8333
8334 assign(op1, get_fpr_w0(r1));
8335 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8336 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8337 mkexpr(op2)));
8338 put_fpr_w0(r1, mkexpr(result));
8339
8340 return "meeb";
8341}
8342
8343static HChar *
8344s390_irgen_MDB(UChar r1, IRTemp op2addr)
8345{
8346 IRTemp op1 = newTemp(Ity_F64);
8347 IRTemp op2 = newTemp(Ity_F64);
8348 IRTemp result = newTemp(Ity_F64);
8349
8350 assign(op1, get_fpr_dw0(r1));
8351 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8352 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8353 mkexpr(op2)));
8354 put_fpr_dw0(r1, mkexpr(result));
8355
8356 return "mdb";
8357}
8358
8359static HChar *
8360s390_irgen_SEBR(UChar r1, UChar r2)
8361{
8362 IRTemp op1 = newTemp(Ity_F32);
8363 IRTemp op2 = newTemp(Ity_F32);
8364 IRTemp result = newTemp(Ity_F32);
8365
8366 assign(op1, get_fpr_w0(r1));
8367 assign(op2, get_fpr_w0(r2));
8368 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8369 mkexpr(op2)));
8370 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8371 put_fpr_w0(r1, mkexpr(result));
8372
8373 return "sebr";
8374}
8375
8376static HChar *
8377s390_irgen_SDBR(UChar r1, UChar r2)
8378{
8379 IRTemp op1 = newTemp(Ity_F64);
8380 IRTemp op2 = newTemp(Ity_F64);
8381 IRTemp result = newTemp(Ity_F64);
8382
8383 assign(op1, get_fpr_dw0(r1));
8384 assign(op2, get_fpr_dw0(r2));
8385 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8386 mkexpr(op2)));
8387 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8388 put_fpr_dw0(r1, mkexpr(result));
8389
8390 return "sdbr";
8391}
8392
8393static HChar *
8394s390_irgen_SEB(UChar r1, IRTemp op2addr)
8395{
8396 IRTemp op1 = newTemp(Ity_F32);
8397 IRTemp op2 = newTemp(Ity_F32);
8398 IRTemp result = newTemp(Ity_F32);
8399
8400 assign(op1, get_fpr_w0(r1));
8401 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8402 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8403 mkexpr(op2)));
8404 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8405 put_fpr_w0(r1, mkexpr(result));
8406
8407 return "seb";
8408}
8409
8410static HChar *
8411s390_irgen_SDB(UChar r1, IRTemp op2addr)
8412{
8413 IRTemp op1 = newTemp(Ity_F64);
8414 IRTemp op2 = newTemp(Ity_F64);
8415 IRTemp result = newTemp(Ity_F64);
8416
8417 assign(op1, get_fpr_dw0(r1));
8418 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8419 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8420 mkexpr(op2)));
8421 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8422 put_fpr_dw0(r1, mkexpr(result));
8423
8424 return "sdb";
8425}
8426
8427
8428static HChar *
8429s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8430{
8431 IRTemp current1 = newTemp(Ity_I8);
8432 IRTemp current2 = newTemp(Ity_I8);
8433 IRTemp counter = newTemp(Ity_I64);
8434
8435 assign(counter, get_counter_dw0());
8436 put_counter_dw0(mkU64(0));
8437
8438 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8439 mkexpr(counter))));
8440 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8441 mkexpr(counter))));
8442 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8443 False);
8444
8445 /* Both fields differ ? */
8446 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8447 guest_IA_next_instr);
8448
8449 /* Check for end of field */
8450 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8451 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8452 guest_IA_curr_instr);
8453 put_counter_dw0(mkU64(0));
8454
8455 return "clc";
8456}
8457
8458static HChar *
8459s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8460{
8461 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8462
8463 addr1 = newTemp(Ity_I64);
8464 addr3 = newTemp(Ity_I64);
8465 addr1_load = newTemp(Ity_I64);
8466 addr3_load = newTemp(Ity_I64);
8467 len1 = newTemp(Ity_I64);
8468 len3 = newTemp(Ity_I64);
8469 single1 = newTemp(Ity_I8);
8470 single3 = newTemp(Ity_I8);
8471
8472 assign(addr1, get_gpr_dw0(r1));
8473 assign(len1, get_gpr_dw0(r1 + 1));
8474 assign(addr3, get_gpr_dw0(r3));
8475 assign(len3, get_gpr_dw0(r3 + 1));
8476
8477 /* len1 == 0 and len3 == 0? Exit */
8478 s390_cc_set(0);
8479 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8480 mkexpr(len3)), mkU64(0)),
8481 guest_IA_next_instr);
8482
8483 /* A mux requires both ways to be possible. This is a way to prevent clcle
8484 from reading from addr1 if it should read from the pad. Since the pad
8485 has no address, just read from the instruction, we discard that anyway */
8486 assign(addr1_load,
8487 IRExpr_Mux0X(unop(Iop_1Uto8,
8488 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8489 mkexpr(addr1),
8490 mkU64(guest_IA_curr_instr)));
8491
8492 /* same for addr3 */
8493 assign(addr3_load,
8494 IRExpr_Mux0X(unop(Iop_1Uto8,
8495 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8496 mkexpr(addr3),
8497 mkU64(guest_IA_curr_instr)));
8498
8499 assign(single1,
8500 IRExpr_Mux0X(unop(Iop_1Uto8,
8501 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8502 load(Ity_I8, mkexpr(addr1_load)),
8503 unop(Iop_64to8, mkexpr(pad2))));
8504
8505 assign(single3,
8506 IRExpr_Mux0X(unop(Iop_1Uto8,
8507 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8508 load(Ity_I8, mkexpr(addr3_load)),
8509 unop(Iop_64to8, mkexpr(pad2))));
8510
8511 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8512 /* Both fields differ ? */
8513 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8514 guest_IA_next_instr);
8515
8516 /* If a length in 0 we must not change this length and the address */
8517 put_gpr_dw0(r1,
8518 IRExpr_Mux0X(unop(Iop_1Uto8,
8519 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8520 binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
8521 mkexpr(addr1)));
8522
8523 put_gpr_dw0(r1 + 1,
8524 IRExpr_Mux0X(unop(Iop_1Uto8,
8525 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8526 binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
8527 mkU64(0)));
8528
8529 put_gpr_dw0(r3,
8530 IRExpr_Mux0X(unop(Iop_1Uto8,
8531 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8532 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
8533 mkexpr(addr3)));
8534
8535 put_gpr_dw0(r3 + 1,
8536 IRExpr_Mux0X(unop(Iop_1Uto8,
8537 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8538 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
8539 mkU64(0)));
8540
8541 /* The architecture requires that we exit with CC3 after a machine specific
8542 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8543 s390_cc_set(3);
8544 if_condition_goto(binop(Iop_CmpEQ64,
8545 binop(Iop_And64,
8546 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8547 mkU64(0xfff)),
8548 mkU64(0)),
8549 guest_IA_next_instr);
8550
8551 always_goto(mkU64(guest_IA_curr_instr));
8552
8553 return "clcle";
8554}
8555static void
8556s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8557{
8558 IRTemp old1 = newTemp(Ity_I8);
8559 IRTemp old2 = newTemp(Ity_I8);
8560 IRTemp new1 = newTemp(Ity_I8);
8561 IRTemp counter = newTemp(Ity_I32);
8562 IRTemp addr1 = newTemp(Ity_I64);
8563
8564 assign(counter, get_counter_w0());
8565
8566 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8567 unop(Iop_32Uto64, mkexpr(counter))));
8568
8569 assign(old1, load(Ity_I8, mkexpr(addr1)));
8570 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8571 unop(Iop_32Uto64,mkexpr(counter)))));
8572 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8573
8574 store(mkexpr(addr1),
8575 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
8576 mkexpr(start2))),
8577 mkexpr(new1), mkU8(0)));
8578 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8579 get_counter_w1()));
8580
8581 /* Check for end of field */
8582 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8583 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8584 guest_IA_curr_instr);
8585 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8586 False);
8587 put_counter_dw0(mkU64(0));
8588}
8589
8590
8591static void
8592s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8593{
8594 IRTemp current1 = newTemp(Ity_I8);
8595 IRTemp current2 = newTemp(Ity_I8);
8596 IRTemp counter = newTemp(Ity_I64);
8597
8598 assign(counter, get_counter_dw0());
8599 put_counter_dw0(mkU64(0));
8600
8601 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8602 mkexpr(counter))));
8603 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8604 mkexpr(counter))));
8605 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8606 False);
8607
8608 /* Both fields differ ? */
8609 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8610 guest_IA_next_instr);
8611
8612 /* Check for end of field */
8613 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8614 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8615 guest_IA_curr_instr);
8616 put_counter_dw0(mkU64(0));
8617}
8618
8619static void
8620s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8621{
8622 IRTemp counter = newTemp(Ity_I64);
8623
8624 assign(counter, get_counter_dw0());
8625
8626 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8627 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8628
8629 /* Check for end of field */
8630 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8631 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8632 guest_IA_curr_instr);
8633 put_counter_dw0(mkU64(0));
8634}
8635
8636
8637
8638static void
8639s390_irgen_EX_SS(UChar r, IRTemp addr2,
8640void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8641{
8642 struct SS {
8643 unsigned int op : 8;
8644 unsigned int l : 8;
8645 unsigned int b1 : 4;
8646 unsigned int d1 : 12;
8647 unsigned int b2 : 4;
8648 unsigned int d2 : 12;
8649 };
8650 union {
8651 struct SS dec;
8652 unsigned long bytes;
8653 } ss;
8654 IRTemp cond;
8655 IRDirty *d;
8656 IRTemp torun;
8657
8658 IRTemp start1 = newTemp(Ity_I64);
8659 IRTemp start2 = newTemp(Ity_I64);
8660 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8661 cond = newTemp(Ity_I1);
8662 torun = newTemp(Ity_I64);
8663
8664 assign(torun, load(Ity_I64, mkexpr(addr2)));
8665 /* Start with a check that the saved code is still correct */
8666 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8667 /* If not, save the new value */
8668 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8669 mkIRExprVec_1(mkexpr(torun)));
8670 d->guard = mkexpr(cond);
8671 stmt(IRStmt_Dirty(d));
8672
8673 /* and restart */
8674 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8675 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8676 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8677 IRConst_U64(guest_IA_curr_instr)));
8678
8679 ss.bytes = last_execute_target;
8680 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8681 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8682 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8683 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8684 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8685 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8686 irgen(len, start1, start2);
8687 last_execute_target = 0;
8688}
8689
8690static HChar *
8691s390_irgen_EX(UChar r1, IRTemp addr2)
8692{
8693 switch(last_execute_target & 0xff00000000000000ULL) {
8694 case 0:
8695 {
8696 /* no code information yet */
8697 IRDirty *d;
8698
8699 /* so safe the code... */
8700 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8701 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8702 stmt(IRStmt_Dirty(d));
8703 /* and restart */
8704 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8705 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8706 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8707 IRConst_U64(guest_IA_curr_instr)));
8708 /* we know that this will be invalidated */
8709 irsb->next = mkU64(guest_IA_next_instr);
8710 dis_res->whatNext = Dis_StopHere;
8711 break;
8712 }
8713
8714 case 0xd200000000000000ULL:
8715 /* special case MVC */
8716 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8717 return "mvc via ex";
8718
8719 case 0xd500000000000000ULL:
8720 /* special case CLC */
8721 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8722 return "clc via ex";
8723
8724 case 0xd700000000000000ULL:
8725 /* special case XC */
8726 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8727 return "xc via ex";
8728
8729
8730 default:
8731 {
8732 /* everything else will get a self checking prefix that also checks the
8733 register content */
8734 IRDirty *d;
8735 UChar *bytes;
8736 IRTemp cond;
8737 IRTemp orperand;
8738 IRTemp torun;
8739
8740 cond = newTemp(Ity_I1);
8741 orperand = newTemp(Ity_I64);
8742 torun = newTemp(Ity_I64);
8743
8744 if (r1 == 0)
8745 assign(orperand, mkU64(0));
8746 else
8747 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8748 /* This code is going to be translated */
8749 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8750 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8751
8752 /* Start with a check that saved code is still correct */
8753 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8754 mkU64(last_execute_target)));
8755 /* If not, save the new value */
8756 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8757 mkIRExprVec_1(mkexpr(torun)));
8758 d->guard = mkexpr(cond);
8759 stmt(IRStmt_Dirty(d));
8760
8761 /* and restart */
8762 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8763 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8764 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8765 IRConst_U64(guest_IA_curr_instr)));
8766
8767 /* Now comes the actual translation */
8768 bytes = (UChar *) &last_execute_target;
8769 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8770 dis_res);
8771 if (unlikely(vex_traceflags & VEX_TRACE_FE))
8772 vex_printf(" which was executed by\n");
8773 /* dont make useless translations in the next execute */
8774 last_execute_target = 0;
8775 }
8776 }
8777 return "ex";
8778}
8779
8780static HChar *
8781s390_irgen_EXRL(UChar r1, UInt offset)
8782{
8783 IRTemp addr = newTemp(Ity_I64);
8784 /* we might save one round trip because we know the target */
8785 if (!last_execute_target)
8786 last_execute_target = *(ULong *)(HWord)
8787 (guest_IA_curr_instr + offset * 2UL);
8788 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8789 s390_irgen_EX(r1, addr);
8790 return "exrl";
8791}
8792
8793static HChar *
8794s390_irgen_IPM(UChar r1)
8795{
8796 // As long as we dont support SPM, lets just assume 0 as program mask
8797 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
8798 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
8799
8800 return "ipm";
8801}
8802
8803
8804static HChar *
8805s390_irgen_SRST(UChar r1, UChar r2)
8806{
8807 IRTemp address = newTemp(Ity_I64);
8808 IRTemp next = newTemp(Ity_I64);
8809 IRTemp delim = newTemp(Ity_I8);
8810 IRTemp counter = newTemp(Ity_I64);
8811 IRTemp byte = newTemp(Ity_I8);
8812
8813 assign(address, get_gpr_dw0(r2));
8814 assign(next, get_gpr_dw0(r1));
8815
8816 assign(counter, get_counter_dw0());
8817 put_counter_dw0(mkU64(0));
8818
8819 // start = next? CC=2 and out r1 and r2 unchanged
8820 s390_cc_set(2);
8821 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
8822 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
8823 guest_IA_next_instr);
8824
8825 assign(byte, load(Ity_I8, mkexpr(address)));
8826 assign(delim, get_gpr_b7(0));
8827
8828 // byte = delim? CC=1, R1=address
8829 s390_cc_set(1);
8830 put_gpr_dw0(r1, mkexpr(address));
8831 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
8832 guest_IA_next_instr);
8833
8834 // else: all equal, no end yet, loop
8835 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8836 put_gpr_dw0(r1, mkexpr(next));
8837 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
8838 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8839 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8840 // >= 256 bytes done CC=3
8841 s390_cc_set(3);
8842 put_counter_dw0(mkU64(0));
8843
8844 return "srst";
8845}
8846
8847static HChar *
8848s390_irgen_CLST(UChar r1, UChar r2)
8849{
8850 IRTemp address1 = newTemp(Ity_I64);
8851 IRTemp address2 = newTemp(Ity_I64);
8852 IRTemp end = newTemp(Ity_I8);
8853 IRTemp counter = newTemp(Ity_I64);
8854 IRTemp byte1 = newTemp(Ity_I8);
8855 IRTemp byte2 = newTemp(Ity_I8);
8856
8857 assign(address1, get_gpr_dw0(r1));
8858 assign(address2, get_gpr_dw0(r2));
8859 assign(end, get_gpr_b7(0));
8860 assign(counter, get_counter_dw0());
8861 put_counter_dw0(mkU64(0));
8862 assign(byte1, load(Ity_I8, mkexpr(address1)));
8863 assign(byte2, load(Ity_I8, mkexpr(address2)));
8864
8865 // end in both? all equal, reset r1 and r2 to start values
8866 s390_cc_set(0);
8867 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
8868 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
8869 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
8870 binop(Iop_Or8,
8871 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
8872 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
8873 guest_IA_next_instr);
8874
8875 put_gpr_dw0(r1, mkexpr(address1));
8876 put_gpr_dw0(r2, mkexpr(address2));
8877
8878 // End found in string1
8879 s390_cc_set(1);
8880 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
8881 guest_IA_next_instr);
8882
8883 // End found in string2
8884 s390_cc_set(2);
8885 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
8886 guest_IA_next_instr);
8887
8888 // string1 < string2
8889 s390_cc_set(1);
8890 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
8891 unop(Iop_8Uto32, mkexpr(byte2))),
8892 guest_IA_next_instr);
8893
8894 // string2 < string1
8895 s390_cc_set(2);
8896 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
8897 unop(Iop_8Uto32, mkexpr(byte1))),
8898 guest_IA_next_instr);
8899
8900 // else: all equal, no end yet, loop
8901 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8902 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
8903 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
8904 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8905 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8906 // >= 256 bytes done CC=3
8907 s390_cc_set(3);
8908 put_counter_dw0(mkU64(0));
8909
8910 return "clst";
8911}
8912
8913static void
8914s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
8915{
8916 UChar reg;
8917 IRTemp addr = newTemp(Ity_I64);
8918
8919 assign(addr, mkexpr(op2addr));
8920 reg = r1;
8921 do {
8922 IRTemp old = addr;
8923
8924 reg %= 16;
8925 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
8926 addr = newTemp(Ity_I64);
8927 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
8928 reg++;
8929 } while (reg != (r3 + 1));
8930}
8931
8932static HChar *
8933s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
8934{
8935 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
8936
8937 return "lm";
8938}
8939
8940static HChar *
8941s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
8942{
8943 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
8944
8945 return "lmy";
8946}
8947
8948static HChar *
8949s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
8950{
8951 UChar reg;
8952 IRTemp addr = newTemp(Ity_I64);
8953
8954 assign(addr, mkexpr(op2addr));
8955 reg = r1;
8956 do {
8957 IRTemp old = addr;
8958
8959 reg %= 16;
8960 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
8961 addr = newTemp(Ity_I64);
8962 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
8963 reg++;
8964 } while (reg != (r3 + 1));
8965
8966 return "lmh";
8967}
8968
8969static HChar *
8970s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
8971{
8972 UChar reg;
8973 IRTemp addr = newTemp(Ity_I64);
8974
8975 assign(addr, mkexpr(op2addr));
8976 reg = r1;
8977 do {
8978 IRTemp old = addr;
8979
8980 reg %= 16;
8981 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
8982 addr = newTemp(Ity_I64);
8983 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
8984 reg++;
8985 } while (reg != (r3 + 1));
8986
8987 return "lmg";
8988}
8989
8990static void
8991s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
8992{
8993 UChar reg;
8994 IRTemp addr = newTemp(Ity_I64);
8995
8996 assign(addr, mkexpr(op2addr));
8997 reg = r1;
8998 do {
8999 IRTemp old = addr;
9000
9001 reg %= 16;
9002 store(mkexpr(addr), get_gpr_w1(reg));
9003 addr = newTemp(Ity_I64);
9004 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9005 reg++;
9006 } while( reg != (r3 + 1));
9007}
9008
9009static HChar *
9010s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9011{
9012 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9013
9014 return "stm";
9015}
9016
9017static HChar *
9018s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9019{
9020 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9021
9022 return "stmy";
9023}
9024
9025static HChar *
9026s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9027{
9028 UChar reg;
9029 IRTemp addr = newTemp(Ity_I64);
9030
9031 assign(addr, mkexpr(op2addr));
9032 reg = r1;
9033 do {
9034 IRTemp old = addr;
9035
9036 reg %= 16;
9037 store(mkexpr(addr), get_gpr_w0(reg));
9038 addr = newTemp(Ity_I64);
9039 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9040 reg++;
9041 } while( reg != (r3 + 1));
9042
9043 return "stmh";
9044}
9045
9046static HChar *
9047s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9048{
9049 UChar reg;
9050 IRTemp addr = newTemp(Ity_I64);
9051
9052 assign(addr, mkexpr(op2addr));
9053 reg = r1;
9054 do {
9055 IRTemp old = addr;
9056
9057 reg %= 16;
9058 store(mkexpr(addr), get_gpr_dw0(reg));
9059 addr = newTemp(Ity_I64);
9060 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9061 reg++;
9062 } while( reg != (r3 + 1));
9063
9064 return "stmg";
9065}
9066
9067static void
9068s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9069{
9070 IRTemp old1 = newTemp(Ity_I8);
9071 IRTemp old2 = newTemp(Ity_I8);
9072 IRTemp new1 = newTemp(Ity_I8);
9073 IRTemp counter = newTemp(Ity_I32);
9074 IRTemp addr1 = newTemp(Ity_I64);
9075
9076 assign(counter, get_counter_w0());
9077
9078 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9079 unop(Iop_32Uto64, mkexpr(counter))));
9080
9081 assign(old1, load(Ity_I8, mkexpr(addr1)));
9082 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9083 unop(Iop_32Uto64,mkexpr(counter)))));
9084 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9085
9086 /* Special case: xc is used to zero memory */
9087 /* fixs390: we also want an instrumentation time shortcut */
9088 if (op == Iop_Xor8) {
9089 store(mkexpr(addr1),
9090 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
9091 mkexpr(start2))),
9092 mkexpr(new1), mkU8(0)));
9093 } else
9094 store(mkexpr(addr1), mkexpr(new1));
9095 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9096 get_counter_w1()));
9097
9098 /* Check for end of field */
9099 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9100 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9101 guest_IA_curr_instr);
9102 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9103 False);
9104 put_counter_dw0(mkU64(0));
9105}
9106
9107static HChar *
9108s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9109{
9110 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9111
9112 return "xc";
9113}
9114
sewardjb63967e2011-03-24 08:50:04 +00009115static void
9116s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9117{
9118 IRTemp counter = newTemp(Ity_I32);
9119 IRTemp start = newTemp(Ity_I64);
9120 IRTemp addr = newTemp(Ity_I64);
9121
9122 assign(start,
9123 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9124
9125 if (length < 8) {
9126 UInt i;
9127
9128 for (i = 0; i <= length; ++i) {
9129 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9130 }
9131 } else {
9132 assign(counter, get_counter_w0());
9133
9134 assign(addr, binop(Iop_Add64, mkexpr(start),
9135 unop(Iop_32Uto64, mkexpr(counter))));
9136
9137 store(mkexpr(addr), mkU8(0));
9138
9139 /* Check for end of field */
9140 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9141 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9142 guest_IA_curr_instr);
9143
9144 /* Reset counter */
9145 put_counter_dw0(mkU64(0));
9146 }
9147
9148 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9149
9150 if (unlikely(vex_traceflags & VEX_TRACE_FE))
9151 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9152}
9153
sewardj2019a972011-03-07 16:04:07 +00009154static HChar *
9155s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9156{
9157 s390_irgen_XONC(Iop_And8, length, start1, start2);
9158
9159 return "nc";
9160}
9161
9162static HChar *
9163s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9164{
9165 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9166
9167 return "oc";
9168}
9169
9170
9171static HChar *
9172s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9173{
9174 IRTemp counter = newTemp(Ity_I64);
9175
9176 assign(counter, get_counter_dw0());
9177
9178 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9179 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9180
9181 /* Check for end of field */
9182 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9183 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9184 guest_IA_curr_instr);
9185 put_counter_dw0(mkU64(0));
9186
9187 return "mvc";
9188}
9189
9190static HChar *
9191s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9192{
9193 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9194
9195 addr1 = newTemp(Ity_I64);
9196 addr3 = newTemp(Ity_I64);
9197 addr3_load = newTemp(Ity_I64);
9198 len1 = newTemp(Ity_I64);
9199 len3 = newTemp(Ity_I64);
9200 single = newTemp(Ity_I8);
9201
9202 assign(addr1, get_gpr_dw0(r1));
9203 assign(len1, get_gpr_dw0(r1 + 1));
9204 assign(addr3, get_gpr_dw0(r3));
9205 assign(len3, get_gpr_dw0(r3 + 1));
9206
9207 // len1 == 0 ?
9208 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9209 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9210 guest_IA_next_instr);
9211
9212 /* This is a hack to prevent mvcle from reading from addr3 if it
9213 should read from the pad. Since the pad has no address, just
9214 read from the instruction, we discard that anyway */
9215 assign(addr3_load,
9216 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9217 mkU64(0))),
9218 mkexpr(addr3),
9219 mkU64(guest_IA_curr_instr)));
9220
9221 assign(single,
9222 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9223 mkU64(0))),
9224 load(Ity_I8, mkexpr(addr3_load)),
9225 unop(Iop_64to8, mkexpr(pad2))));
9226 store(mkexpr(addr1), mkexpr(single));
9227
9228 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9229
9230 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9231
9232 put_gpr_dw0(r3,
9233 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9234 mkU64(0))),
9235 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
9236 mkexpr(addr3)));
9237
9238 put_gpr_dw0(r3 + 1,
9239 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9240 mkU64(0))),
9241 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
9242 mkU64(0)));
9243
9244 /* We should set CC=3 (faked by overflow add) and leave after
9245 a maximum of ~4096 bytes have been processed. This is simpler:
9246 we leave whenever (len1 % 4096) == 0 */
9247 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
9248
9249 mktemp(Ity_I64, mkU64(-1ULL)), False);
9250 if_condition_goto(binop(Iop_CmpEQ64,
9251 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9252 mkU64(0)),
9253 guest_IA_next_instr);
9254
9255 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9256 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9257 guest_IA_curr_instr);
9258
9259 return "mvcle";
9260}
9261
9262static HChar *
9263s390_irgen_MVST(UChar r1, UChar r2)
9264{
9265 IRTemp addr1 = newTemp(Ity_I64);
9266 IRTemp addr2 = newTemp(Ity_I64);
9267 IRTemp end = newTemp(Ity_I8);
9268 IRTemp byte = newTemp(Ity_I8);
9269 IRTemp counter = newTemp(Ity_I64);
9270
9271 assign(addr1, get_gpr_dw0(r1));
9272 assign(addr2, get_gpr_dw0(r2));
9273 assign(counter, get_counter_dw0());
9274 assign(end, get_gpr_b7(0));
9275 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9276 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9277
9278 // We use unlimited as cpu-determined number
9279 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9280 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9281 guest_IA_curr_instr);
9282
9283 // and always set cc=1 at the end + update r1
9284 s390_cc_set(1);
9285 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9286 put_counter_dw0(mkU64(0));
9287
9288 return "mvst";
9289}
9290
9291static void
9292s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9293{
9294 IRTemp op1 = newTemp(Ity_I64);
9295 IRTemp result = newTemp(Ity_I64);
9296
9297 assign(op1, binop(Iop_32HLto64,
9298 get_gpr_w1(r1), // high 32 bits
9299 get_gpr_w1(r1 + 1))); // low 32 bits
9300 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9301 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9302 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9303}
9304
9305static void
9306s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9307{
9308 IRTemp op1 = newTemp(Ity_I128);
9309 IRTemp result = newTemp(Ity_I128);
9310
9311 assign(op1, binop(Iop_64HLto128,
9312 get_gpr_dw0(r1), // high 64 bits
9313 get_gpr_dw0(r1 + 1))); // low 64 bits
9314 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9315 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9316 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9317}
9318
9319static void
9320s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9321{
9322 IRTemp op1 = newTemp(Ity_I64);
9323 IRTemp result = newTemp(Ity_I128);
9324
9325 assign(op1, get_gpr_dw0(r1 + 1));
9326 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9327 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9328 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9329}
9330
9331static HChar *
9332s390_irgen_DR(UChar r1, UChar r2)
9333{
9334 IRTemp op2 = newTemp(Ity_I32);
9335
9336 assign(op2, get_gpr_w1(r2));
9337
9338 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9339
9340 return "dr";
9341}
9342
9343static HChar *
9344s390_irgen_D(UChar r1, IRTemp op2addr)
9345{
9346 IRTemp op2 = newTemp(Ity_I32);
9347
9348 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9349
9350 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9351
9352 return "d";
9353}
9354
9355static HChar *
9356s390_irgen_DLR(UChar r1, UChar r2)
9357{
9358 IRTemp op2 = newTemp(Ity_I32);
9359
9360 assign(op2, get_gpr_w1(r2));
9361
9362 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9363
9364 return "dr";
9365}
9366
9367static HChar *
9368s390_irgen_DL(UChar r1, IRTemp op2addr)
9369{
9370 IRTemp op2 = newTemp(Ity_I32);
9371
9372 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9373
9374 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9375
9376 return "dl";
9377}
9378
9379static HChar *
9380s390_irgen_DLG(UChar r1, IRTemp op2addr)
9381{
9382 IRTemp op2 = newTemp(Ity_I64);
9383
9384 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9385
9386 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9387
9388 return "dlg";
9389}
9390
9391static HChar *
9392s390_irgen_DLGR(UChar r1, UChar r2)
9393{
9394 IRTemp op2 = newTemp(Ity_I64);
9395
9396 assign(op2, get_gpr_dw0(r2));
9397
9398 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9399
9400 return "dlgr";
9401}
9402
9403static HChar *
9404s390_irgen_DSGR(UChar r1, UChar r2)
9405{
9406 IRTemp op2 = newTemp(Ity_I64);
9407
9408 assign(op2, get_gpr_dw0(r2));
9409
9410 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9411
9412 return "dsgr";
9413}
9414
9415static HChar *
9416s390_irgen_DSG(UChar r1, IRTemp op2addr)
9417{
9418 IRTemp op2 = newTemp(Ity_I64);
9419
9420 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9421
9422 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9423
9424 return "dsg";
9425}
9426
9427static HChar *
9428s390_irgen_DSGFR(UChar r1, UChar r2)
9429{
9430 IRTemp op2 = newTemp(Ity_I64);
9431
9432 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9433
9434 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9435
9436 return "dsgfr";
9437}
9438
9439static HChar *
9440s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9441{
9442 IRTemp op2 = newTemp(Ity_I64);
9443
9444 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9445
9446 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9447
9448 return "dsgf";
9449}
9450
9451static void
9452s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9453{
9454 UChar reg;
9455 IRTemp addr = newTemp(Ity_I64);
9456
9457 assign(addr, mkexpr(op2addr));
9458 reg = r1;
9459 do {
9460 IRTemp old = addr;
9461
9462 reg %= 16;
9463 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9464 addr = newTemp(Ity_I64);
9465 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9466 reg++;
9467 } while (reg != (r3 + 1));
9468}
9469
9470static HChar *
9471s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9472{
9473 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9474
9475 return "lam";
9476}
9477
9478static HChar *
9479s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9480{
9481 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9482
9483 return "lamy";
9484}
9485
9486static void
9487s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9488{
9489 UChar reg;
9490 IRTemp addr = newTemp(Ity_I64);
9491
9492 assign(addr, mkexpr(op2addr));
9493 reg = r1;
9494 do {
9495 IRTemp old = addr;
9496
9497 reg %= 16;
9498 store(mkexpr(addr), get_ar_w0(reg));
9499 addr = newTemp(Ity_I64);
9500 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9501 reg++;
9502 } while (reg != (r3 + 1));
9503}
9504
9505static HChar *
9506s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9507{
9508 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9509
9510 return "stam";
9511}
9512
9513static HChar *
9514s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9515{
9516 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9517
9518 return "stamy";
9519}
9520
9521
9522/* Implementation for 32-bit compare-and-swap */
9523static void
9524s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9525{
9526 IRCAS *cas;
9527 IRTemp op1 = newTemp(Ity_I32);
9528 IRTemp old_mem = newTemp(Ity_I32);
9529 IRTemp op3 = newTemp(Ity_I32);
9530 IRTemp result = newTemp(Ity_I32);
9531 IRTemp nequal = newTemp(Ity_I1);
9532
9533 assign(op1, get_gpr_w1(r1));
9534 assign(op3, get_gpr_w1(r3));
9535
9536 /* The first and second operands are compared. If they are equal,
9537 the third operand is stored at the second- operand location. */
9538 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9539 Iend_BE, mkexpr(op2addr),
9540 NULL, mkexpr(op1), /* expected value */
9541 NULL, mkexpr(op3) /* new value */);
9542 stmt(IRStmt_CAS(cas));
9543
9544 /* Set CC. Operands compared equal -> 0, else 1. */
9545 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9546 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9547
9548 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9549 Otherwise, store the old_value from memory in r1 and yield. */
9550 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9551 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9552 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9553 IRConst_U64(guest_IA_next_instr)));
9554}
9555
9556static HChar *
9557s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9558{
9559 s390_irgen_cas_32(r1, r3, op2addr);
9560
9561 return "cs";
9562}
9563
9564static HChar *
9565s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9566{
9567 s390_irgen_cas_32(r1, r3, op2addr);
9568
9569 return "csy";
9570}
9571
9572static HChar *
9573s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9574{
9575 IRCAS *cas;
9576 IRTemp op1 = newTemp(Ity_I64);
9577 IRTemp old_mem = newTemp(Ity_I64);
9578 IRTemp op3 = newTemp(Ity_I64);
9579 IRTemp result = newTemp(Ity_I64);
9580 IRTemp nequal = newTemp(Ity_I1);
9581
9582 assign(op1, get_gpr_dw0(r1));
9583 assign(op3, get_gpr_dw0(r3));
9584
9585 /* The first and second operands are compared. If they are equal,
9586 the third operand is stored at the second- operand location. */
9587 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9588 Iend_BE, mkexpr(op2addr),
9589 NULL, mkexpr(op1), /* expected value */
9590 NULL, mkexpr(op3) /* new value */);
9591 stmt(IRStmt_CAS(cas));
9592
9593 /* Set CC. Operands compared equal -> 0, else 1. */
9594 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9595 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9596
9597 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9598 Otherwise, store the old_value from memory in r1 and yield. */
9599 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9600 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9601 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9602 IRConst_U64(guest_IA_next_instr)));
9603
9604 return "csg";
9605}
9606
9607
9608/* Binary floating point */
9609
9610static HChar *
9611s390_irgen_AXBR(UChar r1, UChar r2)
9612{
9613 IRTemp op1 = newTemp(Ity_F128);
9614 IRTemp op2 = newTemp(Ity_F128);
9615 IRTemp result = newTemp(Ity_F128);
9616
9617 assign(op1, get_fpr_pair(r1));
9618 assign(op2, get_fpr_pair(r2));
9619 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9620 mkexpr(op2)));
9621 put_fpr_pair(r1, mkexpr(result));
9622
9623 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9624
9625 return "axbr";
9626}
9627
9628/* The result of a Iop_CmdFxx operation is a condition code. It is
9629 encoded using the values defined in type IRCmpFxxResult.
9630 Before we can store the condition code into the guest state (or do
9631 anything else with it for that matter) we need to convert it to
9632 the encoding that s390 uses. This is what this function does.
9633
9634 s390 VEX b6 b2 b0 cc.1 cc.0
9635 0 0x40 EQ 1 0 0 0 0
9636 1 0x01 LT 0 0 1 0 1
9637 2 0x00 GT 0 0 0 1 0
9638 3 0x45 Unordered 1 1 1 1 1
9639
9640 The following bits from the VEX encoding are interesting:
9641 b0, b2, b6 with b0 being the LSB. We observe:
9642
9643 cc.0 = b0;
9644 cc.1 = b2 | (~b0 & ~b6)
9645
9646 with cc being the s390 condition code.
9647*/
9648static IRExpr *
9649convert_vex_fpcc_to_s390(IRTemp vex_cc)
9650{
9651 IRTemp cc0 = newTemp(Ity_I32);
9652 IRTemp cc1 = newTemp(Ity_I32);
9653 IRTemp b0 = newTemp(Ity_I32);
9654 IRTemp b2 = newTemp(Ity_I32);
9655 IRTemp b6 = newTemp(Ity_I32);
9656
9657 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9658 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9659 mkU32(1)));
9660 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9661 mkU32(1)));
9662
9663 assign(cc0, mkexpr(b0));
9664 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9665 binop(Iop_And32,
9666 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9667 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9668 )));
9669
9670 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9671}
9672
9673static HChar *
9674s390_irgen_CEBR(UChar r1, UChar r2)
9675{
9676 IRTemp op1 = newTemp(Ity_F32);
9677 IRTemp op2 = newTemp(Ity_F32);
9678 IRTemp cc_vex = newTemp(Ity_I32);
9679 IRTemp cc_s390 = newTemp(Ity_I32);
9680
9681 assign(op1, get_fpr_w0(r1));
9682 assign(op2, get_fpr_w0(r2));
9683 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9684
9685 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9686 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9687
9688 return "cebr";
9689}
9690
9691static HChar *
9692s390_irgen_CDBR(UChar r1, UChar r2)
9693{
9694 IRTemp op1 = newTemp(Ity_F64);
9695 IRTemp op2 = newTemp(Ity_F64);
9696 IRTemp cc_vex = newTemp(Ity_I32);
9697 IRTemp cc_s390 = newTemp(Ity_I32);
9698
9699 assign(op1, get_fpr_dw0(r1));
9700 assign(op2, get_fpr_dw0(r2));
9701 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9702
9703 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9704 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9705
9706 return "cdbr";
9707}
9708
9709static HChar *
9710s390_irgen_CXBR(UChar r1, UChar r2)
9711{
9712 IRTemp op1 = newTemp(Ity_F128);
9713 IRTemp op2 = newTemp(Ity_F128);
9714 IRTemp cc_vex = newTemp(Ity_I32);
9715 IRTemp cc_s390 = newTemp(Ity_I32);
9716
9717 assign(op1, get_fpr_pair(r1));
9718 assign(op2, get_fpr_pair(r2));
9719 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
9720
9721 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9722 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9723
9724 return "cxbr";
9725}
9726
9727static HChar *
9728s390_irgen_CEB(UChar r1, IRTemp op2addr)
9729{
9730 IRTemp op1 = newTemp(Ity_F32);
9731 IRTemp op2 = newTemp(Ity_F32);
9732 IRTemp cc_vex = newTemp(Ity_I32);
9733 IRTemp cc_s390 = newTemp(Ity_I32);
9734
9735 assign(op1, get_fpr_w0(r1));
9736 assign(op2, load(Ity_F32, mkexpr(op2addr)));
9737 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9738
9739 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9740 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9741
9742 return "ceb";
9743}
9744
9745static HChar *
9746s390_irgen_CDB(UChar r1, IRTemp op2addr)
9747{
9748 IRTemp op1 = newTemp(Ity_F64);
9749 IRTemp op2 = newTemp(Ity_F64);
9750 IRTemp cc_vex = newTemp(Ity_I32);
9751 IRTemp cc_s390 = newTemp(Ity_I32);
9752
9753 assign(op1, get_fpr_dw0(r1));
9754 assign(op2, load(Ity_F64, mkexpr(op2addr)));
9755 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9756
9757 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9758 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9759
9760 return "cdb";
9761}
9762
9763static HChar *
9764s390_irgen_CXFBR(UChar r1, UChar r2)
9765{
9766 IRTemp op2 = newTemp(Ity_I32);
9767
9768 assign(op2, get_gpr_w1(r2));
9769 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
9770
9771 return "cxfbr";
9772}
9773
9774static HChar *
9775s390_irgen_CXGBR(UChar r1, UChar r2)
9776{
9777 IRTemp op2 = newTemp(Ity_I64);
9778
9779 assign(op2, get_gpr_dw0(r2));
9780 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
9781
9782 return "cxgbr";
9783}
9784
9785static HChar *
9786s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
9787{
9788 IRTemp op = newTemp(Ity_F128);
9789 IRTemp result = newTemp(Ity_I32);
9790
9791 assign(op, get_fpr_pair(r2));
9792 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
9793 mkexpr(op)));
9794 put_gpr_w1(r1, mkexpr(result));
9795 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
9796
9797 return "cfxbr";
9798}
9799
9800static HChar *
9801s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
9802{
9803 IRTemp op = newTemp(Ity_F128);
9804 IRTemp result = newTemp(Ity_I64);
9805
9806 assign(op, get_fpr_pair(r2));
9807 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
9808 mkexpr(op)));
9809 put_gpr_dw0(r1, mkexpr(result));
9810 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
9811
9812 return "cgxbr";
9813}
9814
9815static HChar *
9816s390_irgen_DXBR(UChar r1, UChar r2)
9817{
9818 IRTemp op1 = newTemp(Ity_F128);
9819 IRTemp op2 = newTemp(Ity_F128);
9820 IRTemp result = newTemp(Ity_F128);
9821
9822 assign(op1, get_fpr_pair(r1));
9823 assign(op2, get_fpr_pair(r2));
9824 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9825 mkexpr(op2)));
9826 put_fpr_pair(r1, mkexpr(result));
9827
9828 return "dxbr";
9829}
9830
9831static HChar *
9832s390_irgen_LTXBR(UChar r1, UChar r2)
9833{
9834 IRTemp result = newTemp(Ity_F128);
9835
9836 assign(result, get_fpr_pair(r2));
9837 put_fpr_pair(r1, mkexpr(result));
9838 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9839
9840 return "ltxbr";
9841}
9842
9843static HChar *
9844s390_irgen_LCXBR(UChar r1, UChar r2)
9845{
9846 IRTemp result = newTemp(Ity_F128);
9847
9848 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
9849 put_fpr_pair(r1, mkexpr(result));
9850 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9851
9852 return "lcxbr";
9853}
9854
9855static HChar *
9856s390_irgen_LXDBR(UChar r1, UChar r2)
9857{
9858 IRTemp op = newTemp(Ity_F64);
9859
9860 assign(op, get_fpr_dw0(r2));
9861 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9862
9863 return "lxdbr";
9864}
9865
9866static HChar *
9867s390_irgen_LXEBR(UChar r1, UChar r2)
9868{
9869 IRTemp op = newTemp(Ity_F32);
9870
9871 assign(op, get_fpr_w0(r2));
9872 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9873
9874 return "lxebr";
9875}
9876
9877static HChar *
9878s390_irgen_LXDB(UChar r1, IRTemp op2addr)
9879{
9880 IRTemp op = newTemp(Ity_F64);
9881
9882 assign(op, load(Ity_F64, mkexpr(op2addr)));
9883 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9884
9885 return "lxdb";
9886}
9887
9888static HChar *
9889s390_irgen_LXEB(UChar r1, IRTemp op2addr)
9890{
9891 IRTemp op = newTemp(Ity_F32);
9892
9893 assign(op, load(Ity_F32, mkexpr(op2addr)));
9894 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9895
9896 return "lxeb";
9897}
9898
9899static HChar *
9900s390_irgen_LNEBR(UChar r1, UChar r2)
9901{
9902 IRTemp result = newTemp(Ity_F32);
9903
9904 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
9905 put_fpr_w0(r1, mkexpr(result));
9906 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
9907
9908 return "lnebr";
9909}
9910
9911static HChar *
9912s390_irgen_LNDBR(UChar r1, UChar r2)
9913{
9914 IRTemp result = newTemp(Ity_F64);
9915
9916 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
9917 put_fpr_dw0(r1, mkexpr(result));
9918 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
9919
9920 return "lndbr";
9921}
9922
9923static HChar *
9924s390_irgen_LNXBR(UChar r1, UChar r2)
9925{
9926 IRTemp result = newTemp(Ity_F128);
9927
9928 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
9929 put_fpr_pair(r1, mkexpr(result));
9930 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9931
9932 return "lnxbr";
9933}
9934
9935static HChar *
9936s390_irgen_LPEBR(UChar r1, UChar r2)
9937{
9938 IRTemp result = newTemp(Ity_F32);
9939
9940 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
9941 put_fpr_w0(r1, mkexpr(result));
9942 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
9943
9944 return "lpebr";
9945}
9946
9947static HChar *
9948s390_irgen_LPDBR(UChar r1, UChar r2)
9949{
9950 IRTemp result = newTemp(Ity_F64);
9951
9952 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
9953 put_fpr_dw0(r1, mkexpr(result));
9954 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
9955
9956 return "lpdbr";
9957}
9958
9959static HChar *
9960s390_irgen_LPXBR(UChar r1, UChar r2)
9961{
9962 IRTemp result = newTemp(Ity_F128);
9963
9964 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
9965 put_fpr_pair(r1, mkexpr(result));
9966 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9967
9968 return "lpxbr";
9969}
9970
9971static HChar *
9972s390_irgen_LDXBR(UChar r1, UChar r2)
9973{
9974 IRTemp result = newTemp(Ity_F64);
9975
9976 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
9977 put_fpr_dw0(r1, mkexpr(result));
9978
9979 return "ldxbr";
9980}
9981
9982static HChar *
9983s390_irgen_LEXBR(UChar r1, UChar r2)
9984{
9985 IRTemp result = newTemp(Ity_F32);
9986
9987 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
9988 put_fpr_w0(r1, mkexpr(result));
9989
9990 return "lexbr";
9991}
9992
9993static HChar *
9994s390_irgen_MXBR(UChar r1, UChar r2)
9995{
9996 IRTemp op1 = newTemp(Ity_F128);
9997 IRTemp op2 = newTemp(Ity_F128);
9998 IRTemp result = newTemp(Ity_F128);
9999
10000 assign(op1, get_fpr_pair(r1));
10001 assign(op2, get_fpr_pair(r2));
10002 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10003 mkexpr(op2)));
10004 put_fpr_pair(r1, mkexpr(result));
10005
10006 return "mxbr";
10007}
10008
10009static HChar *
10010s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10011{
10012 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10013 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10014
10015 return "maebr";
10016}
10017
10018static HChar *
10019s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10020{
10021 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10022 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10023
10024 return "madbr";
10025}
10026
10027static HChar *
10028s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10029{
10030 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10031
10032 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10033 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10034
10035 return "maeb";
10036}
10037
10038static HChar *
10039s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10040{
10041 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10042
10043 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10044 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10045
10046 return "madb";
10047}
10048
10049static HChar *
10050s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10051{
10052 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10053 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10054
10055 return "msebr";
10056}
10057
10058static HChar *
10059s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10060{
10061 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10062 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10063
10064 return "msdbr";
10065}
10066
10067static HChar *
10068s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10069{
10070 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10071
10072 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10073 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10074
10075 return "mseb";
10076}
10077
10078static HChar *
10079s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10080{
10081 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10082
10083 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10084 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10085
10086 return "msdb";
10087}
10088
10089static HChar *
10090s390_irgen_SQEBR(UChar r1, UChar r2)
10091{
10092 IRTemp result = newTemp(Ity_F32);
10093
10094 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10095 put_fpr_w0(r1, mkexpr(result));
10096
10097 return "sqebr";
10098}
10099
10100static HChar *
10101s390_irgen_SQDBR(UChar r1, UChar r2)
10102{
10103 IRTemp result = newTemp(Ity_F64);
10104
10105 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10106 put_fpr_dw0(r1, mkexpr(result));
10107
10108 return "sqdbr";
10109}
10110
10111static HChar *
10112s390_irgen_SQXBR(UChar r1, UChar r2)
10113{
10114 IRTemp result = newTemp(Ity_F128);
10115
10116 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10117 put_fpr_pair(r1, mkexpr(result));
10118
10119 return "sqxbr";
10120}
10121
10122static HChar *
10123s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10124{
10125 IRTemp op = newTemp(Ity_F32);
10126
10127 assign(op, load(Ity_F32, mkexpr(op2addr)));
10128 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10129
10130 return "sqeb";
10131}
10132
10133static HChar *
10134s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10135{
10136 IRTemp op = newTemp(Ity_F64);
10137
10138 assign(op, load(Ity_F64, mkexpr(op2addr)));
10139 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10140
10141 return "sqdb";
10142}
10143
10144static HChar *
10145s390_irgen_SXBR(UChar r1, UChar r2)
10146{
10147 IRTemp op1 = newTemp(Ity_F128);
10148 IRTemp op2 = newTemp(Ity_F128);
10149 IRTemp result = newTemp(Ity_F128);
10150
10151 assign(op1, get_fpr_pair(r1));
10152 assign(op2, get_fpr_pair(r2));
10153 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10154 mkexpr(op2)));
10155 put_fpr_pair(r1, mkexpr(result));
10156 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10157
10158 return "sxbr";
10159}
10160
10161static HChar *
10162s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10163{
10164 IRTemp value = newTemp(Ity_F32);
10165
10166 assign(value, get_fpr_w0(r1));
10167
10168 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10169
10170 return "tceb";
10171}
10172
10173static HChar *
10174s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10175{
10176 IRTemp value = newTemp(Ity_F64);
10177
10178 assign(value, get_fpr_dw0(r1));
10179
10180 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10181
10182 return "tcdb";
10183}
10184
10185static HChar *
10186s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10187{
10188 IRTemp value = newTemp(Ity_F128);
10189
10190 assign(value, get_fpr_pair(r1));
10191
10192 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10193
10194 return "tcxb";
10195}
10196
10197static HChar *
10198s390_irgen_LCDFR(UChar r1, UChar r2)
10199{
10200 IRTemp result = newTemp(Ity_F64);
10201
10202 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10203 put_fpr_dw0(r1, mkexpr(result));
10204
10205 return "lcdfr";
10206}
10207
10208static HChar *
10209s390_irgen_LNDFR(UChar r1, UChar r2)
10210{
10211 IRTemp result = newTemp(Ity_F64);
10212
10213 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10214 put_fpr_dw0(r1, mkexpr(result));
10215
10216 return "lndfr";
10217}
10218
10219static HChar *
10220s390_irgen_LPDFR(UChar r1, UChar r2)
10221{
10222 IRTemp result = newTemp(Ity_F64);
10223
10224 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10225 put_fpr_dw0(r1, mkexpr(result));
10226
10227 return "lpdfr";
10228}
10229
10230static HChar *
10231s390_irgen_LDGR(UChar r1, UChar r2)
10232{
10233 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10234
10235 return "ldgr";
10236}
10237
10238static HChar *
10239s390_irgen_LGDR(UChar r1, UChar r2)
10240{
10241 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10242
10243 return "lgdr";
10244}
10245
10246
10247static HChar *
10248s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10249{
10250 IRTemp sign = newTemp(Ity_I64);
10251 IRTemp value = newTemp(Ity_I64);
10252
10253 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10254 mkU64(1ULL << 63)));
10255 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10256 mkU64((1ULL << 63) - 1)));
10257 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10258 mkexpr(sign))));
10259
10260 return "cpsdr";
10261}
10262
10263
10264static UInt
10265s390_do_cvb(ULong decimal)
10266{
10267#if defined(VGA_s390x)
10268 UInt binary;
10269
10270 __asm__ volatile (
10271 "cvb %[result],%[input]\n\t"
10272 : [result] "=d"(binary)
10273 : [input] "m"(decimal)
10274 );
10275
10276 return binary;
10277#else
10278 return 0;
10279#endif
10280}
10281
10282static IRExpr *
10283s390_call_cvb(IRExpr *in)
10284{
10285 IRExpr **args, *call;
10286
10287 args = mkIRExprVec_1(in);
10288 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10289 "s390_do_cvb", &s390_do_cvb, args);
10290
10291 /* Nothing is excluded from definedness checking. */
10292 call->Iex.CCall.cee->mcx_mask = 0;
10293
10294 return call;
10295}
10296
10297static HChar *
10298s390_irgen_CVB(UChar r1, IRTemp op2addr)
10299{
10300 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10301
10302 return "cvb";
10303}
10304
10305static HChar *
10306s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10307{
10308 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10309
10310 return "cvby";
10311}
10312
10313
10314static ULong
10315s390_do_cvd(ULong binary_in)
10316{
10317#if defined(VGA_s390x)
10318 UInt binary = binary_in & 0xffffffffULL;
10319 ULong decimal;
10320
10321 __asm__ volatile (
10322 "cvd %[input],%[result]\n\t"
10323 : [result] "=m"(decimal)
10324 : [input] "d"(binary)
10325 );
10326
10327 return decimal;
10328#else
10329 return 0;
10330#endif
10331}
10332
10333static IRExpr *
10334s390_call_cvd(IRExpr *in)
10335{
10336 IRExpr **args, *call;
10337
10338 args = mkIRExprVec_1(in);
10339 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10340 "s390_do_cvd", &s390_do_cvd, args);
10341
10342 /* Nothing is excluded from definedness checking. */
10343 call->Iex.CCall.cee->mcx_mask = 0;
10344
10345 return call;
10346}
10347
10348static HChar *
10349s390_irgen_CVD(UChar r1, IRTemp op2addr)
10350{
10351 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10352
10353 return "cvd";
10354}
10355
10356static HChar *
10357s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10358{
10359 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10360
10361 return "cvdy";
10362}
10363
10364static HChar *
10365s390_irgen_FLOGR(UChar r1, UChar r2)
10366{
10367 IRTemp input = newTemp(Ity_I64);
10368 IRTemp not_zero = newTemp(Ity_I64);
10369 IRTemp tmpnum = newTemp(Ity_I64);
10370 IRTemp num = newTemp(Ity_I64);
10371 IRTemp shift_amount = newTemp(Ity_I8);
10372
10373 /* We use the "count leading zeroes" operator because the number of
10374 leading zeroes is identical with the bit position of the first '1' bit.
10375 However, that operator does not work when the input value is zero.
10376 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10377 the modified value. If input == 0, then the result is 64. Otherwise,
10378 the result of Clz64 is what we want. */
10379
10380 assign(input, get_gpr_dw0(r2));
10381 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10382 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10383
10384 /* num = (input == 0) ? 64 : tmpnum */
10385 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10386 /* == 0 */ mkU64(64),
10387 /* != 0 */ mkexpr(tmpnum)));
10388
10389 put_gpr_dw0(r1, mkexpr(num));
10390
10391 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10392 is to first shift the input value by NUM + 1 bits to the left which
10393 causes the leftmost '1' bit to disappear. Then we shift logically to
10394 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10395 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10396 the width of the value-to-be-shifted, we need to special case
10397 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10398 For both such INPUT values the result will be 0. */
10399
10400 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10401 mkU64(1))));
10402
10403 put_gpr_dw0(r1 + 1,
10404 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10405 /* == 0 || == 1*/ mkU64(0),
10406 /* otherwise */
10407 binop(Iop_Shr64,
10408 binop(Iop_Shl64, mkexpr(input),
10409 mkexpr(shift_amount)),
10410 mkexpr(shift_amount))));
10411
10412 /* Compare the original value as an unsigned integer with 0. */
10413 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10414 mktemp(Ity_I64, mkU64(0)), False);
10415
10416 return "flogr";
10417}
10418
10419/*------------------------------------------------------------*/
10420/*--- Build IR for special instructions ---*/
10421/*------------------------------------------------------------*/
10422
10423void
10424s390_irgen_client_request(void)
10425{
10426 if (0)
10427 vex_printf("%%R3 = client_request ( %%R2 )\n");
10428
10429 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10430 + S390_SPECIAL_OP_PREAMBLE_SIZE
10431 + S390_SPECIAL_OP_SIZE));
10432 irsb->jumpkind = Ijk_ClientReq;
10433
10434 dis_res->whatNext = Dis_StopHere;
10435}
10436
10437void
10438s390_irgen_guest_NRADDR(void)
10439{
10440 if (0)
10441 vex_printf("%%R3 = guest_NRADDR\n");
10442
10443 put_gpr_dw0(3, IRExpr_Get(S390_GUEST_OFFSET(guest_NRADDR), Ity_I64));
10444}
10445
10446void
10447s390_irgen_call_noredir(void)
10448{
10449 /* Continue after special op */
10450 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10451 + S390_SPECIAL_OP_PREAMBLE_SIZE
10452 + S390_SPECIAL_OP_SIZE));
10453
10454 /* The address is in REG1, all parameters are in the right (guest) places */
10455 irsb->next = get_gpr_dw0(1);
10456 irsb->jumpkind = Ijk_NoRedir;
10457
10458 dis_res->whatNext = Dis_StopHere;
10459}
10460
10461/* Force proper alignment for the structures below. */
10462#pragma pack(1)
10463
10464
10465static s390_decode_t
10466s390_decode_2byte_and_irgen(UChar *bytes)
10467{
10468 typedef union {
10469 struct {
10470 unsigned int op : 16;
10471 } E;
10472 struct {
10473 unsigned int op : 8;
10474 unsigned int i : 8;
10475 } I;
10476 struct {
10477 unsigned int op : 8;
10478 unsigned int r1 : 4;
10479 unsigned int r2 : 4;
10480 } RR;
10481 } formats;
10482 union {
10483 formats fmt;
10484 UShort value;
10485 } ovl;
10486
10487 vassert(sizeof(formats) == 2);
10488
10489 ((char *)(&ovl.value))[0] = bytes[0];
10490 ((char *)(&ovl.value))[1] = bytes[1];
10491
10492 switch (ovl.value & 0xffff) {
10493 case 0x0101: /* PR */ goto unimplemented;
10494 case 0x0102: /* UPT */ goto unimplemented;
10495 case 0x0104: /* PTFF */ goto unimplemented;
10496 case 0x0107: /* SCKPF */ goto unimplemented;
10497 case 0x010a: /* PFPO */ goto unimplemented;
10498 case 0x010b: /* TAM */ goto unimplemented;
10499 case 0x010c: /* SAM24 */ goto unimplemented;
10500 case 0x010d: /* SAM31 */ goto unimplemented;
10501 case 0x010e: /* SAM64 */ goto unimplemented;
10502 case 0x01ff: /* TRAP2 */ goto unimplemented;
10503 }
10504
10505 switch ((ovl.value & 0xff00) >> 8) {
10506 case 0x04: /* SPM */ goto unimplemented;
10507 case 0x05: /* BALR */ goto unimplemented;
10508 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10509 goto ok;
10510 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10511 goto ok;
10512 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
10513 case 0x0b: /* BSM */ goto unimplemented;
10514 case 0x0c: /* BASSM */ goto unimplemented;
10515 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10516 goto ok;
10517 case 0x0e: /* MVCL */ goto unimplemented;
10518 case 0x0f: /* CLCL */ goto unimplemented;
10519 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10520 goto ok;
10521 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10522 goto ok;
10523 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10524 goto ok;
10525 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10526 goto ok;
10527 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10528 goto ok;
10529 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10530 goto ok;
10531 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10532 goto ok;
10533 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10534 goto ok;
10535 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10536 goto ok;
10537 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10538 goto ok;
10539 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10540 goto ok;
10541 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10542 goto ok;
10543 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10544 goto ok;
10545 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10546 goto ok;
10547 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10548 goto ok;
10549 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10550 goto ok;
10551 case 0x20: /* LPDR */ goto unimplemented;
10552 case 0x21: /* LNDR */ goto unimplemented;
10553 case 0x22: /* LTDR */ goto unimplemented;
10554 case 0x23: /* LCDR */ goto unimplemented;
10555 case 0x24: /* HDR */ goto unimplemented;
10556 case 0x25: /* LDXR */ goto unimplemented;
10557 case 0x26: /* MXR */ goto unimplemented;
10558 case 0x27: /* MXDR */ goto unimplemented;
10559 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10560 goto ok;
10561 case 0x29: /* CDR */ goto unimplemented;
10562 case 0x2a: /* ADR */ goto unimplemented;
10563 case 0x2b: /* SDR */ goto unimplemented;
10564 case 0x2c: /* MDR */ goto unimplemented;
10565 case 0x2d: /* DDR */ goto unimplemented;
10566 case 0x2e: /* AWR */ goto unimplemented;
10567 case 0x2f: /* SWR */ goto unimplemented;
10568 case 0x30: /* LPER */ goto unimplemented;
10569 case 0x31: /* LNER */ goto unimplemented;
10570 case 0x32: /* LTER */ goto unimplemented;
10571 case 0x33: /* LCER */ goto unimplemented;
10572 case 0x34: /* HER */ goto unimplemented;
10573 case 0x35: /* LEDR */ goto unimplemented;
10574 case 0x36: /* AXR */ goto unimplemented;
10575 case 0x37: /* SXR */ goto unimplemented;
10576 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10577 goto ok;
10578 case 0x39: /* CER */ goto unimplemented;
10579 case 0x3a: /* AER */ goto unimplemented;
10580 case 0x3b: /* SER */ goto unimplemented;
10581 case 0x3c: /* MDER */ goto unimplemented;
10582 case 0x3d: /* DER */ goto unimplemented;
10583 case 0x3e: /* AUR */ goto unimplemented;
10584 case 0x3f: /* SUR */ goto unimplemented;
10585 }
10586
10587 return S390_DECODE_UNKNOWN_INSN;
10588
10589ok:
10590 return S390_DECODE_OK;
10591
10592unimplemented:
10593 return S390_DECODE_UNIMPLEMENTED_INSN;
10594}
10595
10596static s390_decode_t
10597s390_decode_4byte_and_irgen(UChar *bytes)
10598{
10599 typedef union {
10600 struct {
10601 unsigned int op1 : 8;
10602 unsigned int r1 : 4;
10603 unsigned int op2 : 4;
10604 unsigned int i2 : 16;
10605 } RI;
10606 struct {
10607 unsigned int op : 16;
10608 unsigned int : 8;
10609 unsigned int r1 : 4;
10610 unsigned int r2 : 4;
10611 } RRE;
10612 struct {
10613 unsigned int op : 16;
10614 unsigned int r1 : 4;
10615 unsigned int : 4;
10616 unsigned int r3 : 4;
10617 unsigned int r2 : 4;
10618 } RRF;
10619 struct {
10620 unsigned int op : 16;
10621 unsigned int r3 : 4;
10622 unsigned int m4 : 4;
10623 unsigned int r1 : 4;
10624 unsigned int r2 : 4;
10625 } RRF2;
10626 struct {
10627 unsigned int op : 16;
10628 unsigned int r3 : 4;
10629 unsigned int : 4;
10630 unsigned int r1 : 4;
10631 unsigned int r2 : 4;
10632 } RRF3;
10633 struct {
10634 unsigned int op : 16;
10635 unsigned int r3 : 4;
10636 unsigned int : 4;
10637 unsigned int r1 : 4;
10638 unsigned int r2 : 4;
10639 } RRR;
10640 struct {
10641 unsigned int op : 16;
10642 unsigned int r3 : 4;
10643 unsigned int : 4;
10644 unsigned int r1 : 4;
10645 unsigned int r2 : 4;
10646 } RRF4;
10647 struct {
10648 unsigned int op : 8;
10649 unsigned int r1 : 4;
10650 unsigned int r3 : 4;
10651 unsigned int b2 : 4;
10652 unsigned int d2 : 12;
10653 } RS;
10654 struct {
10655 unsigned int op : 8;
10656 unsigned int r1 : 4;
10657 unsigned int r3 : 4;
10658 unsigned int i2 : 16;
10659 } RSI;
10660 struct {
10661 unsigned int op : 8;
10662 unsigned int r1 : 4;
10663 unsigned int x2 : 4;
10664 unsigned int b2 : 4;
10665 unsigned int d2 : 12;
10666 } RX;
10667 struct {
10668 unsigned int op : 16;
10669 unsigned int b2 : 4;
10670 unsigned int d2 : 12;
10671 } S;
10672 struct {
10673 unsigned int op : 8;
10674 unsigned int i2 : 8;
10675 unsigned int b1 : 4;
10676 unsigned int d1 : 12;
10677 } SI;
10678 } formats;
10679 union {
10680 formats fmt;
10681 UInt value;
10682 } ovl;
10683
10684 vassert(sizeof(formats) == 4);
10685
10686 ((char *)(&ovl.value))[0] = bytes[0];
10687 ((char *)(&ovl.value))[1] = bytes[1];
10688 ((char *)(&ovl.value))[2] = bytes[2];
10689 ((char *)(&ovl.value))[3] = bytes[3];
10690
10691 switch ((ovl.value & 0xff0f0000) >> 16) {
10692 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
10693 ovl.fmt.RI.i2); goto ok;
10694 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
10695 ovl.fmt.RI.i2); goto ok;
10696 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
10697 ovl.fmt.RI.i2); goto ok;
10698 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
10699 ovl.fmt.RI.i2); goto ok;
10700 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
10701 ovl.fmt.RI.i2); goto ok;
10702 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
10703 ovl.fmt.RI.i2); goto ok;
10704 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
10705 ovl.fmt.RI.i2); goto ok;
10706 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
10707 ovl.fmt.RI.i2); goto ok;
10708 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
10709 ovl.fmt.RI.i2); goto ok;
10710 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
10711 ovl.fmt.RI.i2); goto ok;
10712 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
10713 ovl.fmt.RI.i2); goto ok;
10714 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
10715 ovl.fmt.RI.i2); goto ok;
10716 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
10717 ovl.fmt.RI.i2); goto ok;
10718 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
10719 ovl.fmt.RI.i2); goto ok;
10720 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
10721 ovl.fmt.RI.i2); goto ok;
10722 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
10723 ovl.fmt.RI.i2); goto ok;
10724 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
10725 ovl.fmt.RI.i2); goto ok;
10726 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
10727 ovl.fmt.RI.i2); goto ok;
10728 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
10729 ovl.fmt.RI.i2); goto ok;
10730 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
10731 ovl.fmt.RI.i2); goto ok;
10732 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10733 goto ok;
10734 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
10735 ovl.fmt.RI.i2); goto ok;
10736 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
10737 ovl.fmt.RI.i2); goto ok;
10738 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
10739 ovl.fmt.RI.i2); goto ok;
10740 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10741 goto ok;
10742 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
10743 ovl.fmt.RI.i2); goto ok;
10744 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10745 goto ok;
10746 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
10747 ovl.fmt.RI.i2); goto ok;
10748 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10749 goto ok;
10750 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
10751 ovl.fmt.RI.i2); goto ok;
10752 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10753 goto ok;
10754 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
10755 ovl.fmt.RI.i2); goto ok;
10756 }
10757
10758 switch ((ovl.value & 0xffff0000) >> 16) {
10759 case 0x8000: /* SSM */ goto unimplemented;
10760 case 0x8200: /* LPSW */ goto unimplemented;
10761 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
10762 goto ok;
10763 case 0xb202: /* STIDP */ goto unimplemented;
10764 case 0xb204: /* SCK */ goto unimplemented;
10765 case 0xb205: /* STCK */ goto unimplemented;
10766 case 0xb206: /* SCKC */ goto unimplemented;
10767 case 0xb207: /* STCKC */ goto unimplemented;
10768 case 0xb208: /* SPT */ goto unimplemented;
10769 case 0xb209: /* STPT */ goto unimplemented;
10770 case 0xb20a: /* SPKA */ goto unimplemented;
10771 case 0xb20b: /* IPK */ goto unimplemented;
10772 case 0xb20d: /* PTLB */ goto unimplemented;
10773 case 0xb210: /* SPX */ goto unimplemented;
10774 case 0xb211: /* STPX */ goto unimplemented;
10775 case 0xb212: /* STAP */ goto unimplemented;
10776 case 0xb214: /* SIE */ goto unimplemented;
10777 case 0xb218: /* PC */ goto unimplemented;
10778 case 0xb219: /* SAC */ goto unimplemented;
10779 case 0xb21a: /* CFC */ goto unimplemented;
10780 case 0xb221: /* IPTE */ goto unimplemented;
10781 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
10782 case 0xb223: /* IVSK */ goto unimplemented;
10783 case 0xb224: /* IAC */ goto unimplemented;
10784 case 0xb225: /* SSAR */ goto unimplemented;
10785 case 0xb226: /* EPAR */ goto unimplemented;
10786 case 0xb227: /* ESAR */ goto unimplemented;
10787 case 0xb228: /* PT */ goto unimplemented;
10788 case 0xb229: /* ISKE */ goto unimplemented;
10789 case 0xb22a: /* RRBE */ goto unimplemented;
10790 case 0xb22b: /* SSKE */ goto unimplemented;
10791 case 0xb22c: /* TB */ goto unimplemented;
10792 case 0xb22d: /* DXR */ goto unimplemented;
10793 case 0xb22e: /* PGIN */ goto unimplemented;
10794 case 0xb22f: /* PGOUT */ goto unimplemented;
10795 case 0xb230: /* CSCH */ goto unimplemented;
10796 case 0xb231: /* HSCH */ goto unimplemented;
10797 case 0xb232: /* MSCH */ goto unimplemented;
10798 case 0xb233: /* SSCH */ goto unimplemented;
10799 case 0xb234: /* STSCH */ goto unimplemented;
10800 case 0xb235: /* TSCH */ goto unimplemented;
10801 case 0xb236: /* TPI */ goto unimplemented;
10802 case 0xb237: /* SAL */ goto unimplemented;
10803 case 0xb238: /* RSCH */ goto unimplemented;
10804 case 0xb239: /* STCRW */ goto unimplemented;
10805 case 0xb23a: /* STCPS */ goto unimplemented;
10806 case 0xb23b: /* RCHP */ goto unimplemented;
10807 case 0xb23c: /* SCHM */ goto unimplemented;
10808 case 0xb240: /* BAKR */ goto unimplemented;
10809 case 0xb241: /* CKSM */ goto unimplemented;
10810 case 0xb244: /* SQDR */ goto unimplemented;
10811 case 0xb245: /* SQER */ goto unimplemented;
10812 case 0xb246: /* STURA */ goto unimplemented;
10813 case 0xb247: /* MSTA */ goto unimplemented;
10814 case 0xb248: /* PALB */ goto unimplemented;
10815 case 0xb249: /* EREG */ goto unimplemented;
10816 case 0xb24a: /* ESTA */ goto unimplemented;
10817 case 0xb24b: /* LURA */ goto unimplemented;
10818 case 0xb24c: /* TAR */ goto unimplemented;
10819 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
10820 ovl.fmt.RRE.r2); goto ok;
10821 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10822 goto ok;
10823 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10824 goto ok;
10825 case 0xb250: /* CSP */ goto unimplemented;
10826 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
10827 ovl.fmt.RRE.r2); goto ok;
10828 case 0xb254: /* MVPG */ goto unimplemented;
10829 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
10830 ovl.fmt.RRE.r2); goto ok;
10831 case 0xb257: /* CUSE */ goto unimplemented;
10832 case 0xb258: /* BSG */ goto unimplemented;
10833 case 0xb25a: /* BSA */ goto unimplemented;
10834 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
10835 ovl.fmt.RRE.r2); goto ok;
10836 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
10837 ovl.fmt.RRE.r2); goto ok;
10838 case 0xb263: /* CMPSC */ goto unimplemented;
10839 case 0xb274: /* SIGA */ goto unimplemented;
10840 case 0xb276: /* XSCH */ goto unimplemented;
10841 case 0xb277: /* RP */ goto unimplemented;
10842 case 0xb278: /* STCKE */ goto unimplemented;
10843 case 0xb279: /* SACF */ goto unimplemented;
10844 case 0xb27c: /* STCKF */ goto unimplemented;
10845 case 0xb27d: /* STSI */ goto unimplemented;
10846 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
10847 goto ok;
10848 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10849 goto ok;
10850 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10851 goto ok;
10852 case 0xb2a5: /* TRE */ goto unimplemented;
10853 case 0xb2a6: /* CU21 */ goto unimplemented;
10854 case 0xb2a7: /* CU12 */ goto unimplemented;
10855 case 0xb2b0: /* STFLE */ goto unimplemented;
10856 case 0xb2b1: /* STFL */ goto unimplemented;
10857 case 0xb2b2: /* LPSWE */ goto unimplemented;
10858 case 0xb2b8: /* SRNMB */ goto unimplemented;
10859 case 0xb2b9: /* SRNMT */ goto unimplemented;
10860 case 0xb2bd: /* LFAS */ goto unimplemented;
10861 case 0xb2ff: /* TRAP4 */ goto unimplemented;
10862 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
10863 ovl.fmt.RRE.r2); goto ok;
10864 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
10865 ovl.fmt.RRE.r2); goto ok;
10866 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
10867 ovl.fmt.RRE.r2); goto ok;
10868 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
10869 ovl.fmt.RRE.r2); goto ok;
10870 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
10871 ovl.fmt.RRE.r2); goto ok;
10872 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
10873 ovl.fmt.RRE.r2); goto ok;
10874 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
10875 ovl.fmt.RRE.r2); goto ok;
10876 case 0xb307: /* MXDBR */ goto unimplemented;
10877 case 0xb308: /* KEBR */ goto unimplemented;
10878 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
10879 ovl.fmt.RRE.r2); goto ok;
10880 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
10881 ovl.fmt.RRE.r2); goto ok;
10882 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
10883 ovl.fmt.RRE.r2); goto ok;
10884 case 0xb30c: /* MDEBR */ goto unimplemented;
10885 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
10886 ovl.fmt.RRE.r2); goto ok;
10887 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
10888 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10889 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
10890 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10891 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
10892 ovl.fmt.RRE.r2); goto ok;
10893 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
10894 ovl.fmt.RRE.r2); goto ok;
10895 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
10896 ovl.fmt.RRE.r2); goto ok;
10897 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
10898 ovl.fmt.RRE.r2); goto ok;
10899 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
10900 ovl.fmt.RRE.r2); goto ok;
10901 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
10902 ovl.fmt.RRE.r2); goto ok;
10903 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
10904 ovl.fmt.RRE.r2); goto ok;
10905 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
10906 ovl.fmt.RRE.r2); goto ok;
10907 case 0xb318: /* KDBR */ goto unimplemented;
10908 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
10909 ovl.fmt.RRE.r2); goto ok;
10910 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
10911 ovl.fmt.RRE.r2); goto ok;
10912 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
10913 ovl.fmt.RRE.r2); goto ok;
10914 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
10915 ovl.fmt.RRE.r2); goto ok;
10916 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
10917 ovl.fmt.RRE.r2); goto ok;
10918 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
10919 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10920 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
10921 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
10922 case 0xb324: /* LDER */ goto unimplemented;
10923 case 0xb325: /* LXDR */ goto unimplemented;
10924 case 0xb326: /* LXER */ goto unimplemented;
10925 case 0xb32e: /* MAER */ goto unimplemented;
10926 case 0xb32f: /* MSER */ goto unimplemented;
10927 case 0xb336: /* SQXR */ goto unimplemented;
10928 case 0xb337: /* MEER */ goto unimplemented;
10929 case 0xb338: /* MAYLR */ goto unimplemented;
10930 case 0xb339: /* MYLR */ goto unimplemented;
10931 case 0xb33a: /* MAYR */ goto unimplemented;
10932 case 0xb33b: /* MYR */ goto unimplemented;
10933 case 0xb33c: /* MAYHR */ goto unimplemented;
10934 case 0xb33d: /* MYHR */ goto unimplemented;
10935 case 0xb33e: /* MADR */ goto unimplemented;
10936 case 0xb33f: /* MSDR */ goto unimplemented;
10937 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
10938 ovl.fmt.RRE.r2); goto ok;
10939 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
10940 ovl.fmt.RRE.r2); goto ok;
10941 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
10942 ovl.fmt.RRE.r2); goto ok;
10943 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
10944 ovl.fmt.RRE.r2); goto ok;
10945 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
10946 ovl.fmt.RRE.r2); goto ok;
10947 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
10948 ovl.fmt.RRE.r2); goto ok;
10949 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
10950 ovl.fmt.RRE.r2); goto ok;
10951 case 0xb347: /* FIXBR */ goto unimplemented;
10952 case 0xb348: /* KXBR */ goto unimplemented;
10953 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
10954 ovl.fmt.RRE.r2); goto ok;
10955 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
10956 ovl.fmt.RRE.r2); goto ok;
10957 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
10958 ovl.fmt.RRE.r2); goto ok;
10959 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
10960 ovl.fmt.RRE.r2); goto ok;
10961 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
10962 ovl.fmt.RRE.r2); goto ok;
10963 case 0xb350: /* TBEDR */ goto unimplemented;
10964 case 0xb351: /* TBDR */ goto unimplemented;
10965 case 0xb353: /* DIEBR */ goto unimplemented;
10966 case 0xb357: /* FIEBR */ goto unimplemented;
10967 case 0xb358: /* THDER */ goto unimplemented;
10968 case 0xb359: /* THDR */ goto unimplemented;
10969 case 0xb35b: /* DIDBR */ goto unimplemented;
10970 case 0xb35f: /* FIDBR */ goto unimplemented;
10971 case 0xb360: /* LPXR */ goto unimplemented;
10972 case 0xb361: /* LNXR */ goto unimplemented;
10973 case 0xb362: /* LTXR */ goto unimplemented;
10974 case 0xb363: /* LCXR */ goto unimplemented;
10975 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
10976 ovl.fmt.RRE.r2); goto ok;
10977 case 0xb366: /* LEXR */ goto unimplemented;
10978 case 0xb367: /* FIXR */ goto unimplemented;
10979 case 0xb369: /* CXR */ goto unimplemented;
10980 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
10981 ovl.fmt.RRE.r2); goto ok;
10982 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
10983 ovl.fmt.RRE.r2); goto ok;
10984 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
10985 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
10986 goto ok;
10987 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
10988 ovl.fmt.RRE.r2); goto ok;
10989 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
10990 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
10991 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
10992 case 0xb377: /* FIER */ goto unimplemented;
10993 case 0xb37f: /* FIDR */ goto unimplemented;
10994 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
10995 case 0xb385: /* SFASR */ goto unimplemented;
10996 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
10997 case 0xb390: /* CELFBR */ goto unimplemented;
10998 case 0xb391: /* CDLFBR */ goto unimplemented;
10999 case 0xb392: /* CXLFBR */ goto unimplemented;
11000 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11001 ovl.fmt.RRE.r2); goto ok;
11002 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11003 ovl.fmt.RRE.r2); goto ok;
11004 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11005 ovl.fmt.RRE.r2); goto ok;
11006 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11007 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11008 goto ok;
11009 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11010 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11011 goto ok;
11012 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11013 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11014 goto ok;
11015 case 0xb3a0: /* CELGBR */ goto unimplemented;
11016 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11017 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11018 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11019 ovl.fmt.RRE.r2); goto ok;
11020 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11021 ovl.fmt.RRE.r2); goto ok;
11022 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11023 ovl.fmt.RRE.r2); goto ok;
11024 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11025 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11026 goto ok;
11027 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11028 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11029 goto ok;
11030 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11031 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11032 goto ok;
11033 case 0xb3b4: /* CEFR */ goto unimplemented;
11034 case 0xb3b5: /* CDFR */ goto unimplemented;
11035 case 0xb3b6: /* CXFR */ goto unimplemented;
11036 case 0xb3b8: /* CFER */ goto unimplemented;
11037 case 0xb3b9: /* CFDR */ goto unimplemented;
11038 case 0xb3ba: /* CFXR */ goto unimplemented;
11039 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11040 ovl.fmt.RRE.r2); goto ok;
11041 case 0xb3c4: /* CEGR */ goto unimplemented;
11042 case 0xb3c5: /* CDGR */ goto unimplemented;
11043 case 0xb3c6: /* CXGR */ goto unimplemented;
11044 case 0xb3c8: /* CGER */ goto unimplemented;
11045 case 0xb3c9: /* CGDR */ goto unimplemented;
11046 case 0xb3ca: /* CGXR */ goto unimplemented;
11047 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11048 ovl.fmt.RRE.r2); goto ok;
11049 case 0xb3d0: /* MDTR */ goto unimplemented;
11050 case 0xb3d1: /* DDTR */ goto unimplemented;
11051 case 0xb3d2: /* ADTR */ goto unimplemented;
11052 case 0xb3d3: /* SDTR */ goto unimplemented;
11053 case 0xb3d4: /* LDETR */ goto unimplemented;
11054 case 0xb3d5: /* LEDTR */ goto unimplemented;
11055 case 0xb3d6: /* LTDTR */ goto unimplemented;
11056 case 0xb3d7: /* FIDTR */ goto unimplemented;
11057 case 0xb3d8: /* MXTR */ goto unimplemented;
11058 case 0xb3d9: /* DXTR */ goto unimplemented;
11059 case 0xb3da: /* AXTR */ goto unimplemented;
11060 case 0xb3db: /* SXTR */ goto unimplemented;
11061 case 0xb3dc: /* LXDTR */ goto unimplemented;
11062 case 0xb3dd: /* LDXTR */ goto unimplemented;
11063 case 0xb3de: /* LTXTR */ goto unimplemented;
11064 case 0xb3df: /* FIXTR */ goto unimplemented;
11065 case 0xb3e0: /* KDTR */ goto unimplemented;
11066 case 0xb3e1: /* CGDTR */ goto unimplemented;
11067 case 0xb3e2: /* CUDTR */ goto unimplemented;
11068 case 0xb3e3: /* CSDTR */ goto unimplemented;
11069 case 0xb3e4: /* CDTR */ goto unimplemented;
11070 case 0xb3e5: /* EEDTR */ goto unimplemented;
11071 case 0xb3e7: /* ESDTR */ goto unimplemented;
11072 case 0xb3e8: /* KXTR */ goto unimplemented;
11073 case 0xb3e9: /* CGXTR */ goto unimplemented;
11074 case 0xb3ea: /* CUXTR */ goto unimplemented;
11075 case 0xb3eb: /* CSXTR */ goto unimplemented;
11076 case 0xb3ec: /* CXTR */ goto unimplemented;
11077 case 0xb3ed: /* EEXTR */ goto unimplemented;
11078 case 0xb3ef: /* ESXTR */ goto unimplemented;
11079 case 0xb3f1: /* CDGTR */ goto unimplemented;
11080 case 0xb3f2: /* CDUTR */ goto unimplemented;
11081 case 0xb3f3: /* CDSTR */ goto unimplemented;
11082 case 0xb3f4: /* CEDTR */ goto unimplemented;
11083 case 0xb3f5: /* QADTR */ goto unimplemented;
11084 case 0xb3f6: /* IEDTR */ goto unimplemented;
11085 case 0xb3f7: /* RRDTR */ goto unimplemented;
11086 case 0xb3f9: /* CXGTR */ goto unimplemented;
11087 case 0xb3fa: /* CXUTR */ goto unimplemented;
11088 case 0xb3fb: /* CXSTR */ goto unimplemented;
11089 case 0xb3fc: /* CEXTR */ goto unimplemented;
11090 case 0xb3fd: /* QAXTR */ goto unimplemented;
11091 case 0xb3fe: /* IEXTR */ goto unimplemented;
11092 case 0xb3ff: /* RRXTR */ goto unimplemented;
11093 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11094 ovl.fmt.RRE.r2); goto ok;
11095 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11096 ovl.fmt.RRE.r2); goto ok;
11097 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11098 ovl.fmt.RRE.r2); goto ok;
11099 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11100 ovl.fmt.RRE.r2); goto ok;
11101 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11102 ovl.fmt.RRE.r2); goto ok;
11103 case 0xb905: /* LURAG */ goto unimplemented;
11104 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11105 ovl.fmt.RRE.r2); goto ok;
11106 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11107 ovl.fmt.RRE.r2); goto ok;
11108 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11109 ovl.fmt.RRE.r2); goto ok;
11110 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11111 ovl.fmt.RRE.r2); goto ok;
11112 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11113 ovl.fmt.RRE.r2); goto ok;
11114 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11115 ovl.fmt.RRE.r2); goto ok;
11116 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11117 ovl.fmt.RRE.r2); goto ok;
11118 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11119 ovl.fmt.RRE.r2); goto ok;
11120 case 0xb90e: /* EREGG */ goto unimplemented;
11121 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11122 ovl.fmt.RRE.r2); goto ok;
11123 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11124 ovl.fmt.RRE.r2); goto ok;
11125 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11126 ovl.fmt.RRE.r2); goto ok;
11127 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11128 ovl.fmt.RRE.r2); goto ok;
11129 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11130 ovl.fmt.RRE.r2); goto ok;
11131 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11132 ovl.fmt.RRE.r2); goto ok;
11133 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11134 ovl.fmt.RRE.r2); goto ok;
11135 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11136 ovl.fmt.RRE.r2); goto ok;
11137 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11138 ovl.fmt.RRE.r2); goto ok;
11139 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11140 ovl.fmt.RRE.r2); goto ok;
11141 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11142 ovl.fmt.RRE.r2); goto ok;
11143 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11144 ovl.fmt.RRE.r2); goto ok;
11145 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11146 ovl.fmt.RRE.r2); goto ok;
11147 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11148 ovl.fmt.RRE.r2); goto ok;
11149 case 0xb91e: /* KMAC */ goto unimplemented;
11150 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11151 ovl.fmt.RRE.r2); goto ok;
11152 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11153 ovl.fmt.RRE.r2); goto ok;
11154 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11155 ovl.fmt.RRE.r2); goto ok;
11156 case 0xb925: /* STURG */ goto unimplemented;
11157 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11158 ovl.fmt.RRE.r2); goto ok;
11159 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11160 ovl.fmt.RRE.r2); goto ok;
11161 case 0xb928: /* PCKMO */ goto unimplemented;
11162 case 0xb92b: /* KMO */ goto unimplemented;
11163 case 0xb92c: /* PCC */ goto unimplemented;
11164 case 0xb92d: /* KMCTR */ goto unimplemented;
11165 case 0xb92e: /* KM */ goto unimplemented;
11166 case 0xb92f: /* KMC */ goto unimplemented;
11167 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11168 ovl.fmt.RRE.r2); goto ok;
11169 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11170 ovl.fmt.RRE.r2); goto ok;
11171 case 0xb93e: /* KIMD */ goto unimplemented;
11172 case 0xb93f: /* KLMD */ goto unimplemented;
11173 case 0xb941: /* CFDTR */ goto unimplemented;
11174 case 0xb942: /* CLGDTR */ goto unimplemented;
11175 case 0xb943: /* CLFDTR */ goto unimplemented;
11176 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11177 ovl.fmt.RRE.r2); goto ok;
11178 case 0xb949: /* CFXTR */ goto unimplemented;
11179 case 0xb94a: /* CLGXTR */ goto unimplemented;
11180 case 0xb94b: /* CLFXTR */ goto unimplemented;
11181 case 0xb951: /* CDFTR */ goto unimplemented;
11182 case 0xb952: /* CDLGTR */ goto unimplemented;
11183 case 0xb953: /* CDLFTR */ goto unimplemented;
11184 case 0xb959: /* CXFTR */ goto unimplemented;
11185 case 0xb95a: /* CXLGTR */ goto unimplemented;
11186 case 0xb95b: /* CXLFTR */ goto unimplemented;
11187 case 0xb960: /* CGRT */ goto unimplemented;
11188 case 0xb961: /* CLGRT */ goto unimplemented;
11189 case 0xb972: /* CRT */ goto unimplemented;
11190 case 0xb973: /* CLRT */ goto unimplemented;
11191 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11192 ovl.fmt.RRE.r2); goto ok;
11193 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11194 ovl.fmt.RRE.r2); goto ok;
11195 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11196 ovl.fmt.RRE.r2); goto ok;
11197 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11198 ovl.fmt.RRE.r2); goto ok;
11199 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11200 ovl.fmt.RRE.r2); goto ok;
11201 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11202 ovl.fmt.RRE.r2); goto ok;
11203 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11204 ovl.fmt.RRE.r2); goto ok;
11205 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11206 ovl.fmt.RRE.r2); goto ok;
11207 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11208 ovl.fmt.RRE.r2); goto ok;
11209 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11210 ovl.fmt.RRE.r2); goto ok;
11211 case 0xb98a: /* CSPG */ goto unimplemented;
11212 case 0xb98d: /* EPSW */ goto unimplemented;
11213 case 0xb98e: /* IDTE */ goto unimplemented;
11214 case 0xb990: /* TRTT */ goto unimplemented;
11215 case 0xb991: /* TRTO */ goto unimplemented;
11216 case 0xb992: /* TROT */ goto unimplemented;
11217 case 0xb993: /* TROO */ goto unimplemented;
11218 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11219 ovl.fmt.RRE.r2); goto ok;
11220 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11221 ovl.fmt.RRE.r2); goto ok;
11222 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11223 ovl.fmt.RRE.r2); goto ok;
11224 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11225 ovl.fmt.RRE.r2); goto ok;
11226 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11227 ovl.fmt.RRE.r2); goto ok;
11228 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11229 ovl.fmt.RRE.r2); goto ok;
11230 case 0xb99a: /* EPAIR */ goto unimplemented;
11231 case 0xb99b: /* ESAIR */ goto unimplemented;
11232 case 0xb99d: /* ESEA */ goto unimplemented;
11233 case 0xb99e: /* PTI */ goto unimplemented;
11234 case 0xb99f: /* SSAIR */ goto unimplemented;
11235 case 0xb9a2: /* PTF */ goto unimplemented;
11236 case 0xb9aa: /* LPTEA */ goto unimplemented;
11237 case 0xb9ae: /* RRBM */ goto unimplemented;
11238 case 0xb9af: /* PFMF */ goto unimplemented;
11239 case 0xb9b0: /* CU14 */ goto unimplemented;
11240 case 0xb9b1: /* CU24 */ goto unimplemented;
11241 case 0xb9b2: /* CU41 */ goto unimplemented;
11242 case 0xb9b3: /* CU42 */ goto unimplemented;
11243 case 0xb9bd: /* TRTRE */ goto unimplemented;
11244 case 0xb9be: /* SRSTU */ goto unimplemented;
11245 case 0xb9bf: /* TRTE */ goto unimplemented;
11246 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11247 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11248 goto ok;
11249 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11250 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11251 goto ok;
11252 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11253 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11254 goto ok;
11255 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11256 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11257 goto ok;
11258 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11259 ovl.fmt.RRE.r2); goto ok;
11260 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11261 ovl.fmt.RRE.r2); goto ok;
11262 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11263 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11264 goto ok;
11265 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11266 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11267 goto ok;
11268 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11269 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11270 goto ok;
11271 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11272 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11273 goto ok;
11274 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11275 ovl.fmt.RRE.r2); goto ok;
11276 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11277 ovl.fmt.RRE.r2); goto ok;
11278 case 0xb9e1: /* POPCNT */ goto unimplemented;
11279 case 0xb9e2: /* LOCGR */ goto unimplemented;
11280 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11281 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11282 goto ok;
11283 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11284 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11285 goto ok;
11286 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11287 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11288 goto ok;
11289 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11290 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11291 goto ok;
11292 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11293 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11294 goto ok;
11295 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11296 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11297 goto ok;
11298 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11299 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11300 goto ok;
11301 case 0xb9f2: /* LOCR */ goto unimplemented;
11302 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11303 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11304 goto ok;
11305 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11306 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11307 goto ok;
11308 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11309 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11310 goto ok;
11311 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11312 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11313 goto ok;
11314 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11315 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11316 goto ok;
11317 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11318 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11319 goto ok;
11320 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11321 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11322 goto ok;
11323 }
11324
11325 switch ((ovl.value & 0xff000000) >> 24) {
11326 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11327 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11328 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11329 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11330 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11331 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11332 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11333 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11334 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11335 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11336 case 0x45: /* BAL */ goto unimplemented;
11337 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11338 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11339 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11340 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11341 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11342 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11343 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11344 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11345 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11346 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11347 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11348 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11349 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11350 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11351 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11352 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11353 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11354 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11355 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11356 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11357 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11358 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11359 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11360 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11361 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11362 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11363 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11364 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11365 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11366 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11367 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11368 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11369 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11370 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11371 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11372 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11373 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11374 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11375 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11376 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11377 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11378 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11379 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11380 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11381 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11382 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11383 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11384 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11385 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11386 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11387 case 0x67: /* MXD */ goto unimplemented;
11388 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11389 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11390 case 0x69: /* CD */ goto unimplemented;
11391 case 0x6a: /* AD */ goto unimplemented;
11392 case 0x6b: /* SD */ goto unimplemented;
11393 case 0x6c: /* MD */ goto unimplemented;
11394 case 0x6d: /* DD */ goto unimplemented;
11395 case 0x6e: /* AW */ goto unimplemented;
11396 case 0x6f: /* SW */ goto unimplemented;
11397 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11398 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11399 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11400 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11401 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11402 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11403 case 0x79: /* CE */ goto unimplemented;
11404 case 0x7a: /* AE */ goto unimplemented;
11405 case 0x7b: /* SE */ goto unimplemented;
11406 case 0x7c: /* MDE */ goto unimplemented;
11407 case 0x7d: /* DE */ goto unimplemented;
11408 case 0x7e: /* AU */ goto unimplemented;
11409 case 0x7f: /* SU */ goto unimplemented;
11410 case 0x83: /* DIAG */ goto unimplemented;
11411 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11412 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11413 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11414 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11415 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11416 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11417 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11418 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11419 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11420 ovl.fmt.RS.d2); goto ok;
11421 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11422 ovl.fmt.RS.d2); goto ok;
11423 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11424 ovl.fmt.RS.d2); goto ok;
11425 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11426 ovl.fmt.RS.d2); goto ok;
11427 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11428 ovl.fmt.RS.d2); goto ok;
11429 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11430 ovl.fmt.RS.d2); goto ok;
11431 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11432 ovl.fmt.RS.d2); goto ok;
11433 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11434 ovl.fmt.RS.d2); goto ok;
11435 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11436 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11437 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11438 ovl.fmt.SI.d1); goto ok;
11439 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11440 ovl.fmt.SI.d1); goto ok;
11441 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11442 ovl.fmt.SI.d1); goto ok;
11443 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11444 ovl.fmt.SI.d1); goto ok;
11445 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11446 ovl.fmt.SI.d1); goto ok;
11447 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11448 ovl.fmt.SI.d1); goto ok;
11449 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11450 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11451 case 0x99: /* TRACE */ goto unimplemented;
11452 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11453 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11454 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11455 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11456 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11457 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11458 goto ok;
11459 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11460 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11461 goto ok;
11462 case 0xac: /* STNSM */ goto unimplemented;
11463 case 0xad: /* STOSM */ goto unimplemented;
11464 case 0xae: /* SIGP */ goto unimplemented;
11465 case 0xaf: /* MC */ goto unimplemented;
11466 case 0xb1: /* LRA */ goto unimplemented;
11467 case 0xb6: /* STCTL */ goto unimplemented;
11468 case 0xb7: /* LCTL */ goto unimplemented;
11469 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11470 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11471 case 0xbb: /* CDS */ goto unimplemented;
11472 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11473 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11474 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11475 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11476 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11477 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11478 }
11479
11480 return S390_DECODE_UNKNOWN_INSN;
11481
11482ok:
11483 return S390_DECODE_OK;
11484
11485unimplemented:
11486 return S390_DECODE_UNIMPLEMENTED_INSN;
11487}
11488
11489static s390_decode_t
11490s390_decode_6byte_and_irgen(UChar *bytes)
11491{
11492 typedef union {
11493 struct {
11494 unsigned int op1 : 8;
11495 unsigned int r1 : 4;
11496 unsigned int r3 : 4;
11497 unsigned int i2 : 16;
11498 unsigned int : 8;
11499 unsigned int op2 : 8;
11500 } RIE;
11501 struct {
11502 unsigned int op1 : 8;
11503 unsigned int r1 : 4;
11504 unsigned int r2 : 4;
11505 unsigned int i3 : 8;
11506 unsigned int i4 : 8;
11507 unsigned int i5 : 8;
11508 unsigned int op2 : 8;
11509 } RIE_RRUUU;
11510 struct {
11511 unsigned int op1 : 8;
11512 unsigned int r1 : 4;
11513 unsigned int : 4;
11514 unsigned int i2 : 16;
11515 unsigned int m3 : 4;
11516 unsigned int : 4;
11517 unsigned int op2 : 8;
11518 } RIEv1;
11519 struct {
11520 unsigned int op1 : 8;
11521 unsigned int r1 : 4;
11522 unsigned int r2 : 4;
11523 unsigned int i4 : 16;
11524 unsigned int m3 : 4;
11525 unsigned int : 4;
11526 unsigned int op2 : 8;
11527 } RIE_RRPU;
11528 struct {
11529 unsigned int op1 : 8;
11530 unsigned int r1 : 4;
11531 unsigned int m3 : 4;
11532 unsigned int i4 : 16;
11533 unsigned int i2 : 8;
11534 unsigned int op2 : 8;
11535 } RIEv3;
11536 struct {
11537 unsigned int op1 : 8;
11538 unsigned int r1 : 4;
11539 unsigned int op2 : 4;
11540 unsigned int i2 : 32;
11541 } RIL;
11542 struct {
11543 unsigned int op1 : 8;
11544 unsigned int r1 : 4;
11545 unsigned int m3 : 4;
11546 unsigned int b4 : 4;
11547 unsigned int d4 : 12;
11548 unsigned int i2 : 8;
11549 unsigned int op2 : 8;
11550 } RIS;
11551 struct {
11552 unsigned int op1 : 8;
11553 unsigned int r1 : 4;
11554 unsigned int r2 : 4;
11555 unsigned int b4 : 4;
11556 unsigned int d4 : 12;
11557 unsigned int m3 : 4;
11558 unsigned int : 4;
11559 unsigned int op2 : 8;
11560 } RRS;
11561 struct {
11562 unsigned int op1 : 8;
11563 unsigned int l1 : 4;
11564 unsigned int : 4;
11565 unsigned int b1 : 4;
11566 unsigned int d1 : 12;
11567 unsigned int : 8;
11568 unsigned int op2 : 8;
11569 } RSL;
11570 struct {
11571 unsigned int op1 : 8;
11572 unsigned int r1 : 4;
11573 unsigned int r3 : 4;
11574 unsigned int b2 : 4;
11575 unsigned int dl2 : 12;
11576 unsigned int dh2 : 8;
11577 unsigned int op2 : 8;
11578 } RSY;
11579 struct {
11580 unsigned int op1 : 8;
11581 unsigned int r1 : 4;
11582 unsigned int x2 : 4;
11583 unsigned int b2 : 4;
11584 unsigned int d2 : 12;
11585 unsigned int : 8;
11586 unsigned int op2 : 8;
11587 } RXE;
11588 struct {
11589 unsigned int op1 : 8;
11590 unsigned int r3 : 4;
11591 unsigned int x2 : 4;
11592 unsigned int b2 : 4;
11593 unsigned int d2 : 12;
11594 unsigned int r1 : 4;
11595 unsigned int : 4;
11596 unsigned int op2 : 8;
11597 } RXF;
11598 struct {
11599 unsigned int op1 : 8;
11600 unsigned int r1 : 4;
11601 unsigned int x2 : 4;
11602 unsigned int b2 : 4;
11603 unsigned int dl2 : 12;
11604 unsigned int dh2 : 8;
11605 unsigned int op2 : 8;
11606 } RXY;
11607 struct {
11608 unsigned int op1 : 8;
11609 unsigned int i2 : 8;
11610 unsigned int b1 : 4;
11611 unsigned int dl1 : 12;
11612 unsigned int dh1 : 8;
11613 unsigned int op2 : 8;
11614 } SIY;
11615 struct {
11616 unsigned int op : 8;
11617 unsigned int l : 8;
11618 unsigned int b1 : 4;
11619 unsigned int d1 : 12;
11620 unsigned int b2 : 4;
11621 unsigned int d2 : 12;
11622 } SS;
11623 struct {
11624 unsigned int op : 8;
11625 unsigned int l1 : 4;
11626 unsigned int l2 : 4;
11627 unsigned int b1 : 4;
11628 unsigned int d1 : 12;
11629 unsigned int b2 : 4;
11630 unsigned int d2 : 12;
11631 } SS_LLRDRD;
11632 struct {
11633 unsigned int op : 8;
11634 unsigned int r1 : 4;
11635 unsigned int r3 : 4;
11636 unsigned int b2 : 4;
11637 unsigned int d2 : 12;
11638 unsigned int b4 : 4;
11639 unsigned int d4 : 12;
11640 } SS_RRRDRD2;
11641 struct {
11642 unsigned int op : 16;
11643 unsigned int b1 : 4;
11644 unsigned int d1 : 12;
11645 unsigned int b2 : 4;
11646 unsigned int d2 : 12;
11647 } SSE;
11648 struct {
11649 unsigned int op1 : 8;
11650 unsigned int r3 : 4;
11651 unsigned int op2 : 4;
11652 unsigned int b1 : 4;
11653 unsigned int d1 : 12;
11654 unsigned int b2 : 4;
11655 unsigned int d2 : 12;
11656 } SSF;
11657 struct {
11658 unsigned int op : 16;
11659 unsigned int b1 : 4;
11660 unsigned int d1 : 12;
11661 unsigned int i2 : 16;
11662 } SIL;
11663 } formats;
11664 union {
11665 formats fmt;
11666 ULong value;
11667 } ovl;
11668
11669 vassert(sizeof(formats) == 6);
11670
11671 ((char *)(&ovl.value))[0] = bytes[0];
11672 ((char *)(&ovl.value))[1] = bytes[1];
11673 ((char *)(&ovl.value))[2] = bytes[2];
11674 ((char *)(&ovl.value))[3] = bytes[3];
11675 ((char *)(&ovl.value))[4] = bytes[4];
11676 ((char *)(&ovl.value))[5] = bytes[5];
11677 ((char *)(&ovl.value))[6] = 0x0;
11678 ((char *)(&ovl.value))[7] = 0x0;
11679
11680 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
11681 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
11682 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11683 ovl.fmt.RXY.dl2,
11684 ovl.fmt.RXY.dh2); goto ok;
11685 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
11686 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
11687 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11688 ovl.fmt.RXY.dl2,
11689 ovl.fmt.RXY.dh2); goto ok;
11690 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
11691 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11692 ovl.fmt.RXY.dl2,
11693 ovl.fmt.RXY.dh2); goto ok;
11694 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
11695 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11696 ovl.fmt.RXY.dl2,
11697 ovl.fmt.RXY.dh2); goto ok;
11698 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
11699 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11700 ovl.fmt.RXY.dl2,
11701 ovl.fmt.RXY.dh2); goto ok;
11702 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
11703 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11704 ovl.fmt.RXY.dl2,
11705 ovl.fmt.RXY.dh2); goto ok;
11706 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
11707 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11708 ovl.fmt.RXY.dl2,
11709 ovl.fmt.RXY.dh2); goto ok;
11710 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
11711 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11712 ovl.fmt.RXY.dl2,
11713 ovl.fmt.RXY.dh2); goto ok;
11714 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
11715 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11716 ovl.fmt.RXY.dl2,
11717 ovl.fmt.RXY.dh2); goto ok;
11718 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
11719 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
11720 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11721 ovl.fmt.RXY.dl2,
11722 ovl.fmt.RXY.dh2); goto ok;
11723 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
11724 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11725 ovl.fmt.RXY.dl2,
11726 ovl.fmt.RXY.dh2); goto ok;
11727 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
11728 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
11729 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11730 ovl.fmt.RXY.dl2,
11731 ovl.fmt.RXY.dh2); goto ok;
11732 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
11733 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11734 ovl.fmt.RXY.dl2,
11735 ovl.fmt.RXY.dh2); goto ok;
11736 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
11737 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11738 ovl.fmt.RXY.dl2,
11739 ovl.fmt.RXY.dh2); goto ok;
11740 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
11741 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11742 ovl.fmt.RXY.dl2,
11743 ovl.fmt.RXY.dh2); goto ok;
11744 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
11745 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11746 ovl.fmt.RXY.dl2,
11747 ovl.fmt.RXY.dh2); goto ok;
11748 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
11749 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11750 ovl.fmt.RXY.dl2,
11751 ovl.fmt.RXY.dh2); goto ok;
11752 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
11753 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11754 ovl.fmt.RXY.dl2,
11755 ovl.fmt.RXY.dh2); goto ok;
11756 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
11757 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11758 ovl.fmt.RXY.dl2,
11759 ovl.fmt.RXY.dh2); goto ok;
11760 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
11761 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11762 ovl.fmt.RXY.dl2,
11763 ovl.fmt.RXY.dh2); goto ok;
11764 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
11765 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11766 ovl.fmt.RXY.dl2,
11767 ovl.fmt.RXY.dh2); goto ok;
11768 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
11769 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11770 ovl.fmt.RXY.dl2,
11771 ovl.fmt.RXY.dh2); goto ok;
11772 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
11773 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11774 ovl.fmt.RXY.dl2,
11775 ovl.fmt.RXY.dh2); goto ok;
11776 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
11777 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11778 ovl.fmt.RXY.dl2,
11779 ovl.fmt.RXY.dh2); goto ok;
11780 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
11781 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11782 ovl.fmt.RXY.dl2,
11783 ovl.fmt.RXY.dh2); goto ok;
11784 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
11785 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11786 ovl.fmt.RXY.dl2,
11787 ovl.fmt.RXY.dh2); goto ok;
11788 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
11789 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11790 ovl.fmt.RXY.dl2,
11791 ovl.fmt.RXY.dh2); goto ok;
11792 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
11793 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
11794 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11795 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11796 ovl.fmt.RXY.dh2); goto ok;
11797 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
11798 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11799 ovl.fmt.RXY.dl2,
11800 ovl.fmt.RXY.dh2); goto ok;
11801 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
11802 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11803 ovl.fmt.RXY.dl2,
11804 ovl.fmt.RXY.dh2); goto ok;
11805 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
11806 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11807 ovl.fmt.RXY.dl2,
11808 ovl.fmt.RXY.dh2); goto ok;
11809 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
11810 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11811 ovl.fmt.RXY.dl2,
11812 ovl.fmt.RXY.dh2); goto ok;
11813 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
11814 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11815 ovl.fmt.RXY.dl2,
11816 ovl.fmt.RXY.dh2); goto ok;
11817 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
11818 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11819 ovl.fmt.RXY.dl2,
11820 ovl.fmt.RXY.dh2); goto ok;
11821 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
11822 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11823 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11824 ovl.fmt.RXY.dh2); goto ok;
11825 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
11826 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11827 ovl.fmt.RXY.dl2,
11828 ovl.fmt.RXY.dh2); goto ok;
11829 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
11830 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11831 ovl.fmt.RXY.dl2,
11832 ovl.fmt.RXY.dh2); goto ok;
11833 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
11834 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11835 ovl.fmt.RXY.dl2,
11836 ovl.fmt.RXY.dh2); goto ok;
11837 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
11838 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11839 ovl.fmt.RXY.dl2,
11840 ovl.fmt.RXY.dh2); goto ok;
11841 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
11842 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11843 ovl.fmt.RXY.dl2,
11844 ovl.fmt.RXY.dh2); goto ok;
11845 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
11846 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11847 ovl.fmt.RXY.dl2,
11848 ovl.fmt.RXY.dh2); goto ok;
11849 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
11850 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11851 ovl.fmt.RXY.dl2,
11852 ovl.fmt.RXY.dh2); goto ok;
11853 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
11854 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11855 ovl.fmt.RXY.dl2,
11856 ovl.fmt.RXY.dh2); goto ok;
11857 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
11858 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11859 ovl.fmt.RXY.dl2,
11860 ovl.fmt.RXY.dh2); goto ok;
11861 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
11862 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11863 ovl.fmt.RXY.dl2,
11864 ovl.fmt.RXY.dh2); goto ok;
11865 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
11866 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11867 ovl.fmt.RXY.dl2,
11868 ovl.fmt.RXY.dh2); goto ok;
11869 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
11870 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11871 ovl.fmt.RXY.dl2,
11872 ovl.fmt.RXY.dh2); goto ok;
11873 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
11874 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11875 ovl.fmt.RXY.dl2,
11876 ovl.fmt.RXY.dh2); goto ok;
11877 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
11878 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11879 ovl.fmt.RXY.dl2,
11880 ovl.fmt.RXY.dh2); goto ok;
11881 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
11882 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11883 ovl.fmt.RXY.dl2,
11884 ovl.fmt.RXY.dh2); goto ok;
11885 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
11886 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11887 ovl.fmt.RXY.dl2,
11888 ovl.fmt.RXY.dh2); goto ok;
11889 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
11890 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11891 ovl.fmt.RXY.dl2,
11892 ovl.fmt.RXY.dh2); goto ok;
11893 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
11894 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11895 ovl.fmt.RXY.dl2,
11896 ovl.fmt.RXY.dh2); goto ok;
11897 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
11898 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11899 ovl.fmt.RXY.dl2,
11900 ovl.fmt.RXY.dh2); goto ok;
11901 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
11902 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11903 ovl.fmt.RXY.dl2,
11904 ovl.fmt.RXY.dh2); goto ok;
11905 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
11906 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11907 ovl.fmt.RXY.dl2,
11908 ovl.fmt.RXY.dh2); goto ok;
11909 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
11910 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11911 ovl.fmt.RXY.dl2,
11912 ovl.fmt.RXY.dh2); goto ok;
11913 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
11914 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11915 ovl.fmt.RXY.dl2,
11916 ovl.fmt.RXY.dh2); goto ok;
11917 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
11918 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11919 ovl.fmt.RXY.dl2,
11920 ovl.fmt.RXY.dh2); goto ok;
11921 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
11922 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11923 ovl.fmt.RXY.dl2,
11924 ovl.fmt.RXY.dh2); goto ok;
11925 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
11926 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11927 ovl.fmt.RXY.dl2,
11928 ovl.fmt.RXY.dh2); goto ok;
11929 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
11930 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11931 ovl.fmt.RXY.dl2,
11932 ovl.fmt.RXY.dh2); goto ok;
11933 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
11934 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11935 ovl.fmt.RXY.dl2,
11936 ovl.fmt.RXY.dh2); goto ok;
11937 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
11938 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11939 ovl.fmt.RXY.dl2,
11940 ovl.fmt.RXY.dh2); goto ok;
11941 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
11942 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11943 ovl.fmt.RXY.dl2,
11944 ovl.fmt.RXY.dh2); goto ok;
11945 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
11946 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11947 ovl.fmt.RXY.dl2,
11948 ovl.fmt.RXY.dh2); goto ok;
11949 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
11950 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11951 ovl.fmt.RXY.dl2,
11952 ovl.fmt.RXY.dh2); goto ok;
11953 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
11954 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11955 ovl.fmt.RXY.dl2,
11956 ovl.fmt.RXY.dh2); goto ok;
11957 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
11958 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11959 ovl.fmt.RXY.dl2,
11960 ovl.fmt.RXY.dh2); goto ok;
11961 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
11962 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11963 ovl.fmt.RXY.dl2,
11964 ovl.fmt.RXY.dh2); goto ok;
11965 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
11966 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11967 ovl.fmt.RXY.dl2,
11968 ovl.fmt.RXY.dh2); goto ok;
11969 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
11970 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11971 ovl.fmt.RXY.dl2,
11972 ovl.fmt.RXY.dh2); goto ok;
11973 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
11974 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11975 ovl.fmt.RXY.dl2,
11976 ovl.fmt.RXY.dh2); goto ok;
11977 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
11978 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11979 ovl.fmt.RXY.dl2,
11980 ovl.fmt.RXY.dh2); goto ok;
11981 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
11982 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11983 ovl.fmt.RXY.dl2,
11984 ovl.fmt.RXY.dh2); goto ok;
11985 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
11986 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11987 ovl.fmt.RXY.dl2,
11988 ovl.fmt.RXY.dh2); goto ok;
11989 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
11990 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11991 ovl.fmt.RXY.dl2,
11992 ovl.fmt.RXY.dh2); goto ok;
11993 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
11994 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11995 ovl.fmt.RXY.dl2,
11996 ovl.fmt.RXY.dh2); goto ok;
11997 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
11998 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11999 ovl.fmt.RXY.dl2,
12000 ovl.fmt.RXY.dh2); goto ok;
12001 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12002 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12003 ovl.fmt.RXY.dl2,
12004 ovl.fmt.RXY.dh2); goto ok;
12005 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12006 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12007 ovl.fmt.RXY.dl2,
12008 ovl.fmt.RXY.dh2); goto ok;
12009 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12010 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12011 ovl.fmt.RXY.dl2,
12012 ovl.fmt.RXY.dh2); goto ok;
12013 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12014 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12015 ovl.fmt.RXY.dl2,
12016 ovl.fmt.RXY.dh2); goto ok;
12017 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12018 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12019 ovl.fmt.RXY.dl2,
12020 ovl.fmt.RXY.dh2); goto ok;
12021 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12022 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12023 ovl.fmt.RXY.dl2,
12024 ovl.fmt.RXY.dh2); goto ok;
12025 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12026 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12027 ovl.fmt.RXY.dl2,
12028 ovl.fmt.RXY.dh2); goto ok;
12029 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12030 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12031 ovl.fmt.RXY.dl2,
12032 ovl.fmt.RXY.dh2); goto ok;
12033 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12034 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12035 ovl.fmt.RXY.dl2,
12036 ovl.fmt.RXY.dh2); goto ok;
12037 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12038 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12039 ovl.fmt.RSY.dl2,
12040 ovl.fmt.RSY.dh2); goto ok;
12041 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12042 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12043 ovl.fmt.RSY.dl2,
12044 ovl.fmt.RSY.dh2); goto ok;
12045 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12046 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12047 ovl.fmt.RSY.dl2,
12048 ovl.fmt.RSY.dh2); goto ok;
12049 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12050 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12051 ovl.fmt.RSY.dl2,
12052 ovl.fmt.RSY.dh2); goto ok;
12053 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12054 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12055 ovl.fmt.RSY.dl2,
12056 ovl.fmt.RSY.dh2); goto ok;
12057 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12058 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12059 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12060 ovl.fmt.RSY.dl2,
12061 ovl.fmt.RSY.dh2); goto ok;
12062 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12063 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12064 ovl.fmt.RSY.dl2,
12065 ovl.fmt.RSY.dh2); goto ok;
12066 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12067 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12068 ovl.fmt.RSY.dl2,
12069 ovl.fmt.RSY.dh2); goto ok;
12070 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12071 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12072 ovl.fmt.RSY.dl2,
12073 ovl.fmt.RSY.dh2); goto ok;
12074 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12075 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12076 ovl.fmt.RSY.dl2,
12077 ovl.fmt.RSY.dh2); goto ok;
12078 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12079 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12080 ovl.fmt.RSY.dl2,
12081 ovl.fmt.RSY.dh2); goto ok;
12082 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12083 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12084 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12085 ovl.fmt.RSY.dl2,
12086 ovl.fmt.RSY.dh2); goto ok;
12087 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12088 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12089 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12090 ovl.fmt.RSY.dh2); goto ok;
12091 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12092 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12093 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12094 ovl.fmt.RSY.dh2); goto ok;
12095 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12096 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12097 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12098 ovl.fmt.RSY.dl2,
12099 ovl.fmt.RSY.dh2); goto ok;
12100 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12101 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12102 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12103 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12104 ovl.fmt.RSY.dl2,
12105 ovl.fmt.RSY.dh2); goto ok;
12106 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12107 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12108 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12109 ovl.fmt.RSY.dh2); goto ok;
12110 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12111 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12112 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12113 ovl.fmt.SIY.dh1); goto ok;
12114 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12115 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12116 ovl.fmt.SIY.dh1); goto ok;
12117 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12118 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12119 ovl.fmt.SIY.dh1); goto ok;
12120 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12121 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12122 ovl.fmt.SIY.dh1); goto ok;
12123 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12124 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12125 ovl.fmt.SIY.dh1); goto ok;
12126 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12127 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12128 ovl.fmt.SIY.dh1); goto ok;
12129 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12130 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12131 ovl.fmt.SIY.dh1); goto ok;
12132 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12133 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12134 ovl.fmt.SIY.dh1); goto ok;
12135 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12136 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12137 ovl.fmt.SIY.dh1); goto ok;
12138 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12139 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12140 ovl.fmt.SIY.dh1); goto ok;
12141 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12142 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12143 ovl.fmt.RSY.dl2,
12144 ovl.fmt.RSY.dh2); goto ok;
12145 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12146 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12147 ovl.fmt.RSY.dl2,
12148 ovl.fmt.RSY.dh2); goto ok;
12149 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12150 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12151 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12152 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12153 ovl.fmt.RSY.dl2,
12154 ovl.fmt.RSY.dh2); goto ok;
12155 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12156 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12157 ovl.fmt.RSY.dl2,
12158 ovl.fmt.RSY.dh2); goto ok;
12159 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12160 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12161 ovl.fmt.RSY.dl2,
12162 ovl.fmt.RSY.dh2); goto ok;
12163 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12164 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12165 ovl.fmt.RSY.dl2,
12166 ovl.fmt.RSY.dh2); goto ok;
12167 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12168 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12169 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12170 ovl.fmt.RSY.dh2); goto ok;
12171 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12172 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12173 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12174 ovl.fmt.RSY.dl2,
12175 ovl.fmt.RSY.dh2); goto ok;
12176 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12177 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12178 ovl.fmt.RSY.dl2,
12179 ovl.fmt.RSY.dh2); goto ok;
12180 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12181 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12182 ovl.fmt.RSY.dl2,
12183 ovl.fmt.RSY.dh2); goto ok;
12184 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12185 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12186 ovl.fmt.RSY.dl2,
12187 ovl.fmt.RSY.dh2); goto ok;
12188 case 0xeb00000000e2ULL: /* LOCG */ goto unimplemented;
12189 case 0xeb00000000e3ULL: /* STOCG */ goto unimplemented;
12190 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12191 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12192 ovl.fmt.RSY.dl2,
12193 ovl.fmt.RSY.dh2); goto ok;
12194 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12195 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12196 ovl.fmt.RSY.dl2,
12197 ovl.fmt.RSY.dh2); goto ok;
12198 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12199 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12200 ovl.fmt.RSY.dl2,
12201 ovl.fmt.RSY.dh2); goto ok;
12202 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12203 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12204 ovl.fmt.RSY.dl2,
12205 ovl.fmt.RSY.dh2); goto ok;
12206 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12207 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12208 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12209 ovl.fmt.RSY.dh2); goto ok;
12210 case 0xeb00000000f2ULL: /* LOC */ goto unimplemented;
12211 case 0xeb00000000f3ULL: /* STOC */ goto unimplemented;
12212 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12213 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12214 ovl.fmt.RSY.dl2,
12215 ovl.fmt.RSY.dh2); goto ok;
12216 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12217 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12218 ovl.fmt.RSY.dl2,
12219 ovl.fmt.RSY.dh2); goto ok;
12220 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12221 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12222 ovl.fmt.RSY.dl2,
12223 ovl.fmt.RSY.dh2); goto ok;
12224 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12225 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12226 ovl.fmt.RSY.dl2,
12227 ovl.fmt.RSY.dh2); goto ok;
12228 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12229 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12230 ovl.fmt.RSY.dl2,
12231 ovl.fmt.RSY.dh2); goto ok;
12232 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12233 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12234 goto ok;
12235 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12236 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12237 goto ok;
12238 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12239 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12240 ovl.fmt.RIE_RRUUU.r1,
12241 ovl.fmt.RIE_RRUUU.r2,
12242 ovl.fmt.RIE_RRUUU.i3,
12243 ovl.fmt.RIE_RRUUU.i4,
12244 ovl.fmt.RIE_RRUUU.i5);
12245 goto ok;
12246 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12247 ovl.fmt.RIE_RRUUU.r1,
12248 ovl.fmt.RIE_RRUUU.r2,
12249 ovl.fmt.RIE_RRUUU.i3,
12250 ovl.fmt.RIE_RRUUU.i4,
12251 ovl.fmt.RIE_RRUUU.i5);
12252 goto ok;
12253 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12254 ovl.fmt.RIE_RRUUU.r1,
12255 ovl.fmt.RIE_RRUUU.r2,
12256 ovl.fmt.RIE_RRUUU.i3,
12257 ovl.fmt.RIE_RRUUU.i4,
12258 ovl.fmt.RIE_RRUUU.i5);
12259 goto ok;
12260 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12261 ovl.fmt.RIE_RRUUU.r1,
12262 ovl.fmt.RIE_RRUUU.r2,
12263 ovl.fmt.RIE_RRUUU.i3,
12264 ovl.fmt.RIE_RRUUU.i4,
12265 ovl.fmt.RIE_RRUUU.i5);
12266 goto ok;
12267 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12268 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12269 ovl.fmt.RIE_RRPU.r1,
12270 ovl.fmt.RIE_RRPU.r2,
12271 ovl.fmt.RIE_RRPU.i4,
12272 ovl.fmt.RIE_RRPU.m3); goto ok;
12273 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12274 ovl.fmt.RIE_RRPU.r1,
12275 ovl.fmt.RIE_RRPU.r2,
12276 ovl.fmt.RIE_RRPU.i4,
12277 ovl.fmt.RIE_RRPU.m3); goto ok;
12278 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12279 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12280 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12281 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12282 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12283 ovl.fmt.RIE_RRPU.r1,
12284 ovl.fmt.RIE_RRPU.r2,
12285 ovl.fmt.RIE_RRPU.i4,
12286 ovl.fmt.RIE_RRPU.m3); goto ok;
12287 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12288 ovl.fmt.RIE_RRPU.r1,
12289 ovl.fmt.RIE_RRPU.r2,
12290 ovl.fmt.RIE_RRPU.i4,
12291 ovl.fmt.RIE_RRPU.m3); goto ok;
12292 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12293 ovl.fmt.RIEv3.r1,
12294 ovl.fmt.RIEv3.m3,
12295 ovl.fmt.RIEv3.i4,
12296 ovl.fmt.RIEv3.i2); goto ok;
12297 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12298 ovl.fmt.RIEv3.r1,
12299 ovl.fmt.RIEv3.m3,
12300 ovl.fmt.RIEv3.i4,
12301 ovl.fmt.RIEv3.i2); goto ok;
12302 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12303 ovl.fmt.RIEv3.r1,
12304 ovl.fmt.RIEv3.m3,
12305 ovl.fmt.RIEv3.i4,
12306 ovl.fmt.RIEv3.i2); goto ok;
12307 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12308 ovl.fmt.RIEv3.r1,
12309 ovl.fmt.RIEv3.m3,
12310 ovl.fmt.RIEv3.i4,
12311 ovl.fmt.RIEv3.i2); goto ok;
12312 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12313 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12314 goto ok;
12315 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12316 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12317 ovl.fmt.RIE.i2); goto ok;
12318 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12319 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12320 ovl.fmt.RIE.i2); goto ok;
12321 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12322 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12323 ovl.fmt.RIE.i2); goto ok;
12324 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12325 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12326 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12327 goto ok;
12328 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12329 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12330 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12331 goto ok;
12332 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12333 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12334 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12335 goto ok;
12336 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12337 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12338 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12339 goto ok;
12340 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12341 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12342 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12343 ovl.fmt.RIS.i2); goto ok;
12344 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12345 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12346 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12347 ovl.fmt.RIS.i2); goto ok;
12348 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12349 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12350 ovl.fmt.RIS.d4,
12351 ovl.fmt.RIS.i2); goto ok;
12352 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12353 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12354 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12355 ovl.fmt.RIS.i2); goto ok;
12356 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12357 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12358 ovl.fmt.RXE.d2); goto ok;
12359 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12360 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12361 ovl.fmt.RXE.d2); goto ok;
12362 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12363 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12364 ovl.fmt.RXE.d2); goto ok;
12365 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12366 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12367 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12368 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12369 ovl.fmt.RXE.d2); goto ok;
12370 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12371 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12372 ovl.fmt.RXE.d2); goto ok;
12373 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12374 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12375 ovl.fmt.RXE.d2); goto ok;
12376 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12377 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12378 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12379 ovl.fmt.RXE.d2); goto ok;
12380 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12381 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12382 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12383 ovl.fmt.RXF.r1); goto ok;
12384 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12385 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12386 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12387 ovl.fmt.RXF.r1); goto ok;
12388 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12389 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12390 ovl.fmt.RXE.d2); goto ok;
12391 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12392 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12393 ovl.fmt.RXE.d2); goto ok;
12394 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12395 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12396 ovl.fmt.RXE.d2); goto ok;
12397 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12398 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12399 ovl.fmt.RXE.d2); goto ok;
12400 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12401 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12402 ovl.fmt.RXE.d2); goto ok;
12403 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12404 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12405 ovl.fmt.RXE.d2); goto ok;
12406 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12407 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12408 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12409 ovl.fmt.RXE.d2); goto ok;
12410 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12411 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12412 ovl.fmt.RXE.d2); goto ok;
12413 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12414 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12415 ovl.fmt.RXE.d2); goto ok;
12416 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12417 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12418 ovl.fmt.RXE.d2); goto ok;
12419 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12420 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12421 ovl.fmt.RXE.d2); goto ok;
12422 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12423 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12424 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12425 ovl.fmt.RXF.r1); goto ok;
12426 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12427 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12428 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12429 ovl.fmt.RXF.r1); goto ok;
12430 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12431 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12432 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12433 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12434 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12435 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12436 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12437 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12438 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12439 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12440 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12441 case 0xed000000003bULL: /* MY */ goto unimplemented;
12442 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12443 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12444 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12445 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12446 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12447 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12448 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12449 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12450 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12451 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12452 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12453 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12454 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12455 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12456 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12457 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12458 ovl.fmt.RXY.dl2,
12459 ovl.fmt.RXY.dh2); goto ok;
12460 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12461 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12462 ovl.fmt.RXY.dl2,
12463 ovl.fmt.RXY.dh2); goto ok;
12464 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12465 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12466 ovl.fmt.RXY.dl2,
12467 ovl.fmt.RXY.dh2); goto ok;
12468 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12469 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12470 ovl.fmt.RXY.dl2,
12471 ovl.fmt.RXY.dh2); goto ok;
12472 }
12473
12474 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12475 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12476 ovl.fmt.RIL.i2); goto ok;
12477 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12478 ovl.fmt.RIL.i2); goto ok;
12479 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12480 ovl.fmt.RIL.i2); goto ok;
12481 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
12482 ovl.fmt.RIL.i2); goto ok;
12483 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
12484 ovl.fmt.RIL.i2); goto ok;
12485 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
12486 ovl.fmt.RIL.i2); goto ok;
12487 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
12488 ovl.fmt.RIL.i2); goto ok;
12489 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
12490 ovl.fmt.RIL.i2); goto ok;
12491 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
12492 ovl.fmt.RIL.i2); goto ok;
12493 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
12494 ovl.fmt.RIL.i2); goto ok;
12495 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
12496 ovl.fmt.RIL.i2); goto ok;
12497 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
12498 ovl.fmt.RIL.i2); goto ok;
12499 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
12500 ovl.fmt.RIL.i2); goto ok;
12501 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
12502 ovl.fmt.RIL.i2); goto ok;
12503 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
12504 ovl.fmt.RIL.i2); goto ok;
12505 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
12506 ovl.fmt.RIL.i2); goto ok;
12507 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
12508 ovl.fmt.RIL.i2); goto ok;
12509 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
12510 ovl.fmt.RIL.i2); goto ok;
12511 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
12512 ovl.fmt.RIL.i2); goto ok;
12513 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
12514 ovl.fmt.RIL.i2); goto ok;
12515 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
12516 ovl.fmt.RIL.i2); goto ok;
12517 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
12518 ovl.fmt.RIL.i2); goto ok;
12519 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
12520 ovl.fmt.RIL.i2); goto ok;
12521 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
12522 ovl.fmt.RIL.i2); goto ok;
12523 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
12524 ovl.fmt.RIL.i2); goto ok;
12525 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
12526 ovl.fmt.RIL.i2); goto ok;
12527 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
12528 ovl.fmt.RIL.i2); goto ok;
12529 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
12530 ovl.fmt.RIL.i2); goto ok;
12531 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
12532 ovl.fmt.RIL.i2); goto ok;
12533 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
12534 ovl.fmt.RIL.i2); goto ok;
12535 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
12536 ovl.fmt.RIL.i2); goto ok;
12537 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
12538 ovl.fmt.RIL.i2); goto ok;
12539 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
12540 ovl.fmt.RIL.i2); goto ok;
12541 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
12542 ovl.fmt.RIL.i2); goto ok;
12543 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
12544 ovl.fmt.RIL.i2); goto ok;
12545 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
12546 ovl.fmt.RIL.i2); goto ok;
12547 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
12548 ovl.fmt.RIL.i2); goto ok;
12549 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
12550 ovl.fmt.RIL.i2); goto ok;
12551 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
12552 ovl.fmt.RIL.i2); goto ok;
12553 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
12554 ovl.fmt.RIL.i2); goto ok;
12555 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
12556 ovl.fmt.RIL.i2); goto ok;
12557 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
12558 ovl.fmt.RIL.i2); goto ok;
12559 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
12560 ovl.fmt.RIL.i2); goto ok;
12561 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
12562 ovl.fmt.RIL.i2); goto ok;
12563 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
12564 ovl.fmt.RIL.i2); goto ok;
12565 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
12566 ovl.fmt.RIL.i2); goto ok;
12567 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
12568 ovl.fmt.RIL.i2); goto ok;
12569 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
12570 ovl.fmt.RIL.i2); goto ok;
12571 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
12572 ovl.fmt.RIL.i2); goto ok;
12573 case 0xc800ULL: /* MVCOS */ goto unimplemented;
12574 case 0xc801ULL: /* ECTG */ goto unimplemented;
12575 case 0xc802ULL: /* CSST */ goto unimplemented;
12576 case 0xc804ULL: /* LPD */ goto unimplemented;
12577 case 0xc805ULL: /* LPDG */ goto unimplemented;
12578 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
12579 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
12580 ovl.fmt.RIL.i2); goto ok;
12581 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
12582 ovl.fmt.RIL.i2); goto ok;
12583 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
12584 ovl.fmt.RIL.i2); goto ok;
12585 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
12586 ovl.fmt.RIL.i2); goto ok;
12587 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
12588 ovl.fmt.RIL.i2); goto ok;
12589 }
12590
12591 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
12592 case 0xd0ULL: /* TRTR */ goto unimplemented;
12593 case 0xd1ULL: /* MVN */ goto unimplemented;
12594 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
12595 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12596 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12597 case 0xd3ULL: /* MVZ */ goto unimplemented;
12598 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
12599 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12600 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12601 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
12602 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12603 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12604 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
12605 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12606 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000012607 case 0xd7ULL:
12608 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
12609 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
12610 else
12611 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
12612 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12613 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
12614 goto ok;
sewardj2019a972011-03-07 16:04:07 +000012615 case 0xd9ULL: /* MVCK */ goto unimplemented;
12616 case 0xdaULL: /* MVCP */ goto unimplemented;
12617 case 0xdbULL: /* MVCS */ goto unimplemented;
12618 case 0xdcULL: /* TR */ goto unimplemented;
12619 case 0xddULL: /* TRT */ goto unimplemented;
12620 case 0xdeULL: /* ED */ goto unimplemented;
12621 case 0xdfULL: /* EDMK */ goto unimplemented;
12622 case 0xe1ULL: /* PKU */ goto unimplemented;
12623 case 0xe2ULL: /* UNPKU */ goto unimplemented;
12624 case 0xe8ULL: /* MVCIN */ goto unimplemented;
12625 case 0xe9ULL: /* PKA */ goto unimplemented;
12626 case 0xeaULL: /* UNPKA */ goto unimplemented;
12627 case 0xeeULL: /* PLO */ goto unimplemented;
12628 case 0xefULL: /* LMD */ goto unimplemented;
12629 case 0xf0ULL: /* SRP */ goto unimplemented;
12630 case 0xf1ULL: /* MVO */ goto unimplemented;
12631 case 0xf2ULL: /* PACK */ goto unimplemented;
12632 case 0xf3ULL: /* UNPK */ goto unimplemented;
12633 case 0xf8ULL: /* ZAP */ goto unimplemented;
12634 case 0xf9ULL: /* CP */ goto unimplemented;
12635 case 0xfaULL: /* AP */ goto unimplemented;
12636 case 0xfbULL: /* SP */ goto unimplemented;
12637 case 0xfcULL: /* MP */ goto unimplemented;
12638 case 0xfdULL: /* DP */ goto unimplemented;
12639 }
12640
12641 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
12642 case 0xe500ULL: /* LASP */ goto unimplemented;
12643 case 0xe501ULL: /* TPROT */ goto unimplemented;
12644 case 0xe502ULL: /* STRAG */ goto unimplemented;
12645 case 0xe50eULL: /* MVCSK */ goto unimplemented;
12646 case 0xe50fULL: /* MVCDK */ goto unimplemented;
12647 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
12648 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12649 goto ok;
12650 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
12651 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12652 goto ok;
12653 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
12654 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12655 goto ok;
12656 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
12657 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12658 goto ok;
12659 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
12660 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12661 goto ok;
12662 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
12663 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12664 goto ok;
12665 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
12666 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12667 goto ok;
12668 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
12669 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12670 goto ok;
12671 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
12672 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12673 goto ok;
12674 }
12675
12676 return S390_DECODE_UNKNOWN_INSN;
12677
12678ok:
12679 return S390_DECODE_OK;
12680
12681unimplemented:
12682 return S390_DECODE_UNIMPLEMENTED_INSN;
12683}
12684
12685/* Handle "special" instructions. */
12686static s390_decode_t
12687s390_decode_special_and_irgen(UChar *bytes)
12688{
12689 s390_decode_t status = S390_DECODE_OK;
12690
12691 /* Got a "Special" instruction preamble. Which one is it? */
12692 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
12693 s390_irgen_client_request();
12694 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
12695 s390_irgen_guest_NRADDR();
12696 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
12697 s390_irgen_call_noredir();
12698 } else {
12699 /* We don't know what it is. */
12700 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
12701 }
12702
12703 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
12704
12705 return status;
12706}
12707
12708
12709/* Function returns # bytes that were decoded or 0 in case of failure */
12710UInt
12711s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
12712{
12713 s390_decode_t status;
12714
12715 dis_res = dres;
12716
12717 /* Spot the 8-byte preamble: 18ff lr r15,r15
12718 1811 lr r1,r1
12719 1822 lr r2,r2
12720 1833 lr r3,r3 */
12721 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
12722 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
12723 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
12724
12725 /* Handle special instruction that follows that preamble. */
12726 if (0) vex_printf("special function handling...\n");
12727 bytes += S390_SPECIAL_OP_PREAMBLE_SIZE;
12728 status = s390_decode_special_and_irgen(bytes);
12729 insn_length = S390_SPECIAL_OP_SIZE;
12730 } else {
12731 /* Handle normal instructions. */
12732 switch (insn_length) {
12733 case 2:
12734 status = s390_decode_2byte_and_irgen(bytes);
12735 break;
12736
12737 case 4:
12738 status = s390_decode_4byte_and_irgen(bytes);
12739 break;
12740
12741 case 6:
12742 status = s390_decode_6byte_and_irgen(bytes);
12743 break;
12744
12745 default:
12746 status = S390_DECODE_ERROR;
12747 break;
12748 }
12749 }
12750 /* next instruction is execute, stop here */
12751 if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) {
12752 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
12753 dis_res->whatNext = Dis_StopHere;
12754 }
12755
12756 if (status == S390_DECODE_OK) return insn_length; /* OK */
12757
12758 /* Decoding failed somehow */
12759 vex_printf("vex s390->IR: ");
12760 switch (status) {
12761 case S390_DECODE_UNKNOWN_INSN:
12762 vex_printf("unknown insn: ");
12763 break;
12764
12765 case S390_DECODE_UNIMPLEMENTED_INSN:
12766 vex_printf("unimplemented insn: ");
12767 break;
12768
12769 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
12770 vex_printf("unimplemented special insn: ");
12771 break;
12772
12773 default:
12774 case S390_DECODE_ERROR:
12775 vex_printf("decoding error: ");
12776 break;
12777 }
12778
12779 vex_printf("%02x%02x", bytes[0], bytes[1]);
12780 if (insn_length > 2) {
12781 vex_printf(" %02x%02x", bytes[2], bytes[3]);
12782 }
12783 if (insn_length > 4) {
12784 vex_printf(" %02x%02x", bytes[4], bytes[5]);
12785 }
12786 vex_printf("\n");
12787
12788 return 0; /* Failed */
12789}
12790
12791
12792/* Generate an IRExpr for an address. */
12793static __inline__ IRExpr *
12794mkaddr_expr(Addr64 addr)
12795{
12796 return IRExpr_Const(IRConst_U64(addr));
12797}
12798
12799
12800/* Disassemble a single instruction INSN into IR. */
12801static DisResult
12802disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64),
12803 void *callback_data)
12804{
12805 UChar byte;
12806 UInt insn_length;
12807 DisResult dres;
12808
12809 /* ---------------------------------------------------- */
12810 /* --- Compute instruction length -- */
12811 /* ---------------------------------------------------- */
12812
12813 /* Get the first byte of the insn. */
12814 byte = insn[0];
12815
12816 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
12817 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
12818 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
12819
12820 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
12821
12822 /* ---------------------------------------------------- */
12823 /* --- Initialise the DisResult data -- */
12824 /* ---------------------------------------------------- */
12825 dres.whatNext = Dis_Continue;
12826 dres.len = insn_length;
12827 dres.continueAt = 0;
12828
12829 /* fixs390: we should probably pass the resteer-function and the callback
12830 data. It's not needed for correctness but improves performance. */
12831
12832 /* Normal and special instruction handling starts here. */
12833 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
12834 /* All decode failures end up here. The decoder has already issued an
12835 error message.
12836 Tell the dispatcher that this insn cannot be decoded, and so has
12837 not been executed, and (is currently) the next to be executed.
12838 IA should be up-to-date since it made so at the start of each
12839 insn, but nevertheless be paranoid and update it again right
12840 now. */
12841 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
12842 mkaddr_expr(guest_IA_curr_instr)));
12843
12844 irsb->next = mkaddr_expr(guest_IA_curr_instr);
12845 irsb->jumpkind = Ijk_NoDecode;
12846 dres.whatNext = Dis_StopHere;
12847 dres.len = 0;
12848
12849 return dres;
12850 }
12851
12852 return dres;
12853}
12854
12855
12856/*------------------------------------------------------------*/
12857/*--- Top-level fn ---*/
12858/*------------------------------------------------------------*/
12859
12860/* Disassemble a single instruction into IR. The instruction
12861 is located in host memory at &guest_code[delta]. */
12862
12863DisResult
12864disInstr_S390(IRSB *irsb_IN,
12865 Bool put_IP,
12866 Bool (*resteerOkFn)(void *, Addr64),
12867 Bool resteerCisOk,
12868 void *callback_opaque,
12869 UChar *guest_code,
12870 Long delta,
12871 Addr64 guest_IP,
12872 VexArch guest_arch,
12873 VexArchInfo *archinfo,
12874 VexAbiInfo *abiinfo,
12875 Bool host_bigendian)
12876{
12877 vassert(guest_arch == VexArchS390X);
12878
12879 /* The instruction decoder requires a big-endian machine. */
12880 vassert(host_bigendian == True);
12881
12882 /* Set globals (see top of this file) */
12883 guest_IA_curr_instr = guest_IP;
12884
12885 irsb = irsb_IN;
12886
12887 vassert(guest_arch == VexArchS390X);
12888
12889 /* We may be asked to update the guest IA before going further. */
12890 if (put_IP)
12891 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
12892 mkaddr_expr(guest_IA_curr_instr)));
12893
12894 return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque);
12895}
12896
12897/*---------------------------------------------------------------*/
12898/*--- end guest_s390_toIR.c ---*/
12899/*---------------------------------------------------------------*/