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gerrit-public.fairphone.software / platform / external / valgrind / fbcaf3312f39fb73d54821636c6168db76245f61 / . / priv / guest-x86 / x86guest_defs.h
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sewardjc9a65702004-07-07 16:32:57 +0000[diff] [blame]1
2/*---------------------------------------------------------------*/
3/*--- ---*/
4/*--- This file (x86guest_defs.h) is ---*/
5/*--- Copyright (c) 2004 OpenWorks LLP. All rights reserved. ---*/
6/*--- ---*/
7/*---------------------------------------------------------------*/
8
9/* Only to be used within the guest-x86 directory. */
10
11/* Some of this stuff is taken from QEMU, which is Copyright (c) 2003
12 Fabrice Bellard, and licensed under the LGPL. */
13
14#ifndef __LIBVEX_X86GUEST_DEFS_H
15#define __LIBVEX_X86GUEST_DEFS_H
16
17
18/*---------------------------------------------------------*/
19/*--- x86 to IR conversion ---*/
20/*---------------------------------------------------------*/
21
22extern
23IRBB* bbToIR_X86Instr ( Char* x86code,
24 Addr64 eip,
25 Int* guest_bytes_read,
26 Bool (*byte_accessible)(Addr64),
27 Bool host_bigendian );
28
29
30/*---------------------------------------------------------*/
31/*--- Condition code stuff ---*/
32/*---------------------------------------------------------*/
33
34/* eflags masks */
35#define CC_C 0x0001
36#define CC_P 0x0004
37#define CC_A 0x0010
38#define CC_Z 0x0040
39#define CC_S 0x0080
40#define CC_O 0x0800
41
42/* eflags thunk descriptors. */
43enum {
44 CC_OP_COPY, /* nothing to do -- ccs are in CC_SRC and up to date */
45
46 CC_OP_MULB, /* modify all flags, C, O = (CC_SRC != 0) */
47 CC_OP_MULW,
48 CC_OP_MULL,
49
50 CC_OP_ADDB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
51 CC_OP_ADDW,
52 CC_OP_ADDL,
53
54 CC_OP_ADCB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
55 CC_OP_ADCW,
56 CC_OP_ADCL,
57
58 CC_OP_SUBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
59 CC_OP_SUBW,
60 CC_OP_SUBL,
61
62 CC_OP_SBBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
63 CC_OP_SBBW,
64 CC_OP_SBBL,
65
66 CC_OP_LOGICB, /* modify all flags, CC_DST = res */
67 CC_OP_LOGICW,
68 CC_OP_LOGICL,
69
70 CC_OP_INCB, /* modify all flags except, CC_DST = res, CC_SRC = C */
71 CC_OP_INCW,
72 CC_OP_INCL,
73
74 CC_OP_DECB, /* modify all flags except, CC_DST = res, CC_SRC = C */
75 CC_OP_DECW,
76 CC_OP_DECL,
77
78 CC_OP_SHLB, /* modify all flags, CC_DST = res, CC_SRC = res' */
79 CC_OP_SHLW, /* where res' is like res but shifted one bit less */
80 CC_OP_SHLL,
81
82 CC_OP_SARB, /* modify all flags, CC_DST = res, CC_SRC = res' */
83 CC_OP_SARW, /* where res' is like res but shifted one bit less */
84 CC_OP_SARL,
85
86 CC_OP_NB,
87};
88
89/* called from generated code to evaluate the flags-thunk. */
90extern UInt calculate_c ( void );
91extern UInt calculate_all ( void );
92
93
94/*---------------------------------------------------------*/
95/*--- Simulated state offsets ---*/
96/*---------------------------------------------------------*/
97
98/* Hmm, subregisters. The simulated state is stored in memory in the
99 host's byte ordering, so we can't say here what the offsets of %ax,
100 %al, %ah etc are since that depends on the host's byte ordering,
101 which we don't know. */
102
103#define OFFB_EAX (0*4)
104#define OFFB_ECX (1*4)
105#define OFFB_EDX (2*4)
106#define OFFB_EBX (3*4)
107#define OFFB_ESP (4*4)
108#define OFFB_EBP (5*4)
109#define OFFB_ESI (6*4)
110#define OFFB_EDI (7*4)
111/* 3-word thunk used to calculate O S Z A C P flags. */
112#define OFFB_CC_OP (8*4)
113#define OFFB_CC_SRC (9*4)
114#define OFFB_CC_DST (10*4)
115/* The D flag is stored here, as either -1 or +1 */
116#define OFFB_DFLAG (11*4)
117/* EIP */
118#define OFFB_EIF (12*4)
119
120
121#define SIZEOF_X86H_STATE OFFB_EIF
122
123
124
125#endif /* ndef __LIBVEX_X86GUEST_DEFS_H */
126
127/*---------------------------------------------------------------*/
128/*--- end x86guest_defs.h ---*/
129/*---------------------------------------------------------------*/