| sewardj | f0c1250 | 2014-01-12 12:54:00 +0000 | [diff] [blame] | 1 | |
| 2 | ## HOW TO Cross-CONFIGURE |
| 3 | |
| 4 | export CC=aarch64-linux-gnu-gcc |
| 5 | export LD=aarch64-linux-gnu-ld |
| 6 | export AR=aarch64-linux-gnu-ar |
| 7 | |
| 8 | ./autogen.sh |
| 9 | ./configure --prefix=`pwd`/Inst --host=aarch64-unknown-linux --enable-only64bit |
| 10 | |
| 11 | ############################################################## |
| 12 | |
| 13 | UnwindStartRegs -- what should that contain? |
| 14 | |
| 15 | |
| 16 | |
| 17 | vki-arm64-linux.h: vki_sigaction_base |
| 18 | |
| 19 | I really don't think that __vki_sigrestore_t sa_restorer |
| 20 | should be present. Adding it surely puts sa_mask at a wrong |
| 21 | offset compared to (kernel) reality. But not having it causes |
| 22 | compilation of m_signals.c to fail in hard to understand ways, |
| 23 | so adding it temporarily. |
| 24 | |
| 25 | |
| 26 | m_trampoline.S: what's the unexecutable-insn value? 0xFFFFFFFF |
| 27 | is there at the moment, but 0x00000000 is probably what it should be. |
| 28 | Also, fix indentation/tab-vs-space stuff |
| 29 | |
| 30 | |
| 31 | ./include/vki/vki-arm64-linux.h: uses __uint128_t. Should change |
| 32 | it to __vki_uint128_t, but what's the defn of that? |
| 33 | |
| 34 | |
| 35 | |
| 36 | m_debuginfo/priv_storage.h: need proper defn of DiCfSI |
| 37 | |
| 38 | |
| 39 | readdwarf.c: is this correct? |
| 40 | #elif defined(VGP_arm64_linux) |
| 41 | # define FP_REG 29 //??? |
| 42 | # define SP_REG 31 //??? |
| 43 | # define RA_REG_DEFAULT 30 //??? |
| 44 | |
| 45 | |
| 46 | vki-arm64-linux.h: |
| 47 | re linux-3.10.5/include/uapi/asm-generic/sembuf.h |
| 48 | I'd say the amd64 version has padding it shouldn't have. Check? |
| 49 | |
| 50 | |
| 51 | |
| 52 | syswrap-linux.c run_a_thread_NORETURN assembly sections |
| 53 | seems like tst->os_state.exitcode has word type |
| 54 | in which case the ppc64_linux use of lwz to read it, is wrong |
| 55 | |
| 56 | |
| 57 | |
| 58 | syswrap-linux.c ML_(do_fork_clone) |
| 59 | assuming that VGP_arm64_linux is the same as VGP_arm_linux here |
| 60 | |
| 61 | |
| 62 | |
| 63 | dispatch-arm64-linux.S: FIXME: set up FP control state before |
| 64 | entering generated code. Also fix screwy indentation. |
| 65 | |
| 66 | dispatcher-ery general: what's a good (predictor-friendly) way to |
| 67 | branch to a register? |
| 68 | |
| 69 | |
| 70 | |
| 71 | in vki-arm64-scnums.h |
| 72 | //#if __BITS_PER_LONG == 64 && !defined(__SYSCALL_COMPAT) |
| 73 | Probably want to reenable that and clean up accordingly |
| 74 | |
| 75 | |
| 76 | |
| 77 | putIRegXXorZR: figure out a way that the computed value is actually |
| 78 | used, so as to keep any memory reads that might generate it, alive. |
| 79 | (else the simulation can lose exceptions). At least, for writes to |
| 80 | the zero register generated by loads .. or .. can anything other |
| 81 | integer instructions, that write to a register, cause exceptions? |
| 82 | |
| 83 | |
| 84 | |
| 85 | loads/stores: generate stack alignment checks as necessary |
| 86 | |
| 87 | |
| 88 | |
| 89 | fix barrier insns: ISB, DMB |
| 90 | |
| 91 | |
| 92 | |
| 93 | fix atomic loads/stores |
| 94 | |
| 95 | |
| 96 | |
| 97 | FMADD/FMSUB/FNMADD/FNMSUB: generate and use the relevant fused |
| 98 | IROps so as to avoid double rounding |
| 99 | |
| 100 | |
| 101 | |
| 102 | ARM64Instr_Call getRegUsage: re-check relative to what |
| 103 | getAllocableRegs_ARM64 makes available |
| 104 | |
| 105 | |
| 106 | |
| 107 | Make dispatch-arm64-linux.S save any callee-saved Q regs |
| 108 | I think what is required is to save D8-D15 and nothing more than that. |
| 109 | |
| 110 | |
| 111 | |
| 112 | wrapper for __NR3264_fstat -- correct? |
| 113 | |
| 114 | |
| 115 | |
| 116 | PRE(sys_clone): get rid of references to vki_modify_ldt_t |
| 117 | and the definition of it in vki-arm64-linux.h. Ditto for |
| 118 | 32 bit arm. |
| 119 | |
| 120 | |
| 121 | |
| 122 | sigframe-arm64-linux.c: build_sigframe: references to nonexistent |
| 123 | siguc->uc_mcontext.trap_no, siguc->uc_mcontext.error_code have been |
| 124 | replaced by zero. Also in synth_ucontext. |
| 125 | |
| 126 | |
| 127 | |
| 128 | m_debugger.c: |
| 129 | uregs.pstate = LibVEX_GuestARM64_get_nzcv(vex); /* is this correct? */ |
| 130 | Is that remotely correct? |
| 131 | |
| 132 | |
| 133 | |
| 134 | host_arm64_defs.c: emit_ARM64INstr: |
| 135 | ARM64in_VDfromX and ARM64in_VQfromXX: use simple top-half zeroing |
| 136 | MOVs to vector registers instead of INS Vd.D[0], Xreg, to avoid false |
| 137 | dependencies on the top half of the register. (Or at least check |
| 138 | the semantocs of INS Vd.D[0] to see if it zeroes out the top.) |
| 139 | |
| 140 | |
| 141 | |
| 142 | preferredVectorSubTypeFromSize: review perf effects and decide |
| 143 | on a types-for-subparts policy |
| 144 | |
| 145 | |
| 146 | |
| 147 | fold_IRExpr_Unop: add a reduction rule for this |
| 148 | 1Sto64(CmpNEZ64( Or64(GET:I64(1192),GET:I64(1184)) )) |
| 149 | vis 1Sto64(CmpNEZ64(x)) --> CmpwNEZ64(x) |
| 150 | |
| 151 | |
| 152 | |
| 153 | check insn selection for memcheck-only primops: |
| 154 | Left64 CmpwNEZ64 V128to64 V128HIto64 1Sto64 CmpNEZ64 CmpNEZ32 |
| 155 | widen_z_8_to_64 1Sto32 Left32 32HLto64 CmpwNEZ32 CmpNEZ8 |
| 156 | |
| 157 | |
| 158 | |
| 159 | isel: get rid of various cases where zero is put into a register |
| 160 | and just use xzr instead. Especially for CmpNEZ64/32. And for |
| 161 | writing zeroes into the CC thunk fields. |
| 162 | |
| 163 | |
| 164 | |
| 165 | /* Keep this list in sync with that in iselNext below */ |
| 166 | /* Keep this list in sync with that for Ist_Exit above */ |
| 167 | uh .. they are not in sync |
| 168 | |
| 169 | |
| 170 | |
| 171 | very stupid: |
| 172 | imm64 x23, 0xFFFFFFFFFFFFFFA0 |
| 173 | 17 F4 9F D2 F7 FF BF F2 F7 FF DF F2 F7 FF FF F2 |
| 174 | |
| 175 | |
| 176 | |
| 177 | valgrind.h: fix VALGRIND_ALIGN_STACK/VALGRIND_RESTORE_STACK, |
| 178 | also add CFI annotations |
| sewardj | fdaf9e4 | 2014-01-13 00:18:51 +0000 | [diff] [blame^] | 179 | |
| 180 | |
| 181 | |
| 182 | could possibly bring r29 into use, which be useful as it is |
| 183 | callee saved |