- 1a3bfac Followup to r1562: fixes for ppc64 by sewardj · 19 years ago
- b183b85 by sewardj · 19 years ago
- 157b19b Do fre/fres in a way which makes minimal demands on the backend. by sewardj · 19 years ago
- 7bbac21 F64i isel fix. by sewardj · 19 years ago
- 79fd33f Handle fre and frsqrtes. Even though the IBM docs manage to by sewardj · 19 years ago
- 2ef8a37 Make lsw work in 64-bit mode. by sewardj · 19 years ago
- 3fd3967 Un-break ppc64 following recent hw-capabilities hackery. (sigh) by sewardj · 19 years ago
- 7c54586 Unbreak ppc32 following recent hw-capabilities hackery. by sewardj · 19 years ago
- 5117ce1 Change the way Vex represents architecture variants into something by sewardj · 19 years ago
- 09e88d1 Re-enable stfiwx. by sewardj · 19 years ago
- baf971a Handle ppc32/64 fres, frsqrte. by sewardj · 19 years ago
- c74373d In 32-bit mode, handle F64toI64 and I64toF64. by sewardj · 19 years ago
- 7fd5bb0 A bit more backend tidying: by sewardj · 19 years ago
- 92923de by sewardj · 19 years ago
- 6332740 C89 fixes. by sewardj · 19 years ago
- 2bb062d Tidy up the ppc instruction selector a bit. This is almost all cosmetic: by sewardj · 19 years ago
- 7c6dbff Comment-only change: remove commented out code (lots of), change by sewardj · 19 years ago
- 6be6723 Minor tweaks to handle instructions created by xlc 7.0. by sewardj · 19 years ago
- 870c84b Re-enable fsqrts. by sewardj · 19 years ago
- aa60ddf The ppc32 port ran itself out of spill slots on some heavy duty FP code. by sewardj · 19 years ago
- 5ff11dd More ppc64-only function wrapping hacks: by sewardj · 19 years ago
- 9dd9cf1 Add Ijk_EmFail, a new kind of IR block exit: an emulation failure by sewardj · 19 years ago
- cf8986c For ppc64, emit AbiHints from the front end so as to tell tools when by sewardj · 19 years ago
- c716aea Two different sets of changes (hard to disentangle): by sewardj · 19 years ago
- be482ae Give the ppc64 guest state a 16-entry pseudo-register array, by sewardj · 19 years ago
- 6e53088 Teach the ppc back end (64-bit mode only) how to deal with PutI and by sewardj · 19 years ago
- 1eb7e6b Update fn redirect/wrap hooks for ppc64. by sewardj · 19 years ago
- ce02aa7 Merge in function wrapping support from the FNWRAP branch. That by sewardj · 19 years ago
- 3e616e6 Implement clflush. by sewardj · 19 years ago
- e43bc88 ppc: deal with L flag properly for different sync forms. by cerion · 19 years ago
- 3ea49ee ppc: re-enable mtfsb1 instruction. by cerion · 19 years ago
- 7277be5 Fix magic-sequence spotting in 64-bit mode. by sewardj · 19 years ago
- 20f4061 Add missing function. by sewardj · 19 years ago
- dba87e2 ppc64 altivec: by cerion · 19 years ago
- 4c4f5ef Handle ppc64's function ptr's for toIR.c's dirtyhelper calls. by cerion · 19 years ago
- 36d982b Handle ppc64's function ptr's in bb_to_IR::do_self_check. by cerion · 19 years ago
- 4e2c2b3 ppc64 fixes: by cerion · 19 years ago
- 88a9908 ppc64: handle 32HLto64, 64HLtoV128 by cerion · 19 years ago
- aa87c71 ppc64: handle V128to64, V128HIto64. by sewardj · 19 years ago
- 33c69e5 x86 counterpart to r1521: For SSE scalar comparison operations where by sewardj · 19 years ago
- ab9055b For SSE scalar comparison operations where one operand is in memory, by sewardj · 19 years ago
- b029a61 Apparently "sync" has an undocumented relative called "lwsync". Sigh. by sewardj · 19 years ago
- cb1f68e Handle dcbz in 64-bit mode. by sewardj · 19 years ago
- a9e4a80 Performance improvements for flag handling. by sewardj · 19 years ago
- dc12d39 Comment-only fix by sewardj · 19 years ago
- 7594920 Comment only changes - misc refs to ppc32 changed to ppc. by cerion · 19 years ago
- 4628ccd Put mode64 in ISelEnv, removing global variable. by cerion · 19 years ago
- fb197c4 Fix AltiVec load/store on ppc64 - was only considering lo32 bits of address. by cerion · 19 years ago
- 347da2c Handle 64HLto128 in 64-bit mode. by sewardj · 19 years ago
- d0eae2d renamed VEX dirs guest-ppc32/ -> guest-ppc/, host-ppc32/ -> host-ppc/ by cerion · 19 years ago
- a5e5f5f Update comment. by sewardj · 19 years ago
- 47bd753 Deal with backend case of 1Sto64 by cerion · 19 years ago
- 5b2325f Changed naming convention from 'PPC32' to 'PPC' for all VEX code common to both PPC32 and PPC64. by cerion · 19 years ago
- 07b07a9 Implemented almost all of the remaining 64bit-mode insns. by cerion · 19 years ago
- 09bbf50 small fixes for ppc64 layout stuff by sewardj · 19 years ago
- a162c2c Strict-aliasing fix needed to make gcc-4.1.0 happy. by sewardj · 19 years ago
- 59b2c31 Fix typos. by cerion · 19 years ago
- 8f53e99 Fix switchback.c to reflect changes to call of LibVEX_Translate() by cerion · 19 years ago
- bb01b7c Fixed up front and backend for 32bit mul,div,cmp,shift in mode64 by cerion · 19 years ago
- f774505 ppc32/64 backend: take r29 out of circulation so the Valgrind by sewardj · 19 years ago
- b8a8dba Make suitable changes for ppc32/ppc64 following recent x86/amd64 by sewardj · 19 years ago
- 0528bb5 Modify amd64 backend to use jump-jump scheme rather than call-return scheme. by sewardj · 19 years ago
- 17c7f95 - x86 back end: change code generation convention, so that instead of by sewardj · 19 years ago
- 18e3189 Stop gcc complaining. by sewardj · 19 years ago
- 876ef41 Enable fsqrt Document store fp single-precision problem by cerion · 19 years ago
- 9139119 More svn:ignores for VEX. by cerion · 19 years ago
- 6ded389 Switchbacker updates by cerion · 19 years ago
- 7d730cf Fix vex_printf padding. by cerion · 19 years ago
- f0de28c Implemented backend for ppc64, sharing ppc32 backend. by cerion · 19 years ago
- 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
- 7a3e39c fix padding for VexGuestPPC64State by cerion · 19 years ago
- 729edb7 Re-enabled ppc32 frontend floating point load/store single precision insns: by cerion · 19 years ago
- 2831b00 Fixed a couple of mode32 bugs introduced by mode64 by cerion · 19 years ago
- df07b88 Fix %lr handling for bcctr and bclr. by sewardj · 19 years ago
- 5df65bb Set mode64 from the given guest subarch. by sewardj · 19 years ago
- dd56a48 Missed this in commit of vex: r1475 (ppc64 first pass) by cerion · 19 years ago
- d953ebb First pass at VEX support of ppc64. by cerion · 19 years ago
- f9517d0 Modify the tree builder to use a fixed-size binding environment rather by sewardj · 19 years ago
- ba97adb 3rd go at making args match format string. by sewardj · 19 years ago
- 66afb9f 64-bit format string fix by sewardj · 19 years ago
- 4eeda9c Be paranoid about the alignment of the storage arrays. by sewardj · 19 years ago
- 2d6b14a Use a very fast in-line allocator. This improves its performance by by sewardj · 19 years ago
- 2573c25 Compile vex at -O2. This improves its performance by about 15% by sewardj · 19 years ago
- 2ead522 Do float-to-bit-image conversion in a way which does not break ANSI C by sewardj · 19 years ago
- 41a7b70 gcc-2.96 build fixes by sewardj · 19 years ago
- edf7fc5 Cleaned up access to 'special purpose' registers. by cerion · 19 years ago
- 8f3bc90 Track valgrind r5196, wrt Non-Java mode by cerion · 19 years ago
- 76de5cf Cleaned up toIR.c somewhat by cerion · 19 years ago
- d963eb4 Implemented most of the remaining altivec fp ops: by cerion · 19 years ago
- f294eb3 Yet more irops, for fp vector conversion/rounding. by cerion · 19 years ago
- bfceb08 Implement SSE2 'clflush'. by sewardj · 19 years ago
- bc5948e delete unused multiply primops by sewardj · 19 years ago
- f7da610 gcc4 picked up a typo. by cerion · 19 years ago
- f3f173c More av insns: vmaddfp, vnmsubfp by cerion · 19 years ago
- 8ea0d3e Frontend by cerion · 19 years ago
- 206c364 New irops: Iop_CmpGT32Fx4, Iop_CmpGE32Fx4 by cerion · 19 years ago
- 77fd846 More profiling-induced speedups. by sewardj · 19 years ago
- 4b06a0b Add some flag-specialisation cases that profiling showed the need for. by sewardj · 19 years ago
- 059601a Revise the PPC32 subarchitecture kinds, so as to facilitated by sewardj · 19 years ago
- d37be03 Always mark blrl as a return. by sewardj · 19 years ago