1. 2f6902b For each backend, unify the sets of IRJumpKinds handled for Ist_Exit by sewardj · 12 years ago
  2. 623d65b Fix makefile to allow compilation with gcc -g3. by florian · 12 years ago
  3. 1c2b4db tchain optimization for s390 (continued) by florian · 12 years ago
  4. ebaf8d9 tchain optimisation for s390 (VEX bits) by florian · 12 years ago
  5. 6f1dede Rename to VEX_S390X_MODEL_UNKNOWN. by florian · 12 years ago
  6. 65b5b3f (post-tchain-merge cleanup) Stop s390x asserting on illegal insns. by florian · 12 years ago
  7. 0e047d6 (post-tchain-merge cleanup): Use ASI and AGSI for increment / decrement if by florian · 12 years ago
  8. bf516d1 (post-tchain-merge cleanup): Tighten up some asserts. by florian · 12 years ago
  9. 90ece04 Fix debug print for hwcaps adding stfle ad etf2. by florian · 12 years ago
  10. 39aacda (post-tchain-merge cleanup): x86: handle a couple more syscall kinds by sewardj · 12 years ago
  11. 172ff56 chainXDirect_ARM: generate direct jumps when possible. by sewardj · 12 years ago
  12. 3e8ba60 Ain_XDirect, Ain_XIndir: use short form encodings where possible. by sewardj · 12 years ago
  13. 53d8455 (post-tchain-merge cleanup) remove temp supporting hack "IRStmt_Exit3" by sewardj · 12 years ago
  14. 3d0e38e (post-tchain-merge cleanup) Stop x86/amd64 asserting on illegal insns. by sewardj · 12 years ago
  15. f26994a We incorrectly stored the archinfo_host argument of iselSB_S390 into by florian · 12 years ago
  16. db01409 Merge branches/TCHAIN from r2271 (its creation point) into trunk. by sewardj · 12 years ago
  17. ed055d0 Add a spec rule for NE after COPY. by sewardj · 12 years ago
  18. da9a9f5 Comment-only change. by sewardj · 12 years ago
  19. 87ce6d7 Avoid word-size warnings when this is compiled on 64 bit platforms. by sewardj · 12 years ago
  20. f252de5 Changes to make t-chaining work on ppc64-linux. More fun than a by sewardj · 12 years ago
  21. 48cb961 Minor non-functional tweak. by florian · 12 years ago
  22. 9e1cf15 Fill in some more bits to do with t-chaining for ppc64 by sewardj · 12 years ago
  23. 3dee849 Add translation chaining support for ppc32 (tested) and to by sewardj · 12 years ago
  24. 8559e41 Correctly update the guest IA at the end of an insn to point to by florian · 12 years ago
  25. f9e1ed7 More fixes: by florian · 12 years ago
  26. 1c85704 Fix s390_tchain_patch_load64; some bytes were mixed up. by florian · 12 years ago
  27. 2d98d89 Make the list of handled jump kinds the same in s390_isel_stmt and iselNext. by florian · 12 years ago
  28. 37dd895 No idea what happened here. Fixed as obvious. by florian · 12 years ago
  29. 96c5f26 Deal with CLFLUSH, which were not correctly dealt with (w.r.t. new IR by sewardj · 12 years ago
  30. ae71d36 No need to handle Ijk_Sys_int32 which is specific to amd64. by florian · 12 years ago
  31. 7346c7a First round of fixes: some cut'n paste errors. And the guest_IA in by florian · 12 years ago
  32. e857804 Extend CSE to cover CSEing of clean helper calls. This gives a by sewardj · 12 years ago
  33. 8844a63 Translation chaining for s390. To be debugged. by florian · 12 years ago
  34. 0f62198 ado_treebuild_BB: don't allow loads to be floated past CASs. by sewardj · 12 years ago
  35. 26217b0 by sewardj · 12 years ago
  36. 0548cdb Improve the behaviour of 64-to/from-80 bit QNaN conversions, so that by sewardj · 12 years ago
  37. d51f2fd ARMin_MFence: implement using ARMv7 insns instead of the legacy mcr-15 by sewardj · 12 years ago
  38. bda6ed3 Add %J format to s390_sprintf. New function s390_jump_kind_as_string. by florian · 12 years ago
  39. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
  40. c66d6fa Fixes for capabilities checking w.r.t. Power DFP instructions (VEX by sewardj · 12 years ago
  41. 3cd525c Make a copy of r2270/r12476 for work on translation chaining. by sewardj · 12 years ago
  42. c6bbd47 Initial support for POWER Processor decimal floating point instruction by sewardj · 12 years ago
  43. 428dfdd Consolidate guest state offset computation. There is only by florian · 12 years ago
  44. cf4be4a gcc seems to have taken to generating "orl $0xFFFFFFFF, %reg32" to get by sewardj · 12 years ago
  45. 616458b Remove prototype for non-existing function. Fix vpanic call. by florian · 12 years ago
  46. fd5f4a4 For (T3) "ADD (SP plus register)", allow "add rX, SP, rY, lsl by sewardj · 12 years ago
  47. 7e8c692 Rename function. We want to be able to extract implemented by florian · 12 years ago
  48. 40defd4 This is a followup to r2263. Use offsetof. by florian · 12 years ago
  49. 9429028 Do not assume that a pointer is the worst-aligned data type. Fixes #283671 by florian · 12 years ago
  50. 558fc97 Ignore redundant REX prefix on 4 byte form of PMOVMSKB. BZ#294736. by tom · 12 years ago
  51. 3a05a15 Add a spec rule for SUBQ/NBE. by sewardj · 12 years ago
  52. 4d5bce2 Implementation of SSE 4.1 MPSADBW instruction. Fixes #294048. by sewardj · 12 years ago
  53. 1aa3aef Don't claim to support 3dnow or 3dnowext on the baseline x86_64 by sewardj · 12 years ago
  54. ad43b3a Improve code generation on s390x for assignment of constant by florian · 12 years ago
  55. 1331f4d Accept DMB (mcr 15, 0, rT, c7, c10, 5) for any rT <= 14, not just when rT = r0. by sewardj · 12 years ago
  56. 8cb931e Implement PHMINPOSUW (SSE 4.1). Fixes #287301. by sewardj · 12 years ago
  57. db54660 Re-enable RET $imm16 following insn decoding framework rework. by sewardj · 12 years ago
  58. 3c3d6d6 Add support for some 16-bit PCMPxSTRx variants. Prior to this point by sewardj · 12 years ago
  59. 9ae42a7 Adds 16 and 32 bit fnsave/frstor, and 0x66 prefix on fldl, to guest amd64. by sewardj · 12 years ago
  60. 30fc058 Re-enable CLFLUSH in the new decoding framework. Fixes #293808. by sewardj · 12 years ago
  61. 84af676 Broadens the range on INT imm8 values that SIGSEGV, allowing Jikes RVM to work. by sewardj · 12 years ago
  62. 26de964 Add a spec rule for HI after SUB. This turns up quite a lot on my Nexus S. by sewardj · 12 years ago
  63. dc7948f Add some VEX sanity checks for ppc64 unhandled instructions. by florian · 12 years ago
  64. 708417d In fold_Expr use a switch instead of an if-chain for clarity and efficiency. by florian · 12 years ago
  65. ff4d6be * fix Bug 290655 - Add support for AESKEYGENASSIST instruction by philippe · 12 years ago
  66. cdb5fee This patch is a follow-up to r2244 which fixed bugzilla #287260 on by florian · 12 years ago
  67. 730448f Implement TR, TRE, TRTT, TROT, TRTO insns. by florian · 13 years ago
  68. f6402ab Rewrite algebraic transformations for binary operators. by florian · 13 years ago
  69. 80611e3 Merge, from AVX branch, everything up to and including r2242 by sewardj · 13 years ago
  70. ee31366 Revert accidental check in (part of r2240). by florian · 13 years ago
  71. 5351853 Revert r2238. In 64-bit mode the length is in bits 0:63. by florian · 13 years ago
  72. 7700fc9 Remove broken support for TS insn in s390 port. The by florian · 13 years ago
  73. b51d459 Followup to r2237. The length is in bits 32:63 only -- not 0:63. by florian · 13 years ago
  74. 9af3769 Add support for the s390's TROO insn. These are the VEX bits. by florian · 13 years ago
  75. fd75ddc Add a comment about setting aside a register for VG_(dispatch_ctr) on s390. by florian · 13 years ago
  76. a782a17 When reinterpreting a 32 bit int as a float we need to move it by florian · 13 years ago
  77. 4d71a08 Handle Iop_ReinterpF32asI32 and Iop_ReinterpI32asF32 in insn selection. by florian · 13 years ago
  78. 9627fe8 Iop_1Uto64 was not handled in the ppc insn selector. by florian · 13 years ago
  79. 4ff2a1a Update comment in r2229 to place the blame in the right place. by sewardj · 13 years ago
  80. 0f30dbc x86g_dirtyhelper_FXRSTOR: work around what looks like a LLVM bug, by sewardj · 13 years ago
  81. 51016d1 Handle "add.w reg, sp, #constT" and "addw reg, sp, #uimm12" for reg != by sewardj · 13 years ago
  82. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  83. b394076 Fix the guest state definition for s390x and introduce dummy members by florian · 13 years ago
  84. ad2c9ea VEX side fixes to match r12190, which is a fix for #279698 (incorrect by sewardj · 13 years ago
  85. ed0b953 Fix timerfd-syscall testcase on s390x. by florian · 13 years ago
  86. 260abb1 Handle Thumb2 ROR (register) encoding T2. #284472. by sewardj · 13 years ago
  87. 666e64c Ignore redundant REX.W on PTEST. #279071. (Jakub Jelinek, jakub@redhat.com) by sewardj · 13 years ago
  88. 94fb5b0 Handle PCMPxSTRx case 0x38. Fixes #273318. by sewardj · 13 years ago
  89. d881562 Implement the SSE4.1 insn PCMPEQQ. n-i-bz. (VEX side changes) by sewardj · 13 years ago
  90. bb75ba8 Implement SSE4.1 PMULUDQ. Fixes #280290. ** MERGE TO AVX ** by sewardj · 13 years ago
  91. f580065 Mark IR level calls and returns derived from ARM and Thumb code by sewardj · 13 years ago
  92. 4f9581e Ignore the precision flag in the ROUND{SS,SD,PS,PD} rounding mode. by tom · 13 years ago
  93. 6828dc7 arm backend: general (fallback) case handling for 64HLtoV128 by sewardj · 13 years ago
  94. 6d615ba Support ARM and Thumb "CLREX" instructions since Dalvik generates by sewardj · 13 years ago
  95. 1b2768a Add another slot on the stack frame used in the dispatcher. by florian · 13 years ago
  96. 2eeeb9b Document and assert that needs_self_check of VexTranslateArgs must not be NULL. by florian · 13 years ago
  97. 540acf5 Add a couple of spec rules for MI and PL after LOGIC. These are by sewardj · 13 years ago
  98. 26bc482 Add some counter arrays for profiling N,Z,C,V flag evaluations. by sewardj · 13 years ago
  99. 285c24d Add a couple more spec rules: LO after SUB and GT after SUB. by sewardj · 13 years ago
  100. 7b2f8f0 Enable move coalescing for Neon (vector) moves. Reduces code by sewardj · 13 years ago