- 3616a2e Remove, or (where it might later come in handy) comment out artefacts by sewardj · 12 years ago
- c4530ae Add initial support for Intel AVX instructions (VEX side). by sewardj · 12 years ago
- cdc376d POWER Processor decimal floating point instruction support, part 3 by sewardj · 12 years ago
- e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
- 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
- 6c299f3 Merge r1925:1948 from branches/ARM. This temporarily breaks all other by sewardj · 15 years ago
- cef7d3e by sewardj · 15 years ago[Renamed (96%) from priv/host-generic/h_generic_regs.h]
- a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 17 years ago
- fb7373a Merge, from CGTUNE branch: by sewardj · 17 years ago
- 7fb65eb x86 back end: use 80-bit loads/stores for floating point spills rather by sewardj · 17 years ago
- e744153 Update copyright dates. by sewardj · 18 years ago
- a33e9a4 Update copyright dates. by sewardj · 18 years ago
- 40c8026 Redo the way FP multiply-accumulate insns are done on ppc32/64. by sewardj · 19 years ago
- 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
- 7bd6ffe by sewardj · 19 years ago
- dbcfae7 by sewardj · 19 years ago
- 6485f25 Fix comment. by sewardj · 19 years ago
- 1001dc4 Make a start on floating point for AMD64. by sewardj · 20 years ago
- adc8fd8 increased N_HREG_USAGE for host-ppc32 by cerion · 20 years ago
- 5827784 More typechecker police. Hopefully this doesn't break anything. by sewardj · 20 years ago
- 05b3b6a Fix many instruction selection cases, including function calls. by sewardj · 20 years ago
- 38a3f86 On x86 host and guest, re-implement the way MMX instructions are done, by sewardj · 20 years ago
- b5749b0 Fix nonsensical assertion. by sewardj · 20 years ago
- 1e6ad74 x86 guest/host: do SSE comparisons. by sewardj · 20 years ago
- 4a31b26 In the back end, rename the register classes (in enum HRegClass) more by sewardj · 20 years ago
- f8ed9d8 Add copyright notices. by sewardj · 20 years ago
- 81ec418 New regime for baseblock layout, as described in comment in by sewardj · 20 years ago
- 666fbac A bit more inlining of small fns. by sewardj · 20 years ago
- c0ee2ed Make compilation work again after renaming files. by sewardj · 20 years ago[Renamed from priv/host-generic/h_gen_regs.h]
- 5a820d9 More file renaming (still borked) by sewardj · 20 years ago[Renamed from priv/host-generic/host_regs.h]
- 1f40a0a - Fix up verbosity control. by sewardj · 20 years ago
- 2b51587 - Pass host-specific insn and register printing functions to by sewardj · 20 years ago
- 887a11a Rename everything to use the "vex" name. by sewardj · 20 years ago
- 35421a3 Major hashing around to restructure the world. by sewardj · 20 years ago
- 3e1b2d2 Start to move files into a new structure. by sewardj · 20 years ago[Renamed from include/host_regs.h]
- 6f37cce * Take into account register classes when assigning spill slots. by sewardj · 20 years ago
- 194d54a * Move the x86 genSpill/genRestore functions to the right place. by sewardj · 20 years ago
- 0ec3325 Make reg allocator work, to a first approximation at least. by sewardj · 20 years ago
- 2cd80dc Tie everything together enough so the reg-allocator can be test-run. by sewardj · 20 years ago
- 53f85a9 Add getRegUsage and mapRegs functions for X86 instructions. Tedious. by sewardj · 20 years ago
- b3d4ce7 Complete reg-alloc output storage, and misc other stuff to make it by sewardj · 20 years ago
- af5a522 Get the register allocator a lot closer to compiling. by sewardj · 20 years ago
- 8bc26ee Support stuff for register allocation. by sewardj · 20 years ago
- c97096c First draft of tree-based instruction selector. by sewardj · 20 years ago