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gerrit-public.fairphone.software / platform / external / valgrind / ad00ea9f40f930d98bb2d278291a6c4c6636d6d6 / priv / guest_mips_toIR.c
  1. 166d645 mips64: add support for Cavium BBIT032 and BBIT132 by petarj · 10 years ago
  2. 830ef70 mips: use putDReg/getDReg for ceil.l.d by petarj · 10 years ago
  3. 8462d11 Constification part 4. by florian · 10 years ago
  4. ef6f26a mips64: fix jmpKind for BLTZ and BGEZ by petarj · 10 years ago
  5. a90baf7 mips64: implement Cavium BBIT0 and BBIT1 instructions by petarj · 10 years ago
  6. c328e15 mips: fix typo (IRType/IRTemp) by petarj · 10 years ago
  7. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  8. d3194d1 mips: Fix non mips compiler warning. by dejanj · 10 years ago
  9. 6ced72b mips64: Support for Cavium MIPS Octeon Atomic and Count Instructions. by dejanj · 10 years ago
  10. 05f5e01 Renaming only (no functional change): rename IR artefacts to do by sewardj · 10 years ago
  11. b176a6f mips32: Fix the problem with reading the guest_FCSR register from the wrong guest state. by dejanj · 10 years ago
  12. f37c086 mips32: Fix the problem with the floating point compare instruction on mips32. by dejanj · 10 years ago
  13. 0e006f2 mips32: VEX Support for 64bit FPU on MIPS32 platforms. by dejanj · 10 years ago
  14. 95d9e8f mips64: add support for load indexed instructions from DSP ASE by petarj · 10 years ago
  15. d20794a mips64: Support for Cavium-specific load indexed instructions by petarj · 10 years ago
  16. 4183322 mips32/64: Fixed the problem with fpu instructions. by dejanj · 11 years ago
  17. 781f1bd mips32: Fix problem with some mips32 dsp instructions. by dejanj · 11 years ago
  18. a445f1b mips32: Fixed the problem with FCSR register. by dejanj · 11 years ago
  19. 8007ea6 mips32/mips64: additional VEX support for FCSR register. by dejanj · 11 years ago
  20. 5cc3b45 mips64: VEX support for MIPS64 Octeon Instructions by petarj · 11 years ago
  21. bc7d6f4 mips: clean-up in hardware detection (Cavium/DSP ASEs) by petarj · 11 years ago
  22. e3a103f mips32/mips64: Fix the problem with lwl and lwr for mips32 and mips64. by dejanj · 11 years ago
  23. 9041956 Eliminate IRExprP__VECRET and IRExprP__BBPTR and introduce two new by florian · 11 years ago
  24. 74142b8 Add infrastructural support (IR, VEX) to allow returns of 128- by sewardj · 11 years ago
  25. befee0b Do not use the 0b notation as older GCC's do not accept it. by florian · 11 years ago
  26. 9875715 mips32: Correctly model SHLL_S.PH on MIPS32. by dejanj · 11 years ago
  27. c3fee0d mips32: Add support for mips32 DSP instruction set. by dejanj · 11 years ago
  28. 70a2606 mips64: fix 'unused variable' warning by petarj · 11 years ago
  29. ccd78cd mips32/mips64: implement sdl, sdr, swl and swr without reading memory by petarj · 11 years ago
  30. 1fb1e34 mips: fix some style issues, non-functional change by petarj · 11 years ago
  31. bc3af3c mips: fix corner case for INS instruction by petarj · 11 years ago
  32. 0c30de8 mips: fix endian issues for LWL, LWR, LDR and LDL for mips64 by petarj · 11 years ago
  33. fdb2a4c mips: fix for some warnings in mips files when compiling on amd64/x86 by petarj · 11 years ago
  34. b92a954 mips: adding MIPS64LE support to VEX by petarj · 11 years ago
  35. d456418 Follow-up on r2664-r2668 changes for IRExpr_Mux0X and Iex_Mux0X for MIPS32. by petarj · 11 years ago
  36. 99dd03e Infrastructure cleanup part 2. by florian · 11 years ago
  37. f94ebbd mips: fix for mips-disassembler when branch is at block_size-2 position by petarj · 12 years ago
  38. 442e51a Make diagnostics for SIGILL more controllable (VEX part). by sewardj · 12 years ago
  39. 590875f Fix compilation warning on non-mips targets (rm was flagged as unused) by sewardj · 12 years ago
  40. a6a1986 Add a proper support for several MIPS instructions that generate SigFPE. by petarj · 12 years ago
  41. be927ba Correcting how load/store doubles are modelled on MIPS for big-endian. by petarj · 12 years ago
  42. 1ec43e0 Load/store doubles on MIPS are modeled through Ity_F64 rather than two Ity_F32. by petarj · 12 years ago
  43. 2245ce9 VEX-side support for the V-bit tester. by florian · 12 years ago
  44. c5b8bb7 Add more debug print information for the instructions for MIPS. by petarj · 12 years ago
  45. 39aa96a Fix for incorrectly passed params to IRExpr_Mux0X in MIPS port. by petarj · 12 years ago
  46. 191c6eb Small improvement for getIReg on MIPS when reading from r0. by petarj · 12 years ago
  47. 362cf84 Merge in a port for mips32-linux, by Petar Jovanovic and Dejan Jevtic, by sewardj · 12 years ago