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gerrit-public.fairphone.software / platform / external / valgrind / ad00ea9f40f930d98bb2d278291a6c4c6636d6d6 / priv / guest_x86_toIR.c
  1. 8462d11 Constification part 4. by florian · 10 years ago
  2. 1ddee21 Rename IROps for reciprocal estimate, reciprocal step, reciprocal sqrt by sewardj · 10 years ago
  3. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  4. 05f5e01 Renaming only (no functional change): rename IR artefacts to do by sewardj · 10 years ago
  5. e9c51c9 x87 instructions FSIN, FCOS, FSINCOS and FPTAN: handle out-of-range by sewardj · 10 years ago
  6. f0bb679 Add support for syscall on x86 by tom · 10 years ago
  7. 9571dc0 Make the following primops take a third (initial) argument to by sewardj · 10 years ago
  8. 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
  9. 1bf44e3 x86 front ends: tighten up decoding of MOV Ib,Eb and MOV Iv,Ev. This by sewardj · 11 years ago
  10. 6c65c12 Support mmxext (integer sse) subset on i386 (athlon). by mjw · 11 years ago
  11. 9041956 Eliminate IRExprP__VECRET and IRExprP__BBPTR and introduce two new by florian · 11 years ago
  12. 74142b8 Add infrastructural support (IR, VEX) to allow returns of 128- by sewardj · 11 years ago
  13. 99dd03e Infrastructure cleanup part 2. by florian · 11 years ago
  14. 009230b Infrastructure cleanup: change type of the condition field of by sewardj · 11 years ago
  15. 442e51a Make diagnostics for SIGILL more controllable (VEX part). by sewardj · 12 years ago
  16. 55085f8 Changes for -Wwrite-strings by florian · 12 years ago
  17. e13074c Improve accuracy of definedness tracking through the x86 PMOVMSKB and by sewardj · 12 years ago
  18. 2245ce9 VEX-side support for the V-bit tester. by florian · 12 years ago
  19. 6ef84be Followup to r2483, purely mechanical. Rename: by florian · 12 years ago
  20. 021f6b4 Implement MOVBE in 32 bit mode. Fixes #304867. (Ambroz Bizjak, by sewardj · 12 years ago
  21. c8851af Fix LZCNT and TZCNT properly. Fixes #295808. (Jakub Jelinek, jakub@redhat.com) by sewardj · 12 years ago
  22. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  23. c9069f2 Enhance the guest state effects notation on IRDirty calls, so as to be by sewardj · 12 years ago
  24. d6f38b3 Reduce size of an IRStmt from 40 bytes to 32 bytes on LP64 by florian · 12 years ago
  25. 96c5f26 Deal with CLFLUSH, which were not correctly dealt with (w.r.t. new IR by sewardj · 12 years ago
  26. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
  27. 84af676 Broadens the range on INT imm8 values that SIGSEGV, allowing Jikes RVM to work. by sewardj · 12 years ago
  28. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  29. d6b43fd Support alternate (C0 /6) encoding of SHL on x86 and amd64. Fixes #209995. by tom · 13 years ago
  30. e3aa016 Support FEMMS in x86 mode as we already do for amd64. Fix for #204574. by tom · 13 years ago
  31. 5f438dd Rename and rationalise the vector narrowing and widening primops, so by sewardj · 13 years ago
  32. c9bff7d Partially fix underspecification of saturating narrowing primops that by sewardj · 13 years ago
  33. 17b0e21 Don't overwrite CC_NDEP in shift by zero. Fixes #269354. by sewardj · 13 years ago
  34. ec993de Add alignment checking for FXSAVE/FXRSTOR. by sewardj · 14 years ago
  35. 321bbbf Add support for AAD and AAM (base 10 only). Fixes #256387. by sewardj · 14 years ago
  36. 45ca0b9 Add alignment checks to MOVDQA and a bunch of other SSE insns which by sewardj · 14 years ago
  37. 33ca4ac Handle the undocumented but apparently-actually-used instruction by sewardj · 14 years ago
  38. 0283430 Don't trash the ELF ABI redzone for amd64 when emulating BT{,S,R,C} by sewardj · 14 years ago
  39. 536fbab Only decode LZCNT if the host supports it, since otherwise we risk by sewardj · 14 years ago
  40. 9a660ea Support the amd SSE4.something LZCNT instruction. Fixes #212335 by sewardj · 14 years ago
  41. b727161 Support the SSE4 insn 'roundss' in 32-bit mode. Lack of this was by sewardj · 14 years ago
  42. b9dc243 Implement SIDT and SGDT as pass-throughs to the host. It's a pretty by sewardj · 14 years ago
  43. c2433a8 Implement XADD reg,reg (Nicolas Sauzede, nicolas.sauzede@st.com). Fixes #195662. by sewardj · 14 years ago
  44. deceef8 Handle more x86 NOP forms, as required by Fedora 13. Fixes bug by sewardj · 14 years ago
  45. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  46. 30a20e9 CVTPI2PD (which converts 2 x I32 in M64 or MMX to 2 x F64 in XMM): by sewardj · 14 years ago
  47. 0d925b1 x86/amd64 front ends: don't chase a conditional branch that leads by sewardj · 15 years ago
  48. 984d9b1 by sewardj · 15 years ago
  49. 6c299f3 Merge r1925:1948 from branches/ARM. This temporarily breaks all other by sewardj · 15 years ago
  50. e768e92 by sewardj · 15 years ago
  51. 40d1d21 Fix disassembly printing of cmpxchg insns (don't print "lock" twice). by sewardj · 15 years ago
  52. 1fb8c92 Add new integer comparison primitives Iop_CasCmp{EQ,NE}{8,16,32,64}, by sewardj · 15 years ago
  53. cef7d3e by sewardj · 15 years ago[Renamed (99%) from priv/guest-x86/toIR.c]
  54. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  55. e86310f In order to make it possible for Valgrind to restart client syscalls by sewardj · 15 years ago
  56. d660d41 Initial VEX-end support for Darwin (x86 and amd64). by sewardj · 16 years ago
  57. b7ba04f Handle "movsd G,E" for G and E both regs. This is the non-binutils by sewardj · 16 years ago
  58. 792d771 In 32-bit mode only, accept primary opcode 0x82 and treat it the same by sewardj · 16 years ago
  59. 1d2e77f Translate "fnstsw %ax" in a slightly different way, which plays better by sewardj · 16 years ago
  60. 068baa2 Compute the starting address of the instruction correctly. This has by sewardj · 16 years ago
  61. 3800e2d Handle fxrstor on x86. Fixes #126389. by sewardj · 16 years ago
  62. dd9095e Allow pushfw and popfw. Fixes #157748. by sewardj · 16 years ago
  63. 842dfb4 Enable repne cmps{b,w,l}. Fixes #153196. by sewardj · 16 years ago
  64. 478646f Merge branches/OTRACK_BY_INSTRUMENTATION into the trunk. This by sewardj · 16 years ago
  65. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
  66. 32bfd3e Fix CPUID: by sewardj · 16 years ago
  67. 150c9cd by sewardj · 16 years ago
  68. 0e9a0f5 Very kludgey implementation of IRET. May or may not fix #155011. by sewardj · 17 years ago
  69. dfb038d Implement lods{b,w,l}. Fixes #152818. by sewardj · 17 years ago
  70. 8edc36b Implement DAA/DAS/AAA/AAS. Really stupid and ugly instructions which by sewardj · 17 years ago
  71. a384eb9 Implement SALC. Fixes #147628. by sewardj · 17 years ago
  72. c4356f0 by sewardj · 17 years ago
  73. 0f50004 Support x86 $int 0x40 .. 0x43 instructions on Linux. Apparently these by sewardj · 17 years ago
  74. eb17e49 Merge from CGTUNE branch: by sewardj · 17 years ago
  75. 905edbd Implement lahf/sahf on amd64. Also set NDEP on x86 sahf. Fixes #143907. by sewardj · 17 years ago
  76. 9c3b25a Fix various cases where the instruction decoder asserted/paniced by sewardj · 17 years ago
  77. d51dc81 x86 front end: synthesise SIGILL in the normal way for some obscure by sewardj · 17 years ago
  78. d8a6fe8 Handle the (bizarre) no-op "26 2E 64 65 90 %es:%cs:%fs:%gs:nop". This by sewardj · 17 years ago
  79. 322bfa0 Support 'INT $3' instruction. by sewardj · 17 years ago
  80. e744153 Update copyright dates. by sewardj · 18 years ago
  81. 87f471d Handle recent binutils padding "nopw %cs:0x0(%eax,%eax,1)" by sewardj · 18 years ago
  82. d71ba83 x86 front end: Implement MASKMOVQ (MMX class insn, introduced in SSE1) by sewardj · 18 years ago
  83. dd40fdf by sewardj · 18 years ago
  84. 2890582 Handle long-form encoding of 'push{l,w} %reg'. by sewardj · 18 years ago
  85. dc5d084 Handle JCXZ. by sewardj · 18 years ago
  86. cea9662 Re-enable 'repne movs' (fix for original bug in #126147). by sewardj · 18 years ago
  87. b69a6fa Re-enable 'repne stos' (fix for Gernot Tenchio's part of #126147). by sewardj · 18 years ago
  88. 048de4d Implement 'xlat' (fixes #125959 and #135012). by sewardj · 18 years ago
  89. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  90. c4255a0 Stop mkU16 asserting if d32 is a negative 16-bit number (bug #132813). by sewardj · 18 years ago
  91. dd5d204 Handle all SSE3 instructions except monitor and mwait. 64-bit by sewardj · 18 years ago
  92. ec387ca Handle nop-with-an-amode (sheesh. Mutancy. whatever next?) for x86 and by sewardj · 18 years ago
  93. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  94. fcff178 Support 'popw m16'. Fixes #126243. by sewardj · 18 years ago
  95. 6ba982f Fix incorrect behaviour of mov{s,z}bw (#126253). by sewardj · 18 years ago
  96. a5f55da Don't use the bits VexArchInfo.hwcaps to distinguish ppc32 and ppc64, by sewardj · 18 years ago
  97. 576f323 Allow 'repe scas' (possible fix for #124892). by sewardj · 18 years ago
  98. 5c5f72c Fix some segment register pushes/pops. by sewardj · 18 years ago
  99. 879cee0 Move the helper function for x86 'fxtract' to g_generic_x87.c so by sewardj · 18 years ago
  100. d8862cf Fix debug printing. by sewardj · 18 years ago