1. d8c64e0 Constification part 5. by florian · 10 years ago
  2. 8462d11 Constification part 4. by florian · 10 years ago
  3. 7d6f81d Constification part 2. by florian · 10 years ago
  4. 9b76916 Improve infrastructure for dealing with endianness in VEX. This patch by sewardj · 10 years ago
  5. 89ae847 Update copyright dates (20XY-2012 ==> 20XY-2013) by sewardj · 11 years ago
  6. cfe046e Merge, from branches/COMEM, revisions 2568 to 2641. by sewardj · 12 years ago
  7. 55085f8 Changes for -Wwrite-strings by florian · 12 years ago
  8. 58a637b Make header files compilable by itself to get two benefits: by florian · 12 years ago
  9. 25e5473 Update copyright dates to include 2012. by sewardj · 12 years ago
  10. 3616a2e Remove, or (where it might later come in handy) comment out artefacts by sewardj · 12 years ago
  11. c4530ae Add initial support for Intel AVX instructions (VEX side). by sewardj · 12 years ago
  12. c6f970f Add translation chaining support for amd64, x86 and ARM (VEX side). See #296422. by sewardj · 12 years ago
  13. e6c53e0 Update all copyright dates, from 20xy-2010 to 20xy-2011. by sewardj · 13 years ago
  14. 9cc2bbf Improvements to code generation for 32 bit instructions. When by sewardj · 13 years ago
  15. 010ac54 x86 and amd64 back ends: when generating transfers back to the by sewardj · 13 years ago
  16. ca257bc Minor amd64 instruction selection improvements, leading to a by sewardj · 14 years ago
  17. d15b597 Implement ROUNDSS (partial implementation, in the case where by sewardj · 14 years ago
  18. 752f906 Update copyright dates to 2010 and change license to standard GPL2+. by sewardj · 14 years ago
  19. 2a1ed8e Make the x86 and amd64 back ends use the revised prototypes for by sewardj · 15 years ago
  20. cef7d3e by sewardj · 15 years ago[Renamed (98%) from priv/host-amd64/hdefs.h]
  21. e9d8a26 Merge in branches/DCAS: by sewardj · 15 years ago
  22. 4970e4e Support FPREM1 on amd64. Fixes #172563. by sewardj · 16 years ago
  23. a26d820 Update copyright dates ("200X-2007" --> "200X-2008"). by sewardj · 16 years ago
  24. 6ce1a23 Counterpart to r1745: teach the amd64 back end how to generate 'lea' by sewardj · 17 years ago
  25. e744153 Update copyright dates. by sewardj · 18 years ago
  26. dd40fdf by sewardj · 18 years ago
  27. aca070a Merge r1663-r1666: by sewardj · 18 years ago
  28. f4c803b Add support for amd64 'fprem' (fixes bug 132918). This isn't exactly by sewardj · 18 years ago
  29. a33e9a4 Update copyright dates. by sewardj · 18 years ago
  30. 8f07359 Counterpart to r1605: in the ppc insn selector, don't use the bits by sewardj · 18 years ago
  31. 4796d66 Fixups following recent FP rounding mode changes. by sewardj · 18 years ago
  32. 0528bb5 Modify amd64 backend to use jump-jump scheme rather than call-return scheme. by sewardj · 19 years ago
  33. 92b6436 Added 'Bool mode64' to the various backend functions, to distinguish 32/64bit arch's. by cerion · 19 years ago
  34. 7bd6ffe by sewardj · 19 years ago
  35. dbcfae7 by sewardj · 19 years ago
  36. 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
  37. 501a339 AMD64 backend cleanup: get rid of instruction variants which the insn by sewardj · 19 years ago
  38. 5992bd0 Lots more SSE2 instructions. by sewardj · 19 years ago
  39. adffcef SSE2, on and on and on. There are more different SSE2 instructions by sewardj · 19 years ago
  40. 9762859 Enough SSE2 instructions to sink a small ship. And that's not even by sewardj · 19 years ago
  41. 5e20537 Even more x87 instructions. by sewardj · 19 years ago
  42. 25a8581 Make a whole bunch more x87 instructions work on amd64. by sewardj · 19 years ago
  43. 0971734 Implement a whole bunch more SSE instructions on amd64. by sewardj · 19 years ago
  44. 4c328cf Play a few more rounds of the SSE game on amd64. by sewardj · 19 years ago
  45. 571d289 Fix comment. by sewardj · 19 years ago
  46. f53b735 More AMD64 instructions: sfence, movnti, bsf{w,l,q} by sewardj · 19 years ago
  47. a5bd0af Fix some isel cases pertaining to 1-bit values. This makes lackey by sewardj · 19 years ago
  48. 8d96531 Fill in a huge number of amd64 floating point cases, and start to by sewardj · 19 years ago
  49. 1a01e65 Many amd64 FP cases, including conversion to/from int (tedious stuff). by sewardj · 19 years ago
  50. 1830386 amd64 guest/host floating point square root (easy) and comparisons (difficult) by sewardj · 19 years ago
  51. 1001dc4 Make a start on floating point for AMD64. by sewardj · 19 years ago
  52. 7de0d3c Fill in many amd64 integer cases. by sewardj · 19 years ago
  53. d0a12df Fill in many amd64 front end and back end cases. by sewardj · 19 years ago
  54. 9b96767 Add a new IR type -- 128-bit integral (I128) and a small collection of by sewardj · 19 years ago
  55. 53df061 'movabsq' instruction definitions. by sewardj · 19 years ago
  56. 05b3b6a Fix many instruction selection cases, including function calls. by sewardj · 19 years ago
  57. f67eadf Fix enough stuff so that the first bb goes through, up to and by sewardj · 19 years ago
  58. 8258a8c Do a bunch more basic integer instruction selection cases. by sewardj · 19 years ago
  59. 614b3fb My first AMD64 instruction. Ga. Goo. (etc) by sewardj · 19 years ago
  60. c33671d Get the AMD64 back-end show on the road. by sewardj · 19 years ago
  61. a3e9830 Files for amd64 back end. by sewardj · 19 years ago