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gerrit-public.fairphone.software / platform / external / valgrind / bdf99f06a5f44fd617c51ac80861ff07da09a50f / priv
  1. bdf99f0 Change remaining use of Addr64 in the VEX API to Addr. The reduces by florian · 10 years ago
  2. dcd6d23 Change the IMark statement. The address is now type Addr and the by florian · 10 years ago
  3. 8e2d971 The length of a disassemnled insn is always positive. by florian · 10 years ago
  4. 0eaa35f Give DisResult::continueAt Addr type. by florian · 10 years ago
  5. d4cc0de Make VexTranslateArgs::guest_bytes_addr an Addr value. Fix ripple. by florian · 10 years ago
  6. beac530 It has long been assumed that host and guest architectures by florian · 10 years ago
  7. a0ef1de As a library, VEX should not export the offsetof and vg_alignof by florian · 10 years ago
  8. 9190bef Add a missing header file. by florian · 10 years ago
  9. 04fc6b1 Change a few prototypes to use SizeT. Also, offsetof returns a SizeT value. by florian · 10 years ago
  10. c66ba65 Add type SizeT (moved here from valgrind's pub_tool_basics.h). by florian · 10 years ago
  11. dc36943 Remove a few dead assignments. by florian · 10 years ago
  12. 8a45a4e Audit a buffer. by florian · 10 years ago
  13. e2cc4de Fix 197259 Unsupported arch_prtctl PR_SET_GS option by philippe · 10 years ago
  14. e554042 Tweak a format specifier. Remove a redundant assert. by florian · 10 years ago
  15. cacba8e More constification. by florian · 10 years ago
  16. d1b8312 Remove some debugging code that was accidentally checked in in r3038 by florian · 10 years ago
  17. f3652c9 Today this is what happens when we encounter hwcaps we cannot handle: by florian · 10 years ago
  18. eebdb2b New function vfatal which should be used for user messages by florian · 10 years ago
  19. a35a6db Fix incorrect implementation of AESKEYGENASSIST in the case where by sewardj · 10 years ago
  20. 9f07e86 Update x86 decoder as per advise from Julian. by florian · 10 years ago
  21. dc6e747 The long displacement facility is now required. There were a by florian · 10 years ago
  22. 3eb7bab Export s390_host_hwcaps in LibVEX_Translate, so we can use it in by florian · 10 years ago
  23. 49adf86 Add a few more asserts. Fix a function prototype. by florian · 10 years ago
  24. fb59660 DFP insns should cause an emulation failure if the host cannot by florian · 10 years ago
  25. ad00ea9 Encountering a PFPO insn in a client program while running on a host by florian · 10 years ago
  26. 2a4de0b Fix some verbiage. by florian · 10 years ago
  27. 166d645 mips64: add support for Cavium BBIT032 and BBIT132 by petarj · 10 years ago
  28. 9e1c2b0 Implement FRINTI d_d, s_s. by sewardj · 10 years ago
  29. ca95f2d Implement RORV x_x_x, w_w_w by sewardj · 10 years ago
  30. 928540c Implement CLS x_x, w_w by sewardj · 10 years ago
  31. 39b5168 arm64: implement "BRK #imm16". by sewardj · 10 years ago
  32. 406ac94 Add function s390_isel_amode_b12_b20 to compile an expression into an by florian · 10 years ago
  33. 608e560 Remove dead code. by florian · 10 years ago
  34. 266d596 arm64: enable FCVT{A,N}S X,S. by sewardj · 10 years ago
  35. 1aff76b Implement {S,U}CVTF (scalar, fixedpt). by sewardj · 10 years ago
  36. d6d13b3 Implement VFPv4 VFNMA, VFNMS d_d and s_s variants (not that by sewardj · 10 years ago
  37. b963eef Fix stupid bug introduced in r2993, which causes many simple scalar by sewardj · 10 years ago
  38. 76927e6 Implement arm64 insns: by sewardj · 10 years ago
  39. 0728a52 Implement "fcvtpu w, s". n-i-bz. by sewardj · 10 years ago
  40. e23ec11 Implement fcsel d_d, s_s. Fixes #340856. by sewardj · 10 years ago
  41. d2c19b4 Add detection of old ppc32 magic instructions from bug 278808. by mjw · 10 years ago
  42. e3a10d7 Add a nasty temporary kludge to CPUID that allows 64-bit MacOSX 10.10 by sewardj · 10 years ago
  43. 07ab40d Fix incorrect decoding of AVX2 insns: by sewardj · 10 years ago
  44. c871940 Bug 340632 arm64: unhandled instruction fcvtas by mjw · 10 years ago
  45. 2584255 Handle all DSB/DMB/ISB variants. Fixes #340033. by sewardj · 10 years ago
  46. 5b924c8 Implement PRFM (immediate). Fixes #335713. by sewardj · 10 years ago
  47. f67fcb9 Implement FCVTAS W_S and FCVTAU W_S. Fixes #340509. by sewardj · 10 years ago
  48. d0e5e53 Implement by sewardj · 10 years ago
  49. 31b29af Implement fcvtmu x_d. Fixes #339927. by sewardj · 10 years ago
  50. d8ad76a Implement frintx d_d and s_s. Fixes #339926. by sewardj · 10 years ago
  51. bed9f68 * add a missing extra m-reg check for some LD/ST vector cases by sewardj · 10 years ago
  52. 208a776 Implement SIMD (de)interleaving loads/stores: by sewardj · 10 years ago
  53. f4f25ff Bug 339858 arm64 recognize dmb sy. Data Memory Barrier full SYstem variant. by mjw · 10 years ago
  54. bde3406 Merge the memory allocation bits from libvex.h into main_util.c. by florian · 10 years ago
  55. 85175a7 This patch makes the needed changes to the lxvw4x for Little Endian. by carll · 10 years ago
  56. 67ec22c mips: add a missing break by petarj · 10 years ago
  57. 830ef70 mips: use putDReg/getDReg for ceil.l.d by petarj · 10 years ago
  58. d8c64e0 Constification part 5. by florian · 10 years ago
  59. b66ad46 Use __typeof__ to improve readability and future maintainability. by florian · 10 years ago
  60. 017c0d5 Remove unused prototype. Add a fixs390. by florian · 10 years ago
  61. 99de41e This commit just makes white space changes to the three files in commit by carll · 10 years ago
  62. 9877fe5 msg by carll · 10 years ago
  63. aedb859 guest_amd64_spechelper: fill in a number of missing cases for by sewardj · 10 years ago
  64. b979d7a Add folding rules for: Sar64(x,0) and Sar32(x,0). Immediate by sewardj · 10 years ago
  65. edccb44 guest_amd64_spechelper: number (in comments) and reorder the spec by sewardj · 10 years ago
  66. 4e303f2 ppc64: lxvw4x instruction uses four 32-byte loads. When run on an by carll · 10 years ago
  67. dff2041 Remove unneeded variable. by florian · 10 years ago
  68. 678ede2 The function mk_AvDuplicateRI() stores 16 bytes to memory and then by carll · 10 years ago
  69. 8462d11 Constification part 4. by florian · 10 years ago
  70. 0a5494e Constification part 3. by florian · 10 years ago
  71. a5c17c6 The PPC64 store quad instruction is updating the address register with the by carll · 10 years ago
  72. 7d6f81d Constification part 2. by florian · 10 years ago
  73. 9b696ac Remove the valgrind_support parameter from LibVEX_Init. It's unused by florian · 10 years ago
  74. 0b70efa Constification part 1. by florian · 10 years ago
  75. e74ce2e Couple of fixes: by florian · 10 years ago
  76. 2580da4 In s390_decode_and_irgen don't divert the default case to a decoding error. by florian · 10 years ago
  77. 28d71ed Change how FXSAVE and FXRSTOR are done, so as to avoid pushing the XMM by sewardj · 10 years ago
  78. afa3f04 Minor refactoring to avoid special handling of emulation by florian · 10 years ago
  79. efe536b Handle fcvtpu Xd,Sn. Fixes #335564. by sewardj · 10 years ago
  80. f72c2c1 Use const instead of a comment. by florian · 10 years ago
  81. 7842caf iselStmt, case Ist_Dirty: remove pointless conditional. Spotted by by sewardj · 10 years ago
  82. ef6f26a mips64: fix jmpKind for BLTZ and BGEZ by petarj · 10 years ago
  83. 7ec7750 arm64: enable support for: str bN, [reg, reg etc] by sewardj · 10 years ago
  84. a90baf7 mips64: implement Cavium BBIT0 and BBIT1 instructions by petarj · 10 years ago
  85. 5762841 Add a missing return statement. Spotted by the Coverity checker. by florian · 10 years ago
  86. 8def049 arm64: route all whole-vector shift/rotate/slice operations by sewardj · 10 years ago
  87. e6b9bd9 Rename Iop_Extract{64,V128} to Iop_Slice{64,V128}, improve their by sewardj · 10 years ago
  88. 0ad37a9 Add support for generating ProfInc sequences on ARM64, so as to by sewardj · 10 years ago
  89. eae4af6 mips: remove unused macro by petarj · 10 years ago
  90. c328e15 mips: fix typo (IRType/IRTemp) by petarj · 10 years ago
  91. 3ce4dec Add support for four IROps that Memcheck generates on arm64, that by sewardj · 10 years ago
  92. fc261d9 arm64: implement: {zip,uzp,trn}{1,2} (vector) urecpe, ursqrte (vector) by sewardj · 10 years ago
  93. 1ddee21 Rename IROps for reciprocal estimate, reciprocal step, reciprocal sqrt by sewardj · 10 years ago
  94. e3fa0f8 Bug 330319 - vex amd64->IR: unhandled instruction bytes: 0xF 0x1 0xD5 (xend) by mjw · 10 years ago
  95. 150794d putGST_masked: correctly handle the case where the mask is for by sewardj · 10 years ago
  96. f7003bc arm64: implement: suqadd, usqadd (scalar) suqadd, usqadd (vector) by sewardj · 10 years ago
  97. 62ece66 arm64: implement srhadd, urhadd (vector) by sewardj · 10 years ago
  98. a6b61f0 arm64: implement by sewardj · 10 years ago
  99. 4a85b8e No functional change. Remove commented out code copied from the by sewardj · 10 years ago
  100. 1dd3ec1 Rename Iop_QSalN*, Iop_QShlN* and Iop_QShlN*S so as to more accurately by sewardj · 10 years ago