- f461149 API change: pass both the VexGuestExtents and the original by sewardj · 19 years ago
- 7355d27 Rename primop Iop_Rot* Iop_Rotl* by cerion · 19 years ago
- 2a4b845 Couple more primops: Iop_ShlN8x16, Iop_ShrN8x16, Iop_SarN8x16 by cerion · 19 years ago
- 9e7677b yet another new IR primop: Iop_QNarrow32Ux4 by cerion · 19 years ago
- f887b3e Added a number of new IR primops to support integer AltiVec insns by cerion · 19 years ago
- bd5cb07 ppc guest_state vector regs must be 16byte aligned for loads/stores by cerion · 19 years ago
- 225a034 by cerion · 19 years ago
- c4904af Don't emit cmovl since older x86s don't support it; instead emit a by sewardj · 19 years ago
- f07ed03 A minimal implementation of the x86 sysenter instruction by sewardj · 19 years ago
- 6d26984 Track the status of the %EFLAGS.AC (alignment check) bit, but by sewardj · 19 years ago
- 7787af4 - Partial implementation of reservations, to make lwarx/stwcx. work by sewardj · 19 years ago
- 7bd6ffe by sewardj · 19 years ago
- dbcfae7 by sewardj · 19 years ago
- b51f0f4 by sewardj · 19 years ago
- 900f6b5 Added LibVEX_GuestPPC32_put_cr7(), LibVEX_GuestPPC32_put_cr() by cerion · 19 years ago
- 51900a2 Added LibVEX_GuestPPC32_get_cr() for easy access to entire cond reg by cerion · 19 years ago
- c24824a Comment-only-change: record subtle interactions between self-checks by sewardj · 19 years ago
- 16a403b Tidy up some loose ends in the self-checking-translations machinery, by sewardj · 19 years ago
- ec3c885 Make LibVEX_Translate (an API fn) take a Bool indicating whether or by sewardj · 19 years ago
- db4738a Basic support for self-checking translations. It fits quite neatly by sewardj · 19 years ago
- b66dfa3 comment-only change: renumber register offsets correctly by cerion · 19 years ago
- af1ceca Enhance IR so as to distinguish between little- and big-endian loads and by sewardj · 19 years ago
- 2c039c9 Comment wibble by sewardj · 19 years ago
- 27e1dd6 (API-visible change): generalise the VexSubArch idea. Everywhere by sewardj · 19 years ago
- 6529aff PPC32 AltiVec reg offsets by cerion · 19 years ago
- 094d139 Floating-point for ppc32 by cerion · 19 years ago
- ed623db guest-ppc32 by cerion · 19 years ago
- 5a9ffab Add the beginnings of what might be a general mechanism to pass by sewardj · 19 years ago
- 71a35e7 x86 guest: generate Iop_Neg* in the x86->IR phase. Intent is to by sewardj · 19 years ago
- 84a2c38 Memchecking very large BBs of FP insns on x86 sometimes needs a lot of by sewardj · 19 years ago
- 291a7e8 Add even more 64-bit integer primops (sigh) by sewardj · 19 years ago
- 0033ddc by sewardj · 19 years ago
- 9854007 Add 64-bit comparisons. by sewardj · 19 years ago
- 5ce5fd6 Update comment re PutI/GetI (comment-only change). by sewardj · 19 years ago
- f53b735 More AMD64 instructions: sfence, movnti, bsf{w,l,q} by sewardj · 19 years ago
- a219a80 Use cpp symbol __x86_64__ rather than __amd64__ on the advice of Michael Matz. by sewardj · 19 years ago
- 40e144d more icc -Wall cleanups by sewardj · 19 years ago
- a7618ab Looks like I forgot to tell memcheck not to bother to track by sewardj · 19 years ago
- 918c8f3 A small API change: pass both the guest and host word sizes to the by sewardj · 19 years ago
- d2445f6 Add a new IR statement kind: IRStmt_NoOp, to denote a no-operation. by sewardj · 19 years ago
- 496a58d This commit looks big but it is really quite small. Fixes some by sewardj · 19 years ago
- f168931 by sewardj · 19 years ago
- 1f126c5 Add guest_TISTART and guest_TILEN fields to all guest state structs, by sewardj · 19 years ago
- 7ce9d15 Support for vex-directed instruction-cache invalidation, needed for by sewardj · 19 years ago
- e9d361a Cleaned up front end a fair bit. by cerion · 20 years ago
- 6e48e28 guest state padding wibble by sewardj · 20 years ago
- 7342c37 Cleaning up frontend - inc. changing all guest-state UChars to UInts by cerion · 20 years ago
- 4e9083c comments only: guest-state offsets by cerion · 20 years ago
- 98e65ba Add toUInt. by sewardj · 20 years ago
- 8d96531 Fill in a huge number of amd64 floating point cases, and start to by sewardj · 20 years ago
- cb6091d Add %xmm0 .. %xmm15 to the amd64 guest state. by sewardj · 20 years ago
- 85520e4 Fix many amd64 guest/host cases required to run test/test-amd64.c. by sewardj · 20 years ago
- a6b93d1 Fix enough stuff to get through 'hello world' on amd64. by sewardj · 20 years ago
- b85e8bb spacing/comment cleanup only by cerion · 20 years ago
- 7de0d3c Fill in many amd64 integer cases. by sewardj · 20 years ago
- 48de42f Don't redefine offsetof if it is already defined. by sewardj · 20 years ago
- d0a12df Fill in many amd64 front end and back end cases. by sewardj · 20 years ago
- 9b96767 Add a new IR type -- 128-bit integral (I128) and a small collection of by sewardj · 20 years ago
- bcc1f04 This belonged with last nights changes... r868 by cerion · 20 years ago
- f0c1c58 Consistently rename all existing IROps which operate on 128-bit values by sewardj · 20 years ago
- 5827784 More typechecker police. Hopefully this doesn't break anything. by sewardj · 20 years ago
- 9d2e769 Make iropt.c compile cleanly with icc in paranoid mode. Along the way, by sewardj · 20 years ago
- 97e8793 Define ULong_to_Ptr / Ptr_to_ULong to help clean up 64/32 bit issues. by sewardj · 20 years ago
- 98d105a Represent floats in guest_ppc32 by cerion · 20 years ago
- 5c8a0cb Added new ir ops Iop_DivU32, Iop_DivS32 by cerion · 20 years ago
- 3a5cf13 Make the guest-state-size 64-bit aligned, else some assertion or other by sewardj · 20 years ago
- 9db81c0 Make the x86 back end happy to chew through IR from the ppc32 front by sewardj · 20 years ago
- 62bec57 Cleaned up clean-helper functions Added various vasserts around the place. by cerion · 20 years ago
- c19d5e1 More ops.... arith, loads, stores, branch, shifts, move from/to spr by cerion · 20 years ago
- 0ec57c5 PowerPC-32 has at at least two variant (with and without Altivec). by sewardj · 20 years ago
- 2d49b43 Typechecker (icc) police. by sewardj · 20 years ago
- 343b9d0 Add two new primops needed by the amd64 front end. by sewardj · 20 years ago
- aabdfbf - Set up proper support for PPC32 archictecture - Wrote the OR ops by cerion · 20 years ago
- 7aa4bbc Added dis_int_cmp, dis_int_logic functions by cerion · 20 years ago
- 7a24055 Build fixes for icc in ultra-paranoid mode. This may not in the end by sewardj · 20 years ago
- ae69462 - Added ops enum for xer ov,ca flag calculation by cerion · 20 years ago
- 91ad536 Cleaned up and filled out: by cerion · 20 years ago
- 1515db9 changed all occurences of ppc to ppc32 (filenames and text) by cerion · 20 years ago
- e77ce01 updated cpustate by cerion · 20 years ago
- 896a137 Initial file setup for guest-ppc by cerion · 20 years ago
- 65526c2 Fix comment. by sewardj · 20 years ago
- 72c7281 Proper support for translation cache management: when a translation is by sewardj · 20 years ago
- d887b86 Rename some functions and types in the top level interface to be more by sewardj · 20 years ago
- 1806918 Add new IR primops: Iop_CmpNEZ8x8, Iop_CmpNEZ16x4, Iop_CmpNEZ32x2 and by sewardj · 20 years ago
- 6915b97 Fix typos in comment. by sewardj · 20 years ago
- 812a858 Comment-only change: record code generation conventions and limitations for x86. by sewardj · 20 years ago
- 38a3f86 On x86 host and guest, re-implement the way MMX instructions are done, by sewardj · 20 years ago
- 3e83893 Add a trivial new IR construction: a memory fence statement. Connect by sewardj · 20 years ago
- a0e83b0 * x86 guest: fix bug in stmxcsr -- rounding mode field set wrongly by sewardj · 20 years ago
- b923075 In iropt, try and call flatten_BB less. Enhance the sanity checker by sewardj · 20 years ago
- bef170b Add support for subarchitectures. Currently ignored. by sewardj · 20 years ago
- 80f5fce New function LibVEX_Version, returning version string automagically by sewardj · 20 years ago
- cee3031 Skeleton work on host-arm/isel, plus some cleaning up of hdefs by cerion · 20 years ago
- 5edfc26 Give different emulation warnings for setting of %mxcsr.fz and %mxcsr.daz. by sewardj · 20 years ago
- 52444cb Mechanism for dealing with failures of instruction decodes, and also by sewardj · 20 years ago
- 3bd6f3e x86 guest: simulate LDT/GDT enough that code using segment override by sewardj · 20 years ago
- 2e38386 x86 guest/host: fix enough 128-bit vector stuff that memcheck works for by sewardj · 20 years ago
- 109ffdb x86 host: Stuff in support of memchecking of 64x2 vector FP. by sewardj · 20 years ago
- 70f676d More support for memchecking 128-bit SIMD code. by sewardj · 20 years ago
- ce57cd2 added padding to VexGuestArmState by cerion · 20 years ago