blob: 96c00368bbb266b4ef9a5c21d0537061aad8ea03 [file] [log] [blame]
Chia-I Wud4bae362014-07-29 11:15:00 +08001#include <stdlib.h>
2#include <stdio.h>
3#include <stdbool.h>
4#include <string.h>
5
6#include <xgl.h>
Courtney Goeltzenleuchterd183e712014-08-06 16:12:02 -06007#include "common.h"
Chia-I Wud4bae362014-07-29 11:15:00 +08008
9static const char *xgl_gpu_type_string(XGL_PHYSICAL_GPU_TYPE type)
10{
Chia-I Wu190ebdc2014-08-06 12:04:13 +080011 switch (type) {
Chia-I Wud4bae362014-07-29 11:15:00 +080012#define STR(r) case XGL_GPU_TYPE_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +080013 STR(OTHER);
14 STR(INTEGRATED);
15 STR(DISCRETE);
16 STR(VIRTUAL);
Chia-I Wud4bae362014-07-29 11:15:00 +080017#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +080018 default: return "UNKNOWN_GPU";
19 }
Chia-I Wud4bae362014-07-29 11:15:00 +080020}
21
22static const char *xgl_heap_type_string(XGL_HEAP_MEMORY_TYPE type)
23{
Chia-I Wu190ebdc2014-08-06 12:04:13 +080024 switch (type) {
Chia-I Wud4bae362014-07-29 11:15:00 +080025#define STR(r) case XGL_HEAP_MEMORY_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +080026 STR(OTHER);
27 STR(LOCAL);
28 STR(REMOTE);
29 STR(EMBEDDED);
Chia-I Wud4bae362014-07-29 11:15:00 +080030#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +080031 default: return "UNKNOWN_HEAP";
32 }
Chia-I Wud4bae362014-07-29 11:15:00 +080033}
34
35static const char *xgl_channel_format_string(XGL_CHANNEL_FORMAT ch)
36{
Chia-I Wu190ebdc2014-08-06 12:04:13 +080037 switch (ch) {
Chia-I Wud4bae362014-07-29 11:15:00 +080038#define STR(r) case XGL_CH_FMT_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +080039 STR(UNDEFINED);
40 STR(R4G4);
41 STR(R4G4B4A4);
42 STR(R5G6B5);
43 STR(B5G6R5);
44 STR(R5G5B5A1);
45 STR(R8);
46 STR(R8G8);
47 STR(R8G8B8A8);
48 STR(B8G8R8A8);
49 STR(R10G11B11);
50 STR(R11G11B10);
51 STR(R10G10B10A2);
52 STR(R16);
53 STR(R16G16);
54 STR(R16G16B16A16);
55 STR(R32);
56 STR(R32G32);
57 STR(R32G32B32);
58 STR(R32G32B32A32);
59 STR(R16G8);
60 STR(R32G8);
61 STR(R9G9B9E5);
62 STR(BC1);
63 STR(BC2);
64 STR(BC3);
65 STR(BC4);
66 STR(BC5);
67 STR(BC6U);
68 STR(BC6S);
69 STR(BC7);
Chia-I Wud4bae362014-07-29 11:15:00 +080070#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +080071 default: return "UNKNOWN_CH";
72 }
Chia-I Wud4bae362014-07-29 11:15:00 +080073}
74
75static const char *xgl_numeric_format_string(XGL_NUM_FORMAT num)
76{
Chia-I Wu190ebdc2014-08-06 12:04:13 +080077 switch (num) {
Chia-I Wud4bae362014-07-29 11:15:00 +080078#define STR(r) case XGL_NUM_FMT_ ##r: return #r
Chia-I Wu190ebdc2014-08-06 12:04:13 +080079 STR(UNDEFINED);
80 STR(UNORM);
81 STR(SNORM);
82 STR(UINT);
83 STR(SINT);
84 STR(FLOAT);
85 STR(SRGB);
86 STR(DS);
Chia-I Wud4bae362014-07-29 11:15:00 +080087#undef STR
Chia-I Wu190ebdc2014-08-06 12:04:13 +080088 default: return "UNKNOWN_NUM";
89 }
Chia-I Wud4bae362014-07-29 11:15:00 +080090}
91
92static void app_dev_dump_format_props(const struct app_dev *dev, XGL_CHANNEL_FORMAT ch, XGL_NUM_FORMAT num)
93{
Chia-I Wu190ebdc2014-08-06 12:04:13 +080094 const XGL_FORMAT_PROPERTIES *props = &dev->format_props[ch][num];
95 struct {
96 const char *name;
97 XGL_FLAGS flags;
98 } tilings[2];
99 XGL_UINT i;
Chia-I Wud4bae362014-07-29 11:15:00 +0800100
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800101 if (!props->linearTilingFeatures && !props->optimalTilingFeatures)
102 return;
Chia-I Wud4bae362014-07-29 11:15:00 +0800103
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800104 tilings[0].name = "linear";
105 tilings[0].flags = props->linearTilingFeatures;
106 tilings[1].name = "optimal";
107 tilings[1].flags = props->optimalTilingFeatures;
Chia-I Wud4bae362014-07-29 11:15:00 +0800108
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800109 printf("FORMAT_%s_%s\n", xgl_channel_format_string(ch),
110 xgl_numeric_format_string(num));
111 for (i = 0; i < ARRAY_SIZE(tilings); i++) {
112 if (!tilings[i].flags)
113 continue;
Chia-I Wud4bae362014-07-29 11:15:00 +0800114
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800115 printf("\t%s tiling image =%s%s%s\n", tilings[i].name,
116 (tilings[i].flags & XGL_FORMAT_IMAGE_SHADER_READ_BIT) ? " read" : "",
117 (tilings[i].flags & XGL_FORMAT_IMAGE_SHADER_WRITE_BIT) ? " write" : "",
118 (tilings[i].flags & XGL_FORMAT_IMAGE_COPY_BIT) ? " copy" : "");
119 printf("\t%s tiling memory =%s\n", tilings[i].name,
120 (tilings[i].flags & XGL_FORMAT_MEMORY_SHADER_ACCESS_BIT) ? " access" : "");
121 printf("\t%s tiling attachment =%s%s%s%s%s\n", tilings[i].name,
122 (tilings[i].flags & XGL_FORMAT_COLOR_ATTACHMENT_WRITE_BIT) ? " color" : "",
123 (tilings[i].flags & XGL_FORMAT_COLOR_ATTACHMENT_BLEND_BIT) ? " blend" : "",
124 (tilings[i].flags & XGL_FORMAT_DEPTH_ATTACHMENT_BIT) ? " depth" : "",
125 (tilings[i].flags & XGL_FORMAT_STENCIL_ATTACHMENT_BIT) ? " stencil" : "",
126 (tilings[i].flags & XGL_FORMAT_MSAA_ATTACHMENT_BIT) ? " msaa" : "");
127 printf("\t%s tiling conversion = %u\n", tilings[i].name,
128 (bool) (tilings[i].flags & XGL_FORMAT_CONVERSION_BIT));
129 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800130}
131
132static void app_dev_dump_heap_props(const struct app_dev *dev, XGL_UINT id)
133{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800134 const XGL_MEMORY_HEAP_PROPERTIES *props = &dev->heap_props[id];
Chia-I Wud4bae362014-07-29 11:15:00 +0800135
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800136 printf("XGL_MEMORY_HEAP_PROPERTIES[%u]\n", id);
137 printf("\tstructSize = %u\n", props->structSize);
138 printf("\theapMemoryType = %s\n", xgl_heap_type_string(props->heapMemoryType));
139 printf("\theapSize = %u\n", props->heapSize);
140 printf("\tpagesSize = %u\n", props->pageSize);
Chia-I Wud4bae362014-07-29 11:15:00 +0800141
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800142 printf("\tflags =%s%s%s%s%s%s\n",
143 (props->flags & XGL_MEMORY_HEAP_CPU_VISIBLE_BIT) ? " visible" : "",
144 (props->flags & XGL_MEMORY_HEAP_CPU_GPU_COHERENT_BIT) ? " coherent" : "",
145 (props->flags & XGL_MEMORY_HEAP_CPU_UNCACHED_BIT) ? " uc" : "",
146 (props->flags & XGL_MEMORY_HEAP_CPU_WRITE_COMBINED_BIT) ? " wc" : "",
147 (props->flags & XGL_MEMORY_HEAP_HOLDS_PINNED_BIT) ? " pinnable" : "",
148 (props->flags & XGL_MEMORY_HEAP_SHAREABLE_BIT) ? " shareable" : "");
Chia-I Wud4bae362014-07-29 11:15:00 +0800149
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800150 printf("\tgpuReadPerfRating = %f\n", props->gpuReadPerfRating);
151 printf("\tgpuWritePerfRating = %f\n", props->gpuWritePerfRating);
152 printf("\tcpuReadPerfRating = %f\n", props->cpuReadPerfRating);
153 printf("\tcpuWritePerfRating = %f\n", props->cpuWritePerfRating);
Chia-I Wud4bae362014-07-29 11:15:00 +0800154}
155
156static void
157app_dev_dump(const struct app_dev *dev)
158{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800159 XGL_CHANNEL_FORMAT ch;
160 XGL_NUM_FORMAT num;
161 XGL_UINT i;
Chia-I Wud4bae362014-07-29 11:15:00 +0800162
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800163 for (i = 0; i < dev->heap_count; i++) {
164 app_dev_dump_heap_props(dev, i);
165 printf("\n");
166 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800167
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800168 for (ch = 0; ch < XGL_MAX_CH_FMT; ch++) {
169 for (num = 0; num < XGL_MAX_NUM_FMT; num++)
170 app_dev_dump_format_props(dev, ch, num);
171 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800172}
173
174static void app_gpu_dump_multi_compat(const struct app_gpu *gpu, const struct app_gpu *other,
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800175 const XGL_GPU_COMPATIBILITY_INFO *info)
Chia-I Wud4bae362014-07-29 11:15:00 +0800176{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800177 printf("XGL_GPU_COMPATIBILITY_INFO[GPU%d]\n", other->id);
Chia-I Wud4bae362014-07-29 11:15:00 +0800178
179#define TEST(info, b) printf(#b " = %u\n", (bool) (info->compatibilityFlags & XGL_GPU_COMPAT_ ##b## _BIT))
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800180 TEST(info, ASIC_FEATURES);
181 TEST(info, IQ_MATCH);
182 TEST(info, PEER_TRANSFER);
183 TEST(info, SHARED_MEMORY);
184 TEST(info, SHARED_SYNC);
185 TEST(info, SHARED_GPU0_DISPLAY);
186 TEST(info, SHARED_GPU1_DISPLAY);
Chia-I Wud4bae362014-07-29 11:15:00 +0800187#undef TEST
188}
189
Courtney Goeltzenleuchterd183e712014-08-06 16:12:02 -0600190static void app_gpu_multi_compat(struct app_gpu *gpus, XGL_UINT gpu_count)
191{
192 XGL_RESULT err;
193 XGL_UINT i, j;
194
195 for (i = 0; i < gpu_count; i++) {
196 for (j = 0; j < gpu_count; j++) {
197 XGL_GPU_COMPATIBILITY_INFO info;
198
199 if (i == j)
200 continue;
201
202 err = xglGetMultiGpuCompatibility(gpus[i].obj,
203 gpus[j].obj, &info);
204 if (err)
205 ERR_EXIT(err);
206
207 app_gpu_dump_multi_compat(&gpus[i], &gpus[j], &info);
208 }
209 }
210}
211
Chia-I Wud4bae362014-07-29 11:15:00 +0800212static void app_gpu_dump_props(const struct app_gpu *gpu)
213{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800214 const XGL_PHYSICAL_GPU_PROPERTIES *props = &gpu->props;
Chia-I Wud4bae362014-07-29 11:15:00 +0800215
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800216 printf("XGL_PHYSICAL_GPU_PROPERTIES\n");
217 printf("\tstructSize = %u\n", props->structSize);
218 printf("\tapiVersion = %u\n", props->apiVersion);
219 printf("\tdriverVersion = %u\n", props->driverVersion);
220 printf("\tvendorId = 0x%04x\n", props->vendorId);
221 printf("\tdeviceId = 0x%04x\n", props->deviceId);
222 printf("\tgpuType = %s\n", xgl_gpu_type_string(props->gpuType));
223 printf("\tgpuName = %s\n", props->gpuName);
224 printf("\tmaxMemRefsPerSubmission = %u\n", props->maxMemRefsPerSubmission);
225 printf("\tvirtualMemPageSize = %u\n", props->virtualMemPageSize);
226 printf("\tmaxInlineMemoryUpdateSize = %u\n", props->maxInlineMemoryUpdateSize);
227 printf("\tmaxBoundDescriptorSets = %u\n", props->maxBoundDescriptorSets);
228 printf("\tmaxThreadGroupSize = %u\n", props->maxThreadGroupSize);
229 printf("\ttimestampFrequency = %lu\n", props->timestampFrequency);
230 printf("\tmultiColorAttachmentClears = %u\n", props->multiColorAttachmentClears);
Chia-I Wud4bae362014-07-29 11:15:00 +0800231}
232
233static void app_gpu_dump_perf(const struct app_gpu *gpu)
234{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800235 const XGL_PHYSICAL_GPU_PERFORMANCE *perf = &gpu->perf;
Chia-I Wud4bae362014-07-29 11:15:00 +0800236
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800237 printf("XGL_PHYSICAL_GPU_PERFORMANCE\n");
238 printf("\tmaxGpuClock = %f\n", perf->maxGpuClock);
239 printf("\taluPerClock = %f\n", perf->aluPerClock);
240 printf("\ttexPerClock = %f\n", perf->texPerClock);
241 printf("\tprimsPerClock = %f\n", perf->primsPerClock);
242 printf("\tpixelsPerClock = %f\n", perf->pixelsPerClock);
Chia-I Wud4bae362014-07-29 11:15:00 +0800243}
244
Chia-I Wuf5c46f42014-08-05 15:33:40 +0800245static void app_gpu_dump_queue_props(const struct app_gpu *gpu, XGL_UINT id)
Chia-I Wud4bae362014-07-29 11:15:00 +0800246{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800247 const XGL_PHYSICAL_GPU_QUEUE_PROPERTIES *props = &gpu->queue_props[id];
Chia-I Wud4bae362014-07-29 11:15:00 +0800248
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800249 printf("XGL_PHYSICAL_GPU_QUEUE_PROPERTIES[%d]\n", id);
250 printf("\tstructSize = %u\n", props->structSize);
251 printf("\tqueueFlags = %c%c%c%c\n",
252 (props->queueFlags & XGL_QUEUE_GRAPHICS_BIT) ? 'G' : '.',
253 (props->queueFlags & XGL_QUEUE_COMPUTE_BIT) ? 'C' : '.',
254 (props->queueFlags & XGL_QUEUE_DMA_BIT) ? 'D' : '.',
255 (props->queueFlags & XGL_QUEUE_EXTENDED_BIT) ? 'X' : '.');
256 printf("\tqueueCount = %u\n", props->queueCount);
257 printf("\tmaxAtomicCounters = %u\n", props->maxAtomicCounters);
258 printf("\tsupportsTimestamps = %u\n", props->supportsTimestamps);
Chia-I Wud4bae362014-07-29 11:15:00 +0800259}
260
261static void app_gpu_dump_memory_props(const struct app_gpu *gpu)
262{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800263 const XGL_PHYSICAL_GPU_MEMORY_PROPERTIES *props = &gpu->memory_props;
Chia-I Wud4bae362014-07-29 11:15:00 +0800264
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800265 printf("XGL_PHYSICAL_GPU_MEMORY_PROPERTIES\n");
266 printf("\tstructSize = %u\n", props->structSize);
267 printf("\tsupportsMigration = %u\n", props->supportsMigration);
268 printf("\tsupportsVirtualMemoryRemapping = %u\n", props->supportsVirtualMemoryRemapping);
269 printf("\tsupportsPinning = %u\n", props->supportsPinning);
Chia-I Wud4bae362014-07-29 11:15:00 +0800270}
271
272static void app_gpu_dump(const struct app_gpu *gpu)
273{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800274 XGL_UINT i;
Chia-I Wuf5c46f42014-08-05 15:33:40 +0800275
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800276 printf("GPU%u\n", gpu->id);
277 app_gpu_dump_props(gpu);
278 printf("\n");
279 app_gpu_dump_perf(gpu);
280 printf("\n");
281 for (i = 0; i < gpu->queue_count; i++) {
282 app_gpu_dump_queue_props(gpu, i);
283 printf("\n");
284 }
285 app_gpu_dump_memory_props(gpu);
286 printf("\n");
287 app_dev_dump(&gpu->dev);
Chia-I Wud4bae362014-07-29 11:15:00 +0800288}
289
Chia-I Wud4bae362014-07-29 11:15:00 +0800290int main(int argc, char **argv)
291{
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800292 static const XGL_APPLICATION_INFO app_info = {
293 .sType = XGL_STRUCTURE_TYPE_APPLICATION_INFO,
294 .pNext = NULL,
295 .pAppName = (const XGL_CHAR *) "xglinfo",
296 .appVersion = 1,
297 .pEngineName = (const XGL_CHAR *) "xglinfo",
298 .engineVersion = 1,
299 .apiVersion = XGL_MAKE_VERSION(0, 22, 0),
300 };
301 struct app_gpu gpus[MAX_GPUS];
302 XGL_PHYSICAL_GPU objs[MAX_GPUS];
303 XGL_UINT gpu_count, i;
304 XGL_RESULT err;
Chia-I Wud4bae362014-07-29 11:15:00 +0800305
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800306 err = xglInitAndEnumerateGpus(&app_info, NULL,
307 MAX_GPUS, &gpu_count, objs);
308 if (err)
309 ERR_EXIT(err);
Chia-I Wud4bae362014-07-29 11:15:00 +0800310
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800311 for (i = 0; i < gpu_count; i++) {
312 app_gpu_init(&gpus[i], i, objs[i]);
313 app_gpu_dump(&gpus[i]);
314 printf("\n\n");
315 }
Chia-I Wud4bae362014-07-29 11:15:00 +0800316
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800317 app_gpu_multi_compat(gpus, gpu_count);
Chia-I Wud4bae362014-07-29 11:15:00 +0800318
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800319 for (i = 0; i < gpu_count; i++)
320 app_gpu_destroy(&gpus[i]);
Chia-I Wud4bae362014-07-29 11:15:00 +0800321
Chia-I Wu0b9a7372014-08-06 12:09:19 +0800322 xglInitAndEnumerateGpus(&app_info, NULL, 0, &gpu_count, NULL);
323
Chia-I Wu190ebdc2014-08-06 12:04:13 +0800324 return 0;
Chia-I Wud4bae362014-07-29 11:15:00 +0800325}