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Chia-I Wuf9911eb2014-08-06 13:50:31 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#ifndef MEM_H
26#define MEM_H
27
Chia-I Wu37fe8412014-08-07 13:34:57 +080028#include "kmd/winsys.h"
Chia-I Wuf9911eb2014-08-06 13:50:31 +080029#include "intel.h"
30
Chia-I Wuf9911eb2014-08-06 13:50:31 +080031struct intel_mem {
32 struct intel_base base;
33
34 struct intel_bo *bo;
35};
36
37XGL_RESULT intel_mem_alloc(struct intel_dev *dev,
38 const XGL_MEMORY_ALLOC_INFO *info,
39 struct intel_mem **mem_ret);
40void intel_mem_free(struct intel_mem *mem);
41
42XGL_RESULT intel_mem_set_priority(struct intel_mem *mem,
43 XGL_MEMORY_PRIORITY priority);
44
Chia-I Wu37fe8412014-08-07 13:34:57 +080045static inline void *intel_mem_map(struct intel_mem *mem, XGL_FLAGS flags)
46{
47 return intel_bo_map_unsynchronized(mem->bo);
48}
49
50static inline void *intel_mem_map_sync(struct intel_mem *mem, bool rw)
51{
52 return intel_bo_map(mem->bo, rw);
53}
54
55static inline void intel_mem_unmap(struct intel_mem *mem)
56{
57 intel_bo_unmap(mem->bo);
58}
59
60static inline bool intel_mem_is_busy(struct intel_mem *mem)
61{
62 return intel_bo_is_busy(mem->bo);
63}
Chia-I Wuf9911eb2014-08-06 13:50:31 +080064
65static inline struct intel_mem *intel_mem(XGL_GPU_MEMORY mem)
66{
67 return (struct intel_mem *) mem;
68}
69
70XGL_RESULT XGLAPI intelAllocMemory(
71 XGL_DEVICE device,
72 const XGL_MEMORY_ALLOC_INFO* pAllocInfo,
73 XGL_GPU_MEMORY* pMem);
74
75XGL_RESULT XGLAPI intelFreeMemory(
76 XGL_GPU_MEMORY mem);
77
78XGL_RESULT XGLAPI intelSetMemoryPriority(
79 XGL_GPU_MEMORY mem,
80 XGL_MEMORY_PRIORITY priority);
81
82XGL_RESULT XGLAPI intelMapMemory(
83 XGL_GPU_MEMORY mem,
84 XGL_FLAGS flags,
85 XGL_VOID** ppData);
86
87XGL_RESULT XGLAPI intelUnmapMemory(
88 XGL_GPU_MEMORY mem);
89
Chia-I Wu251e7d92014-08-19 13:35:42 +080090XGL_RESULT XGLAPI intelPinSystemMemory(
91 XGL_DEVICE device,
92 const XGL_VOID* pSysMem,
93 XGL_SIZE memSize,
94 XGL_GPU_MEMORY* pMem);
95
96XGL_RESULT XGLAPI intelRemapVirtualMemoryPages(
97 XGL_DEVICE device,
98 XGL_UINT rangeCount,
99 const XGL_VIRTUAL_MEMORY_REMAP_RANGE* pRanges,
100 XGL_UINT preWaitSemaphoreCount,
101 const XGL_QUEUE_SEMAPHORE* pPreWaitSemaphores,
102 XGL_UINT postSignalSemaphoreCount,
103 const XGL_QUEUE_SEMAPHORE* pPostSignalSemaphores);
104
105XGL_RESULT XGLAPI intelOpenSharedMemory(
106 XGL_DEVICE device,
107 const XGL_MEMORY_OPEN_INFO* pOpenInfo,
108 XGL_GPU_MEMORY* pMem);
109
110XGL_RESULT XGLAPI intelOpenPeerMemory(
111 XGL_DEVICE device,
112 const XGL_PEER_MEMORY_OPEN_INFO* pOpenInfo,
113 XGL_GPU_MEMORY* pMem);
114
Chia-I Wuf9911eb2014-08-06 13:50:31 +0800115#endif /* MEM_H */