blob: 0a6c50202c4cf1b7bffd0d1df28d911bab7e456a [file] [log] [blame]
Chia-I Wu00b51a82014-09-09 12:07:37 +08001/*
2 * Mesa 3-D graphics library
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
28#include <stdio.h>
29#include <stdarg.h>
Chia-I Wu34579502014-10-25 14:44:53 +080030#include "compiler/pipeline/pipeline_compiler_interface.h"
Chia-I Wu00b51a82014-09-09 12:07:37 +080031#include "genhw/genhw.h"
32#include "kmd/winsys.h"
33#include "cmd_priv.h"
34
Chia-I Wu00b51a82014-09-09 12:07:37 +080035static const uint32_t *
36writer_pointer(const struct intel_cmd *cmd,
37 enum intel_cmd_writer_type which,
38 unsigned offset)
39{
40 const struct intel_cmd_writer *writer = &cmd->writers[which];
41 return (const uint32_t *) ((const char *) writer->ptr + offset);
42}
43
44static uint32_t
45writer_dw(const struct intel_cmd *cmd,
46 enum intel_cmd_writer_type which,
47 unsigned offset, unsigned dw_index,
48 const char *format, ...)
49{
50 const uint32_t *dw = writer_pointer(cmd, which, offset);
51 va_list ap;
52 char desc[16];
53 int len;
54
55 fprintf(stderr, "0x%08x: 0x%08x: ",
56 offset + (dw_index << 2), dw[dw_index]);
57
58 va_start(ap, format);
59 len = vsnprintf(desc, sizeof(desc), format, ap);
60 va_end(ap);
61
62 if (len >= sizeof(desc)) {
63 len = sizeof(desc) - 1;
64 desc[len] = '\0';
65 }
66
67 if (desc[len - 1] == '\n') {
68 desc[len - 1] = '\0';
69 fprintf(stderr, "%8s: \n", desc);
70 } else {
71 fprintf(stderr, "%8s: ", desc);
72 }
73
74 return dw[dw_index];
75}
76
77static void
78writer_decode_blob(const struct intel_cmd *cmd,
79 enum intel_cmd_writer_type which,
80 const struct intel_cmd_item *item)
81{
Chia-I Wu238cabd2014-10-25 13:59:45 +080082 const unsigned state_size = sizeof(uint32_t);
Chia-I Wu00b51a82014-09-09 12:07:37 +080083 const unsigned count = item->size / state_size;
84 unsigned offset = item->offset;
85 unsigned i;
86
Chia-I Wu238cabd2014-10-25 13:59:45 +080087 for (i = 0; i < count; i += 4) {
Chia-I Wu00b51a82014-09-09 12:07:37 +080088 const uint32_t *dw = writer_pointer(cmd, which, offset);
89
Chia-I Wu238cabd2014-10-25 13:59:45 +080090 writer_dw(cmd, which, offset, 0, "BLOB%d", i / 4);
Chia-I Wu00b51a82014-09-09 12:07:37 +080091
Chia-I Wu238cabd2014-10-25 13:59:45 +080092 switch (count - i) {
93 case 1:
94 fprintf(stderr, "(%10.4f, %10c, %10c, %10c) "
95 "(0x%08x, %10c, %10c, %10c)\n",
96 u_uif(dw[0]), 'X', 'X', 'X',
97 dw[0], 'X', 'X', 'X');
98 break;
99 case 2:
100 fprintf(stderr, "(%10.4f, %10.4f, %10c, %10c) "
101 "(0x%08x, 0x%08x, %10c, %10c)\n",
102 u_uif(dw[0]), u_uif(dw[1]), 'X', 'X',
103 dw[0], dw[1], 'X', 'X');
104 break;
105 case 3:
106 fprintf(stderr, "(%10.4f, %10.4f, %10.4f, %10c) "
107 "(0x%08x, 0x%08x, 0x%08x, %10c)\n",
108 u_uif(dw[0]), u_uif(dw[1]), u_uif(dw[2]), 'X',
109 dw[0], dw[1], dw[2], 'X');
110 break;
111 default:
112 fprintf(stderr, "(%10.4f, %10.4f, %10.4f, %10.4f) "
113 "(0x%08x, 0x%08x, 0x%08x, 0x%08x)\n",
114 u_uif(dw[0]), u_uif(dw[1]), u_uif(dw[2]), u_uif(dw[3]),
115 dw[0], dw[1], dw[2], dw[3]);
116 break;
117 }
118
119 offset += state_size * 4;
Chia-I Wu00b51a82014-09-09 12:07:37 +0800120 }
121}
122
123static void
124writer_decode_clip_viewport(const struct intel_cmd *cmd,
125 enum intel_cmd_writer_type which,
126 const struct intel_cmd_item *item)
127{
128 const unsigned state_size = sizeof(uint32_t) * 4;
129 const unsigned count = item->size / state_size;
130 unsigned offset = item->offset;
131 unsigned i;
132
133 for (i = 0; i < count; i++) {
134 uint32_t dw;
135
136 dw = writer_dw(cmd, which, offset, 0, "CLIP VP%d", i);
137 fprintf(stderr, "xmin = %f\n", u_uif(dw));
138
139 dw = writer_dw(cmd, which, offset, 1, "CLIP VP%d", i);
140 fprintf(stderr, "xmax = %f\n", u_uif(dw));
141
142 dw = writer_dw(cmd, which, offset, 2, "CLIP VP%d", i);
143 fprintf(stderr, "ymin = %f\n", u_uif(dw));
144
145 dw = writer_dw(cmd, which, offset, 3, "CLIP VP%d", i);
146 fprintf(stderr, "ymax = %f\n", u_uif(dw));
147
148 offset += state_size;
149 }
150}
151
152static void
153writer_decode_sf_clip_viewport_gen7(const struct intel_cmd *cmd,
154 enum intel_cmd_writer_type which,
155 const struct intel_cmd_item *item)
156{
157 const unsigned state_size = sizeof(uint32_t) * 16;
158 const unsigned count = item->size / state_size;
159 unsigned offset = item->offset;
160 unsigned i;
161
162 for (i = 0; i < count; i++) {
163 uint32_t dw;
164
165 dw = writer_dw(cmd, which, offset, 0, "SF_CLIP VP%d", i);
166 fprintf(stderr, "m00 = %f\n", u_uif(dw));
167
168 dw = writer_dw(cmd, which, offset, 1, "SF_CLIP VP%d", i);
169 fprintf(stderr, "m11 = %f\n", u_uif(dw));
170
171 dw = writer_dw(cmd, which, offset, 2, "SF_CLIP VP%d", i);
172 fprintf(stderr, "m22 = %f\n", u_uif(dw));
173
174 dw = writer_dw(cmd, which, offset, 3, "SF_CLIP VP%d", i);
175 fprintf(stderr, "m30 = %f\n", u_uif(dw));
176
177 dw = writer_dw(cmd, which, offset, 4, "SF_CLIP VP%d", i);
178 fprintf(stderr, "m31 = %f\n", u_uif(dw));
179
180 dw = writer_dw(cmd, which, offset, 5, "SF_CLIP VP%d", i);
181 fprintf(stderr, "m32 = %f\n", u_uif(dw));
182
183 dw = writer_dw(cmd, which, offset, 8, "SF_CLIP VP%d", i);
184 fprintf(stderr, "guardband xmin = %f\n", u_uif(dw));
185
186 dw = writer_dw(cmd, which, offset, 9, "SF_CLIP VP%d", i);
187 fprintf(stderr, "guardband xmax = %f\n", u_uif(dw));
188
189 dw = writer_dw(cmd, which, offset, 10, "SF_CLIP VP%d", i);
190 fprintf(stderr, "guardband ymin = %f\n", u_uif(dw));
191
192 dw = writer_dw(cmd, which, offset, 11, "SF_CLIP VP%d", i);
193 fprintf(stderr, "guardband ymax = %f\n", u_uif(dw));
194
195 offset += state_size;
196 }
197}
198
199static void
200writer_decode_sf_viewport_gen6(const struct intel_cmd *cmd,
201 enum intel_cmd_writer_type which,
202 const struct intel_cmd_item *item)
203{
204 const unsigned state_size = sizeof(uint32_t) * 8;
205 const unsigned count = item->size / state_size;
206 unsigned offset = item->offset;
207 unsigned i;
208
209 for (i = 0; i < count; i++) {
210 uint32_t dw;
211
212 dw = writer_dw(cmd, which, offset, 0, "SF VP%d", i);
213 fprintf(stderr, "m00 = %f\n", u_uif(dw));
214
215 dw = writer_dw(cmd, which, offset, 1, "SF VP%d", i);
216 fprintf(stderr, "m11 = %f\n", u_uif(dw));
217
218 dw = writer_dw(cmd, which, offset, 2, "SF VP%d", i);
219 fprintf(stderr, "m22 = %f\n", u_uif(dw));
220
221 dw = writer_dw(cmd, which, offset, 3, "SF VP%d", i);
222 fprintf(stderr, "m30 = %f\n", u_uif(dw));
223
224 dw = writer_dw(cmd, which, offset, 4, "SF VP%d", i);
225 fprintf(stderr, "m31 = %f\n", u_uif(dw));
226
227 dw = writer_dw(cmd, which, offset, 5, "SF VP%d", i);
228 fprintf(stderr, "m32 = %f\n", u_uif(dw));
229
230 offset += state_size;
231 }
232}
233
234static void
235writer_decode_sf_viewport(const struct intel_cmd *cmd,
236 enum intel_cmd_writer_type which,
237 const struct intel_cmd_item *item)
238{
239 if (cmd_gen(cmd) >= INTEL_GEN(7))
240 writer_decode_sf_clip_viewport_gen7(cmd, which, item);
241 else
242 writer_decode_sf_viewport_gen6(cmd, which, item);
243}
244
245static void
246writer_decode_scissor_rect(const struct intel_cmd *cmd,
247 enum intel_cmd_writer_type which,
248 const struct intel_cmd_item *item)
249{
250 const unsigned state_size = sizeof(uint32_t) * 2;
251 const unsigned count = item->size / state_size;
252 unsigned offset = item->offset;
253 unsigned i;
254
255 for (i = 0; i < count; i++) {
256 uint32_t dw;
257
258 dw = writer_dw(cmd, which, offset, 0, "SCISSOR%d", i);
259 fprintf(stderr, "xmin %d, ymin %d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800260 GEN_EXTRACT(dw, GEN6_SCISSOR_DW0_MIN_X),
261 GEN_EXTRACT(dw, GEN6_SCISSOR_DW0_MIN_Y));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800262
263 dw = writer_dw(cmd, which, offset, 1, "SCISSOR%d", i);
264 fprintf(stderr, "xmax %d, ymax %d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800265 GEN_EXTRACT(dw, GEN6_SCISSOR_DW1_MAX_X),
266 GEN_EXTRACT(dw, GEN6_SCISSOR_DW1_MAX_Y));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800267
268 offset += state_size;
269 }
270}
271
272static void
273writer_decode_cc_viewport(const struct intel_cmd *cmd,
274 enum intel_cmd_writer_type which,
275 const struct intel_cmd_item *item)
276{
277 const unsigned state_size = sizeof(uint32_t) * 2;
278 const unsigned count = item->size / state_size;
279 unsigned offset = item->offset;
280 unsigned i;
281
282 for (i = 0; i < count; i++) {
283 uint32_t dw;
284
285 dw = writer_dw(cmd, which, offset, 0, "CC VP%d", i);
286 fprintf(stderr, "min_depth = %f\n", u_uif(dw));
287
288 dw = writer_dw(cmd, which, offset, 1, "CC VP%d", i);
289 fprintf(stderr, "max_depth = %f\n", u_uif(dw));
290
291 offset += state_size;
292 }
293}
294
295static void
296writer_decode_color_calc(const struct intel_cmd *cmd,
297 enum intel_cmd_writer_type which,
298 const struct intel_cmd_item *item)
299{
300 uint32_t dw;
301
302 dw = writer_dw(cmd, which, item->offset, 0, "CC");
303 fprintf(stderr, "alpha test format %s, round disable %d, "
304 "stencil ref %d, bf stencil ref %d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800305 GEN_EXTRACT(dw, GEN6_CC_DW0_ALPHATEST) ? "FLOAT32" : "UNORM8",
Chia-I Wu00b51a82014-09-09 12:07:37 +0800306 (bool) (dw & GEN6_CC_DW0_ROUND_DISABLE_DISABLE),
Chia-I Wue6073342014-11-30 09:43:42 +0800307 GEN_EXTRACT(dw, GEN6_CC_DW0_STENCIL0_REF),
308 GEN_EXTRACT(dw, GEN6_CC_DW0_STENCIL1_REF));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800309
310 writer_dw(cmd, which, item->offset, 1, "CC\n");
311
312 dw = writer_dw(cmd, which, item->offset, 2, "CC");
313 fprintf(stderr, "constant red %f\n", u_uif(dw));
314
315 dw = writer_dw(cmd, which, item->offset, 3, "CC");
316 fprintf(stderr, "constant green %f\n", u_uif(dw));
317
318 dw = writer_dw(cmd, which, item->offset, 4, "CC");
319 fprintf(stderr, "constant blue %f\n", u_uif(dw));
320
321 dw = writer_dw(cmd, which, item->offset, 5, "CC");
322 fprintf(stderr, "constant alpha %f\n", u_uif(dw));
323}
324
325static void
326writer_decode_depth_stencil(const struct intel_cmd *cmd,
327 enum intel_cmd_writer_type which,
328 const struct intel_cmd_item *item)
329{
330 uint32_t dw;
331
332 dw = writer_dw(cmd, which, item->offset, 0, "D_S");
333 fprintf(stderr, "stencil %sable, func %d, write %sable\n",
334 (dw & GEN6_ZS_DW0_STENCIL_TEST_ENABLE) ? "en" : "dis",
Chia-I Wue6073342014-11-30 09:43:42 +0800335 GEN_EXTRACT(dw, GEN6_ZS_DW0_STENCIL0_FUNC),
Chia-I Wu00b51a82014-09-09 12:07:37 +0800336 (dw & GEN6_ZS_DW0_STENCIL_WRITE_ENABLE) ? "en" : "dis");
337
338 dw = writer_dw(cmd, which, item->offset, 1, "D_S");
339 fprintf(stderr, "stencil test mask 0x%x, write mask 0x%x\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800340 GEN_EXTRACT(dw, GEN6_ZS_DW1_STENCIL0_VALUEMASK),
341 GEN_EXTRACT(dw, GEN6_ZS_DW1_STENCIL0_WRITEMASK));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800342
343 dw = writer_dw(cmd, which, item->offset, 2, "D_S");
344 fprintf(stderr, "depth test %sable, func %d, write %sable\n",
345 (dw & GEN6_ZS_DW2_DEPTH_TEST_ENABLE) ? "en" : "dis",
Chia-I Wue6073342014-11-30 09:43:42 +0800346 GEN_EXTRACT(dw, GEN6_ZS_DW2_DEPTH_FUNC),
Chia-I Wu00b51a82014-09-09 12:07:37 +0800347 (dw & GEN6_ZS_DW2_DEPTH_WRITE_ENABLE) ? "en" : "dis");
348}
349
350static void
351writer_decode_blend(const struct intel_cmd *cmd,
352 enum intel_cmd_writer_type which,
353 const struct intel_cmd_item *item)
354{
355 const unsigned state_size = sizeof(uint32_t) * 2;
356 const unsigned count = item->size / state_size;
357 unsigned offset = item->offset;
358 unsigned i;
359
360 for (i = 0; i < count; i++) {
361 writer_dw(cmd, which, offset, 0, "BLEND%d\n", i);
362 writer_dw(cmd, which, offset, 1, "BLEND%d\n", i);
363
364 offset += state_size;
365 }
366}
367
368static void
369writer_decode_sampler(const struct intel_cmd *cmd,
370 enum intel_cmd_writer_type which,
371 const struct intel_cmd_item *item)
372{
373 const unsigned state_size = sizeof(uint32_t) * 4;
374 const unsigned count = item->size / state_size;
375 unsigned offset = item->offset;
376 unsigned i;
377
378 for (i = 0; i < count; i++) {
379 writer_dw(cmd, which, offset, 0, "WM SAMP%d", i);
380 fprintf(stderr, "filtering\n");
381
382 writer_dw(cmd, which, offset, 1, "WM SAMP%d", i);
383 fprintf(stderr, "wrapping, lod\n");
384
385 writer_dw(cmd, which, offset, 2, "WM SAMP%d", i);
386 fprintf(stderr, "default color pointer\n");
387
388 writer_dw(cmd, which, offset, 3, "WM SAMP%d", i);
389 fprintf(stderr, "chroma key, aniso\n");
390
391 offset += state_size;
392 }
393}
394
395static void
396writer_decode_surface_gen7(const struct intel_cmd *cmd,
397 enum intel_cmd_writer_type which,
398 const struct intel_cmd_item *item)
399{
400 uint32_t dw;
401
402 dw = writer_dw(cmd, which, item->offset, 0, "SURF");
403 fprintf(stderr, "type 0x%x, format 0x%x, tiling %d, %s array\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800404 GEN_EXTRACT(dw, GEN7_SURFACE_DW0_TYPE),
405 GEN_EXTRACT(dw, GEN7_SURFACE_DW0_FORMAT),
406 GEN_EXTRACT(dw, GEN7_SURFACE_DW0_TILING),
Chia-I Wu00b51a82014-09-09 12:07:37 +0800407 (dw & GEN7_SURFACE_DW0_IS_ARRAY) ? "is" : "not");
408
409 writer_dw(cmd, which, item->offset, 1, "SURF");
410 fprintf(stderr, "offset\n");
411
412 dw = writer_dw(cmd, which, item->offset, 2, "SURF");
413 fprintf(stderr, "%dx%d size\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800414 GEN_EXTRACT(dw, GEN7_SURFACE_DW2_WIDTH),
415 GEN_EXTRACT(dw, GEN7_SURFACE_DW2_HEIGHT));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800416
417 dw = writer_dw(cmd, which, item->offset, 3, "SURF");
418 fprintf(stderr, "depth %d, pitch %d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800419 GEN_EXTRACT(dw, GEN7_SURFACE_DW3_DEPTH),
420 GEN_EXTRACT(dw, GEN7_SURFACE_DW3_PITCH));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800421
422 dw = writer_dw(cmd, which, item->offset, 4, "SURF");
423 fprintf(stderr, "min array element %d, array extent %d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800424 GEN_EXTRACT(dw, GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT),
425 GEN_EXTRACT(dw, GEN7_SURFACE_DW4_RT_VIEW_EXTENT));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800426
427 dw = writer_dw(cmd, which, item->offset, 5, "SURF");
428 fprintf(stderr, "mip base %d, mips %d, x,y offset: %d,%d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800429 GEN_EXTRACT(dw, GEN7_SURFACE_DW5_MIN_LOD),
430 GEN_EXTRACT(dw, GEN7_SURFACE_DW5_MIP_COUNT_LOD),
431 GEN_EXTRACT(dw, GEN7_SURFACE_DW5_X_OFFSET),
432 GEN_EXTRACT(dw, GEN7_SURFACE_DW5_Y_OFFSET));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800433
434 writer_dw(cmd, which, item->offset, 6, "SURF\n");
435 writer_dw(cmd, which, item->offset, 7, "SURF\n");
436}
437
438static void
439writer_decode_surface_gen6(const struct intel_cmd *cmd,
440 enum intel_cmd_writer_type which,
441 const struct intel_cmd_item *item)
442{
443 uint32_t dw;
444
445 dw = writer_dw(cmd, which, item->offset, 0, "SURF");
446 fprintf(stderr, "type 0x%x, format 0x%x\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800447 GEN_EXTRACT(dw, GEN6_SURFACE_DW0_TYPE),
448 GEN_EXTRACT(dw, GEN6_SURFACE_DW0_FORMAT));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800449
450 writer_dw(cmd, which, item->offset, 1, "SURF");
451 fprintf(stderr, "offset\n");
452
453 dw = writer_dw(cmd, which, item->offset, 2, "SURF");
454 fprintf(stderr, "%dx%d size, %d mips\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800455 GEN_EXTRACT(dw, GEN6_SURFACE_DW2_WIDTH),
456 GEN_EXTRACT(dw, GEN6_SURFACE_DW2_HEIGHT),
457 GEN_EXTRACT(dw, GEN6_SURFACE_DW2_MIP_COUNT_LOD));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800458
459 dw = writer_dw(cmd, which, item->offset, 3, "SURF");
460 fprintf(stderr, "pitch %d, tiling %d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800461 GEN_EXTRACT(dw, GEN6_SURFACE_DW3_PITCH),
462 GEN_EXTRACT(dw, GEN6_SURFACE_DW3_TILING));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800463
464 dw = writer_dw(cmd, which, item->offset, 4, "SURF");
465 fprintf(stderr, "mip base %d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800466 GEN_EXTRACT(dw, GEN6_SURFACE_DW4_MIN_LOD));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800467
468 dw = writer_dw(cmd, which, item->offset, 5, "SURF");
469 fprintf(stderr, "x,y offset: %d,%d\n",
Chia-I Wue6073342014-11-30 09:43:42 +0800470 GEN_EXTRACT(dw, GEN6_SURFACE_DW5_X_OFFSET),
471 GEN_EXTRACT(dw, GEN6_SURFACE_DW5_Y_OFFSET));
Chia-I Wu00b51a82014-09-09 12:07:37 +0800472}
473
474static void
475writer_decode_surface(const struct intel_cmd *cmd,
476 enum intel_cmd_writer_type which,
477 const struct intel_cmd_item *item)
478{
479 if (cmd_gen(cmd) >= INTEL_GEN(7))
480 writer_decode_surface_gen7(cmd, which, item);
481 else
482 writer_decode_surface_gen6(cmd, which, item);
483}
484
485static void
486writer_decode_binding_table(const struct intel_cmd *cmd,
487 enum intel_cmd_writer_type which,
488 const struct intel_cmd_item *item)
489{
490 const unsigned state_size = sizeof(uint32_t) * 1;
491 const unsigned count = item->size / state_size;
492 unsigned offset = item->offset;
493 unsigned i;
494
495 for (i = 0; i < count; i++) {
496 writer_dw(cmd, which, offset, 0, "BIND");
497 fprintf(stderr, "BINDING_TABLE_STATE[%d]\n", i);
498
499 offset += state_size;
500 }
501}
502
503static void
504writer_decode_kernel(const struct intel_cmd *cmd,
505 enum intel_cmd_writer_type which,
506 const struct intel_cmd_item *item)
507{
Chia-I Wu34579502014-10-25 14:44:53 +0800508 const void *kernel = (const void *)
509 writer_pointer(cmd, which, item->offset);
510
Chia-I Wu54ed0792014-12-27 14:14:50 +0800511 fprintf(stderr, "0x%08zx:\n", item->offset);
Chia-I Wu34579502014-10-25 14:44:53 +0800512 intel_disassemble_kernel(cmd->dev->gpu, kernel, item->size);
Chia-I Wu00b51a82014-09-09 12:07:37 +0800513}
514
515static const struct {
516 void (*func)(const struct intel_cmd *cmd,
517 enum intel_cmd_writer_type which,
518 const struct intel_cmd_item *item);
519} writer_decode_table[INTEL_CMD_ITEM_COUNT] = {
520 [INTEL_CMD_ITEM_BLOB] = { writer_decode_blob },
521 [INTEL_CMD_ITEM_CLIP_VIEWPORT] = { writer_decode_clip_viewport },
522 [INTEL_CMD_ITEM_SF_VIEWPORT] = { writer_decode_sf_viewport },
523 [INTEL_CMD_ITEM_SCISSOR_RECT] = { writer_decode_scissor_rect },
524 [INTEL_CMD_ITEM_CC_VIEWPORT] = { writer_decode_cc_viewport },
525 [INTEL_CMD_ITEM_COLOR_CALC] = { writer_decode_color_calc },
526 [INTEL_CMD_ITEM_DEPTH_STENCIL] = { writer_decode_depth_stencil },
527 [INTEL_CMD_ITEM_BLEND] = { writer_decode_blend },
528 [INTEL_CMD_ITEM_SAMPLER] = { writer_decode_sampler },
529 [INTEL_CMD_ITEM_SURFACE] = { writer_decode_surface },
530 [INTEL_CMD_ITEM_BINDING_TABLE] = { writer_decode_binding_table },
531 [INTEL_CMD_ITEM_KERNEL] = { writer_decode_kernel },
532};
533
534static void cmd_writer_decode_items(struct intel_cmd *cmd,
535 enum intel_cmd_writer_type which)
536{
537 struct intel_cmd_writer *writer = &cmd->writers[which];
538 int i;
539
540 if (!writer->item_used)
541 return;
542
543 writer->ptr = intel_bo_map(writer->bo, false);
544 if (!writer->ptr)
545 return;
546
547 for (i = 0; i < writer->item_used; i++) {
548 const struct intel_cmd_item *item = &writer->items[i];
549
550 writer_decode_table[item->type].func(cmd, which, item);
551 }
552
553 intel_bo_unmap(writer->bo);
Courtney Goeltzenleuchterbbc3db22014-10-13 17:03:12 -0600554 writer->ptr = NULL;
Chia-I Wu00b51a82014-09-09 12:07:37 +0800555}
556
557static void cmd_writer_decode(struct intel_cmd *cmd,
558 enum intel_cmd_writer_type which)
559{
560 struct intel_cmd_writer *writer = &cmd->writers[which];
561
562 assert(writer->bo && !writer->ptr);
563
564 switch (which) {
565 case INTEL_CMD_WRITER_BATCH:
Chia-I Wu54ed0792014-12-27 14:14:50 +0800566 fprintf(stderr, "decoding batch buffer: %zu bytes\n", writer->used);
Chia-I Wu00b51a82014-09-09 12:07:37 +0800567 if (writer->used) {
568 intel_winsys_decode_bo(cmd->dev->winsys,
569 writer->bo, writer->used);
570 }
571 break;
Chia-I Wu15cccf72015-02-10 04:07:40 +0800572 case INTEL_CMD_WRITER_SURFACE:
573 fprintf(stderr, "decoding surface state buffer: %d states\n",
574 writer->item_used);
575 cmd_writer_decode_items(cmd, which);
576 break;
Chia-I Wu00b51a82014-09-09 12:07:37 +0800577 case INTEL_CMD_WRITER_STATE:
Chia-I Wu15cccf72015-02-10 04:07:40 +0800578 fprintf(stderr, "decoding dynamic state buffer: %d states\n",
Chia-I Wu00b51a82014-09-09 12:07:37 +0800579 writer->item_used);
580 cmd_writer_decode_items(cmd, which);
581 break;
582 case INTEL_CMD_WRITER_INSTRUCTION:
583 if (true) {
584 fprintf(stderr, "skipping instruction buffer: %d kernels\n",
585 writer->item_used);
586 } else {
587 fprintf(stderr, "decoding instruction buffer: %d kernels\n",
588 writer->item_used);
589
590 cmd_writer_decode_items(cmd, which);
591 }
592 break;
593 default:
594 break;
595 }
596}
597
598/**
599 * Decode according to the recorded items. This can be called only after a
600 * successful intel_cmd_end().
601 */
602void intel_cmd_decode(struct intel_cmd *cmd)
603{
604 int i;
605
606 assert(cmd->result == XGL_SUCCESS);
607
608 for (i = 0; i < INTEL_CMD_WRITER_COUNT; i++)
609 cmd_writer_decode(cmd, i);
610}